AM29520A AMD | Alldatasheet
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Am29520A/Am29521A ‘ Multilevel Pipeline Registers DISTINCTIVE CHARACTERISTICS © Four 8-bit wide ragisters © High-speed IMOX™ ECL internal technology, TTL com- © Provides temporary storage for data/instruction dolay/ patible 1/0 queuing © All 4 registers available at three state output © Single 4 level or dual 2 level structure © 24 pin slim (0.3") DIP packages © 28 pin chip carrier packages GENERAL DESCRIPTION The Am29520A and Am29521A are high speed, dual stack, In the Am20520A, data may be microprogrammed to register files that differ only in the way data is loaded (see cascade through the 4 registers in push-down pattern, no- Table 1). Both devices contain four 8-bit wide registers op to hold data in the registers, or push-down data through whose flexible architecture lends itself to virtually any ‘one 2 level stack while holding data in the other stack. ) Srey on tha eystat bon ter at sioa so Shayordiuta The Am29521A also has the cascadable 4 register push- ' soplcat down and no-op features. it can also be microprogrammed | € signal processing applications. to write over the first level register of one stack, while < holding data in the other 3 registers. Pe BLOCK DIAGRAM Cc a} Cc — = é fol 2 C REGISTER gow | oom mens] | [oem neo crock 1 < on] f YU wx 2 oa S051 OE , Yor 0R02270 “Multilevel Pipeline Register
03569 B 10
{ssua Date: September 1986
RELATED PRODUCTS
[_Part No. [Description [ anessto [FFT Aatoss Soqoncer | [Anees2s [seb Floating Pant Processor] [eee [esa Microprocessor [amaacéos [raxtawac ————id [oe [Sera with 0 and Feedthrough CONNECTION DIAGRAM Top View CD3024 CL 028 PD3024 PL 028 nstaucnion 1° 417 vec 2e-o28$s58 qustaucnion) [7] 2 2) Samux se) OOoOoOoooo Tae os 27 $,qwux ser) os ash nc oC at) % o Ds 24 CK % ats »An 3 7 say 2 + amaseann in Fv, ea ee a oe aly os Cie vf“ Os ple athys oe «On 0 D9 nO oC sFw On ws eeu see cx Cn «Bw NAAR ono 2 se eepgurse coro4s71 Coov0120 Note: Pin 1 is marked for orientation. LOGIC SYMBOL METALLIZATION AND PAD LAYOUT . \\ s ord, > wn E> > | i if itt | Hy ge " ZL > |= °, Peat al aa ,o s Lod eigell itt EE Ys o aol taall al Lso02a01 > vey Use clk GNDGNOOE ¥, DIE SIZE: 0.117" x 0.133" Approximate Gate Count = 362
ORDERING INFORMATION
AND standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by @ combination of: A. Device Number B. Speed Option (it applicable) C. Package Type D. Temperature Range E. Optional Processing _ 2 s 8 Li E. OPTIONAL PROCESSING lank ~ Standard processing B= Burin D. TEMPERATURE RANGE C= Commercial (0 10 +70°C) ©. PACKAGE TYPE P= 26-Pin Plastic O1P (C3024) D= 24-Pin Ceramic DIP (PD3024) J 26-Pin Plastic Leaded Chip Carrer (L028) = 28-Pin Coramic Leadiess Chip Carrier (CL 028) 8. SPEED OPTION Not Applicable ‘A. DEVICE NUMBER/DESCRIPTION ‘Am205204 ‘amz9521A Miltiovel Ppoline Registers Valid Combinations Valid Combinations list configurations planned to be ‘DG, DCB, PG, PCB, supportad in volume for this device. Consult the local AMD [_aweoseon | iC. ue sales office to confirm availability of specific valid ete en LG IC to obtain additional data on AMD's standard military grade products.
AMD products for Aerospace and Defense applications are available in several packages and operating ranges. APL (Approved Products List) products are fully compliant with MIL-STD-883C requirements. CPL (Controlled Products List) products are Processed in accordance with MIL-STD-883C, but are inherently non-compliant because of package, solderability, or surface treatment exceptions to those specifications. The order number (Valid Combination) for APL products is formed by a combination of: A. Device Number B. Speed Option (if applicable) C. Device Class D. Package Type E. Lead Finish tL . LEAD FINISH A= Hot Solder DIP C= Gold D. PACKAGE TYPE 1BLA = 24-Pin CO3024 /83C = 26-Pin CL 028 ©. DEVICE CLASS 78 = Class B 8. SPEED OPTION ‘Not Applicable ‘A. DEVICE NUMBER/DESCRIPTION ‘Am29520A Am295218 Multilevel Pipeline Registers Valid Combinations Valid Combinations list configurations planned to be Valid Combinations Supported in volume for this device. Consult the local AMD ["Awass20a «dis sales office to confirm availability of specific valid combinations or to check for newly released valid combinations.
port. Output Port. See Table 3 for details. va fin trewainle port” oo ‘pu registers as determined by the Instruction Inputs. inputs. See Tables 1 and 2 for details. HIGH, the Register Output Port is three-stated. FUNCTIONAL DESCRIPTION respectively, and hold resident data in the other 3 registers. The Am29520A instead pushes data down the two level stack. Instructions "LDB" and "LDA" write over register By or A; which then appears at the Register Output Port. TABLE 1. REGISTER LOAD OPERATIONS
TABLE 2. INSTRUCTION SET DESCRIPTIONS TABLE 3. SELECT OPERATION DESCRIPTIONS &vc<2>
ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage Temperature ....eecccseesssssesessesess 65 to +150°C Commercial (C) Devices CONKIUOUS «...seseeeeeeeesereessesseeeeeererienn 90,5 10 +7,0V Military (M) Devices DC INpUt Voltage... cesses 05 to +5.5V oo tot Csr Into Outputs... “ona fo — those limits. be the sisssetetsensnaneeeneeeneny 5. Operat vty of th eee @ queranised. which Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. DC CHARACTERISTICS over operating range unless otherwise specified [Parameters | __ Besson Test Condon (7 [in [wo unt Vou Output HIGH Voltage Voc = MIN [ton==65 ma comy [24 TT one Min= Vin orVi[lon==20 ma (my 2a [| Vou Output LOW Voltage Voc = MIN ee Miw=Viw or Vu _[op=20ma 50 v Guaranteed input logical LOW ‘it voltage for all inputs: [vi Tinout ciame Votage [Yoo=MINw=—18m@A Cte | Von | [or 20 | me [iow tow omen | Woo = MAX Nin = 0.8 [orner inpus [| =04 | [im input HGH Curent [Voc = MAK Vnpmary 0 | [Pinout HG Current [Voc = MAK Viy= 88 V0 ma Off Stato (High Impedance) |) yo = Max EA Output Current [orosv TT 50 | Output Short Circuit Current [me sei owen [ucommac |e | eo | | OMT Oniy Ta=0 0 +70 [| 165 _| Power Supply Current Voo = MAX Tas +70°C [ [ss _] (wore) Mi Only [Ro=-ssto ssc [| 200 | Voc = MAX ec a ‘Notes: 1. For conditions shown as MIN or MAX, use the appropriate value specified under Operating Ranges for the applicable device type. 2 Not more than one output should be shorted at a ume. Duration of the short crcuk test should not exceed one second. 3. All inputs LOW.
Se EEE MEAN TEI TICS Over operating range unless otherwise specified MILITARY Parente Parte jeommencon | | symbols Description Test Conaitions | win [ wax. | win. [ wax. | Lt [oe FE foe woe owe | ae [an [Boone ere | teoset | » Sy to Data Output [2 [osen FRE 510 om on a a Pt outa wo cack CL = 50pF a a es a ee | | s [ts inctuction Register oe a [6 fs Enable) to Clock a [2 ee PO we Outpt ee] a a EY OO > | [aoe] a ick Pulse [os [ow aka Re eee | pe fem ray Pet fet pe] SWITCHING TEST CIRCUITS Veo * R= 200 Vour O—0~0 a | ore or ¢ Ss - TC001102 Three-State Outputs Notes: 1. C = 50 pF includes scope probe, wiring and stray capacitances without device in test fixture. 2. S}, Sa, Sg are closed during function tests and all AC tests except output enable tests. 3. S} and S3 are closed while S2 is open for tpz}; test. 'S1 and Sp are closed while Sg is open for tpzt test 4. CL = 5.0 pF for output disable tests.
INPUT/OUTPUT CURRENT INTERFACE CONDITIONS ORIVING OUTPUT DRIVEN INPUT on | w , — | | — -- F i icenast0 SWITCHING WAVEFORMS Am29520A/Am29521A t=—°—~ ee a. Se a (CLK) © O) | st Co) oxva gD) wwe set (So. $1) YoY, ww verona
SWITCHING WAVEFORMS (Cont'd.) THREE STATE TIMING ‘Am29520A/Am29521A ‘SSTATE TT >a BF CONTROL ww ° Q ® “ osaaLzy (ennauey Von Vou | var ——_ a stare ——Va+sv ee You Vou Tas we weRo2s42 Test Philosophy and Methods ‘Threshold Testing The following points give the general philosophy that we apply The noise associated with automatic testing, the long induc- {o tests that must be properly engineered if they are to be tive cables, and the high gain of bipolar devices frequently give implemented in an automatic testing environment. The specit- tise to oscillations when testing high-speed circuits. These ics of what philosophies are applied to which test are shown in oscillations are not indicative of a reject device, but instead, of the data sheet and the data-sheet reconcilation that follow. an avertaxed systom. To minimize this problem, thresholds are Capacitive Loading for AC Testing tested at least once for each input pin. Thereatter, “hard” high and low levels are used for other tests. Generally this means Automatic testers and their associated hardware have stray that function and AC testing are performed at “hard' input capacitance that varies from one type of tester to another, but levels. is generally around 50 pF. This, of course, makes it impossible to make direct measurements of parameters that call for AC Testing ‘smaller capacitive load than the associated st capacitance. Typical examples ofthis are the so-called "Tost delays" that AC parameters are specified that cannot be measured accu- measure the propagation delays in to and out of the high- rately on automatic testers because of tester limitations. Data- impedance state and are usually specified at a load capaci- input hold times fall into this category. In these casos, the tance of 5.0 pF. In these cases, the test is performed at the Parameter in question is tested by correlating the tester to higher load capacitance (typically 50 pF) and engineering bench data or oscilloscope measurements made on the tester correlations based on data taken with a bench set up are used by ‘engineering (supporting data on file). {0 determine the result at the lower capacitance. Certain AC tests are redundant since they can be shown to be Similarly, @ product may be specified at more than one _ predicted by other tests that have already been performed. In capacitive load. Since the typical automatic tester is not these cases, the redundant tests are not performed. capable of switching loads in mid-test, itis impractical to make measurements at both capacitances even though they may Output Short-Circult Current Testing both be greater than the stray capacitance. In these cases, a , 7 measurement is made at one of the two capacitances. The When performing log tests on devices containing RAM or " registers, great care must be taken that undershoot caused by result at the other capacitance is determined from engineering a ° : grounding the high-state output does not trigger parasitic correlations based on data taken with a bench setup and the ah a knowledge that certain DC tests are performed in order to. elements which in tum cause the device to change state. In facttaw ih conelation order to avoid this effect, it is common to make the measure- - ment at @ voltage (Voutput) that is slightly above the ground. AC loads specified in the data sheet are used for bench The Vcc is raised by the same amount so that the result (as testing. Automatic tester loads, which simulate the datasheet confirmed by Ohm's law and precise bench testing) is identical loads, may be used during production testing. to the Vout = 0, Voc = Max. case.
PHYSICAL DIMENSIONS* CD3024 CL 028 on = a =e = a 2 om = | amame ==S— a ee af = Hos & sn an wa. —| a
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Es a em VF ae} Jae _— ie! ps" PD3024 PL 028 et ev = nenmnanaag TH oes a! “3 i 4 : = “f qT] 3 ee | ato “l z, ee os =| 2m an “mlb ake --+es—s— a a Cs *For Reference Only
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