PLL620-21 PLL | Alldatasheet
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Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 1
FEATURES
100MHz to 200MHz Fundamental Mode Crystal. Output range: 100 – 200MHz (no multiplication). Selectable OE logic. Minimum bondwires required for VDD and GND. Available outputs: PECL or LVDS. Supports 3.3V-Power Supply. Available in die form. Thickness 10 mil. DESCRIPTIONS PLL620-21 is an XO IC specifically designed to work with high frequency fundamental and third overtone crystals. Its design was optimized to tolerate higher limits of interelectrodes capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. It offers a selectable OE logic and is ideal for XO applications requiring LVDS or PECL output levels at high frequencies. BLOCK DIAGRAM DIE CONFIGURATION DIE SPECIFICATIONS Name Value Size 62 x 65 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 10 mil OUTPUT SELECTION AND ENABLE Pad #9 OUTSEL Selected Output LVDS PECL (default) Pad #25 OESEL Pad #30 OE_CTRL State Tri-state Output enabled (default) Output enabled (default) (default) Tri-state Pad #9: Bond to GND to set to “0”, bond to VDD to set to “1” Pad #30: Logical states defined by PECL levels if OUTSEL (pad #9) is “1” Logical states defined by CMOS levels if OUTSEL is “0” !"#$% &#$ $'" &#$ $'" ()*+, ()*+, #"#$ #-!($ ()*+, &$$ &$$ &$$ &$$ )0123* 45*
Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 2 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD V Input Voltage, dc VI VSS-0.5 VDD+0.5 V Output Voltage, dc VO VSS-0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature* TA -40 Junction Temperature TJ 125 Lead Temperature (soldering, 10s) 260 Input Static Discharge Voltage Protection kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only. 2. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Built-in Load Capacitance CL IC only pF Shunt Capacitance pF Oscillation Frequency OF Fund. Or 3rd Overtone 120 200 MHz Recommended ESR RE Ω
Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 3 3. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded Outputs) IDD PECL/LVDS mA Operating Voltage VDD 3.13 3.47 V Output Clock Duty Cycle @ 1.25V (LVDS) @ Vdd – 1.3V (PECL) Short Circuit Current ±50 mA 4. Jitter specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS at 155MHz 2.5 Period jitter peak-to-peak at 155MHz With capacitive decoupling between VDD and GND. ps Accumulated jitter RMS at 155MHz Accumulated jitter peak-to-peak at 155MHz With capacitive decoupling between VDD and GND. Over 1,000,000 cycles. ps Integrated jitter RMS at 155MHz Integrated 12 kHz to 20 MHz 0.3 ps Note: Higher Q factor of 3rd overtone crystals will result in even better jitter performance. 5. Phase noise specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS Phase Noise vs. carrier with fund. crystal. 155.52MHz -80 -110 -125 -143 -145 dBc/Hz Note: Higher Q factor of 3rd overtone crystals will result in even better phase noise performance.
Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 4 6. LVDS Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Output Differential Voltage VOD 247 355 454 mV VDD Magnitude Change ∆VOD -50 mV Output High Voltage VOH 1.4 1.6 V Output Low Voltage VOL 0.9 1.1 V Offset Voltage VOS 1.125 1.2 1.375 V Offset Magnitude Change ∆VOS RL = 100 Ω (see figure) mV Power-off Leakage IOXD Vout = VDD or GND VDD = 0V ±10 uA Output Short Circuit Current IOSD -5.7 mA 7. LVDS Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Differential Clock Rise Time tr 0.2 0.7 1.0 ns Differential Clock Fall Time tf RL = 100 Ω CL = 10 pF (see figure) 0.2 0.7 1.0 ns OUT OUT VOD VOS 50Ω 50Ω OUT VDIFF RL = 100Ω CL = 10pF CL = 10pF LVDS Switching Test Circuit LVDS Levels Test Circuit LVDS Transistion Time Waveform OUT OUT OUT 0V (Differential) 20% 80% 20% 80% tR tF VDIFF
Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 5 8. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. MAX. UNITS Output High Voltage VOH VDD – 1.025 V Output Low Voltage VOL RL = 50 Ω to (VDD – 2V) (see figure) VDD – 1.620 V 9. PECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time tr @20/80% - PECL 0.6 1.5 ns Clock Fall Time tf @80/20% - PECL 0.5 1.5 ns OUT OUT 50Ω 50Ω PECL Levels Test Circuit PECL Transistion Time Waveform OUT OUT 50% 20% 80% tR tF VDD DUTY CYCLE 45 - 55% 55 - 45% 50% OUT OUT tSKEW PECL Output Skew 2.0V
Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 6 PAD ASSIGNMENT Pad # Name X (µµµµm) Y (µµµµm) Optional GND 248 109 Optional GND 361 109 Optional GND 473 109 Optional GND 587 109 GND 702 109 Reserved 874 109 Optional GNDBUF 1042 109 GNDBUF 1171 109 OUTSEL 1400 125 LVDS 1400 259 PECL 1400 476 VDDBUF 1400 616 Optional VDDBUF 1400 716 PECLB 1400 871 LVDSB 1400 1089 Do Not Connect 1400 1227 GNDBUF 1389 1365 Reserved 1232 1365 Do Not Connect 1042 1365 Do Not Connect 854 1365 Optional VDD 659 1365 Optional VDD 559 1365 VDD 459 1365 Optional VDD 358 1365 OESEL 194 1365 XIN 109 1223 XOUT 109 1017 Do Not Connect 109 858 Do Not Connect 109 646 OE_CTRL 109 397 Do Not Connect 109 181 Note: for optimal Phase Noise performance, it is recommended to bond all optional VDD and GND pads.
Low Phase Noise XO (for HF Fund. and 3rd O.T.) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 07/15/05 Page 7
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL620-21 D C Order Number Marking Package Option PLL620-21DC P620-21DC Die – Waffle Pack PART NUMBER TEMPERATURATRE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE D=DIE