P601-01OC

PLL601-01 PLL | Alldatasheet

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Technical content

Low Phase Noise PLL Clock Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1

FEATURES

Input from crystal or clock at 10-27MHz. Integrated crystal load capacitor: no external load capacitor required. Output clocks up to 160MHz. Low phase noise (-125dBc/Hz @ 1kHz). Output Enable function. Low jitter (RMS): 7.2ps (period), 11.2ps (accum.) Advanced low power sub-micron CMOS process. 3.3V operation. Available in 16-Pin SOIC or TSSOP.

DESCRIPTION

The PLL601-01 is a low cost, high performance and low phase noise clock synthesizer. Using Phase- Link’s proprietary analog and digital Phase Locked Loop techniques, this IC can produce up to a 160MHz output. PIN CONFIGURATION Note: ^ denotes internal pull up. BLOCK DIAGRAM PLL 601-01 CLK REFEN VDD VDD VDD XOUT S1^ XIN GND GND GND REFOUT OE^ S0^ S3^ S2^ Reference Divider Phase Comparator Charge Pump Loop Filter VCO ROM Based Multipliers VCO Divider XTAL OSC CLK REFOUT OE REFEN XIN XOUT

Low Phase Noise PLL Clock Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 2 PIN DESCRIPTIONS MULTIPLIER SELECT TABLE CLK Test Input x 11 Input x 1 Input x 3 Input x 4 Input x 5 Input x 6 Input x 8 Input x 7 Input x 2 Input x 9 Input x 8 Input x 10 Input x 12 Input x 16 Name Number Type O Clock output. Equals the input frequency times selected multiplier. REFEN I Reference clock enable. When Low, it disables REFOUT. When High, it enables REFOUT. VDD 3,4,5 P Power Supply. XOUT O Crystal output. I Multiplier Select Pin 1. Determines CLK output. Has internal pull-up. XIN I Crystal input to be connected to 10-27MHz fundamental parallel mode crys- tal (CL=15pF). On chip load capacitors: No external capacitor required. I Multiplier Select Pin 2. Determines CLK output. Has internal pull-up. I Multiplier Select Pin 3. Determines CLK output. Has internal pull-up. I Multiplier Select Pin 0. Determines CLK output. Has internal pull-up. OE I Output Enable. Tri-state CLK and REFOUT when low. Has internal pull-up. REFOUT O Buffered crystal oscillator clock output. Controlled by REFEN. GND 14,15,16 P Ground.

Low Phase Noise PLL Clock Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD 4.6 V Input Voltage, dc VI -0.5 VDD+0.5 V Output Voltage, dc VO -0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature* TA -40 Junction Temperature TJ 125 Lead Temperature (soldering, 10s) 260 ESD Protection, Human Body Model kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con- ditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. AC Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Input Frequency Fundamental parallel resonance MHz Output Frequency At 3.3V 160 MHz Output Rise Time 0.8V to 2.0V with no load 1.5 ns Output Fall Time 2.0V to 0.8V with no load 1.5 ns Duty Cycle @ 50% VDD 3. DC Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Operating Voltage VDD 2.97 3.63 V Input High Voltage VIH V Input Low Voltage VIL 0.8 V Input High Voltage VIH For XIN pin (VDD/2) + 1 VDD/2 V Input Low Voltage VIL For XIN pin VDD/2 (VDD/2) − 1 V Output High Voltage VOH IOH = -25mA 2.4 V Output Low Voltage VOL IOL = 25mA 0.4 V Output High Voltage At CMOS Level VOH IOH = -8mA VDD-0.4 V Operating Supply Current IDD No Load mA Short-circuit Current IS ±50 mA Input Capacitance CIN OE, Select Pins pF

Low Phase Noise PLL Clock Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 4 4. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN Parallel Fundamental Mode MHz Crystal Loading Capacitance Rating CL (xtal) pF 5. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Max. Absolute Jitter, peak-to-peak Short term ±100 ps Max. Jitter, cycle to cycle ps Phase Noise, relative to carrier, 125Mhz(x5)

100 Hz offset

Phase Noise, relative to carrier, 125Mhz(x5) 1kHz offset 125 dBc/Hz Phase Noise, relative to carrier, 125Mhz(x5) 10kHz offset 130 dBc/Hz Phase Noise, relative to carrier, 125Mhz(x5) 100kHz offset 125 dBc/Hz

Low Phase Noise PLL Clock Multiplier 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 5

PACKAGE INFORMATION

ORDERING INFORMATION

PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur- nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range PLL601-01 S C Order Number Marking Package Option PLL601-01OC P601-01OC 16-Pin TSSOP (Tube) PLL601-01OC-R P601-01OC 16-Pin TSSOP (Tape & Reel) PLL601-01SC P601-01SC 16-Pin SOIC (Tube) PLL601-01SC-R P601-01SC 16-Pin SOIC (Tape & Reel) PART NUMBER TEMPERATURE C=COMMERCIAL I=INDUSTRAL PACKAGE TYPE S=SOIC O=TSSOP C L A

16 PIN Narrow SOIC, TSSOP ( mm )

Min. Max. Min. Max. A 1.35 1.75 1.20 0.10 0.25 0.05 0.15 B 0.33 0.51 0.19 0.30 C 0.19 0.25 0.09 0.20 D 9.80 10.00 4.90 5.10 E 3.80 4.00 4.30 4.50 H 5.80 6.20

6.40 BSC

L 0.40 1.27 0.45 0.75 e

1.27 BSC

0.65 BSC

E H D e B