P521-38 PLL | Alldatasheet
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Low Phase Noise PECL VCXO (65MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 3/02/04 Page 1
FEATURES
65MHz to 130MHz Fundamental Mode Crystal. Output range: 65MHz – 130MHz. Complementary PECL outputs. Selectable OE Logic (enable high or enable low). Integrated variable capacitors. High pull linearity: < 5%. +/- 125 ppm pull range Supports 2.5V or 3.3V-Power Supply. Available in die form. Thickness 10 mil. DESCRIPTIONS P521-38 is a VCXO IC specifically designed to pull high frequency fundamental crystals. Its internal varicaps allow an on chip frequency pulling, controlled by the VCON input. The chip provides a low phase noise, low jitter PECL differential clock output. BLOCK DIAGRAM DIE CONFIGURATION DIE SPECIFICATIONS Name Value Size 56.5 x 57.5 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 10 mil OUTPUT ENABLE LOGIC SELECTION OESEL (Pad #14) OECTRL (Pad #22) State 0 (Default) Output enabled 0 (Default) Tri-state Tri-state 1 (Default) Output enabled Pad #14, 22: Bond to GND to set to “0”, bond to VDD to set to “1” No connection results to “default” setting through internal pull-up/-down. Pad #22: Logical states defined by PECL VIH and VIL levels. OE Q P521-38 VCON Q Oscillator Amplifier integrated varicaps Y X (0,0) (1460,1435) 56.5 mil 57.5 mil GNDBUF PECL PECLBAR VDDBUF VDDBUF VDDANA OE XOUT XIN VCON GNDOSC GNDBUF GNDANA GNDOSC VCON GNDANA N/C VDDOSC N/C OSCOFF OESEL V GNDBUF
Low Phase Noise PECL VCXO (65MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 3/02/04 Page 2 PAD ASSIGNMENT AND DESCRIPTION Pad # Name X (µµm) Y (µµm)
Description
329.6 110.1 Control Voltage input. Use this pin to change the output frequency by varying the applied Control Voltage. GNDOSC 498.3 110.0 GND connection for oscillator circuitry. GNDANA 696.2 110.0 GND connection for analog circuitry. GNDANA 825.0 110.0 GND connection for analog circuitry. GNDBUF 973.6 110.0 GND connection for output buffer circuitry. GNDBUF 1150.0 109.1 GND connection for output buffer circuitry. GNDBUF (optional) 1183.6 302.2 GND connection for output buffer circuitry. PECL 1183.6 452.3 PECL output PECLBAR 1183.6 613.5 PECL complementary output. VDDBUF (optional) 1182.4 745.9 VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other VDDs whenever possible. VDDBUF 1252.4 903.6 VDD connection for output buffer circuitry. VDDBUF should be separately decoupled from other VDDs whenever possible. VDDANA 1252.4 1081.3 VDD connection for analog circuitry. VDDANA should be separately decoupled from other VDDs whenever possible. Not used 1058.5 1221.6 OESEL 864.5 1221.6 Selector input to choose the OE control logic. See table on page 1. VDDOSC 624.0 1222.7 VDD connection for oscillator circuitry. VDDOSC should be separately decoupled from other VDDs whenever possible. Not used 467.1 1222.6 OSCOFF 271.1 1222.6 Oscillator Off Selection input pad. When low, turns off the oscillator when output is disabled. When high (default), oscillator running when output is disabled. Internal pull-up GNDOSC (optional) 109.4 1222.9 GND connection for oscillator circuitry. VCON 108.9 1062.1 Control Voltage input. Use this pin to change the output frequency by varying the applied Control Voltage (internally connected to pad 1). XIN 109.0 865.8 Crystal oscillator input pad. XOUT 108.6 358.4 Crystal oscillator output pad. OECTRL 108.6 146.5 OE input pad. See table on page 1. Note: for optimal Phase Noise performance, it is recommended to bond all optional VDD and GND pads.
Low Phase Noise PECL VCXO (65MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 3/02/04 Page 3 ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL MIN. MAX. UNITS Supply Voltage VDD V Input Voltage, dc VI VSS-0.5 VDD+0.5 V Output Voltage, dc VO VSS-0.5 VDD+0.5 V Storage Temperature TS -65 150 Ambient Operating Temperature TA Junction Temperature TJ 125 Lead Temperature (soldering, 10s) 260 Input Static Discharge Voltage Protection kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. 2. Crystal Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Crystal Resonator Frequency FXIN Parallel Fundamental Mode 130 MHz Crystal Loading Rating CL (xtal) Die at VCON = 1.65V 7.5 pF Interelectrode Capacitance 3.5 pF Crystal Pullability C0/C1 (xtal) AT cut 250 Recommended ESR RE AT cut Ω 3. Voltage Control Crystal Oscillator PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS VCXO Stabilization Time * TVCXOSTB From power valid ms VCXO Tuning Range XTAL C0/C1 < 250 250* ppm CLK output pullability 0V ≤ VCON ≤ 3.3V at room temperature ±80* ppm On-chip Varicaps control range VCON = 0 to 3.3V 4 – 18* pF Linearity VCXO Tuning Characteristic ppm/V VCON input impedance 2000 kΩ VCON modulation BW 0V ≤ VCON ≤ 3.3V, -3dB kHz Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.
Low Phase Noise PECL VCXO (65MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 3/02/04 Page 4 4. General Electrical Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded Outputs) IDD at 3.3V @ 77.76MHz mA Oscillator off Output valid after OE enabled Oscillator on ms Operating Voltage VDD 2.25 3.63 V Output Clock Duty Cycle @ Vdd – 1.3V (PECL) Short Circuit Current ±50 mA 5. Jitter specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS at 77.76MHz 2.5 Period jitter peak-to-peak at 77.76MHz At 77.76MHz, with capacitive decoupling between VDD and GND. Over 10,000 cycles 18.5 ps Accumulated jitter RMS at 77.76MHz 2.5 Accumulated jitter peak-to-peak at 77.76MHz At 77.76MHz, with capacitive decoupling between VDD and GND. Over 1,000,000 cycles. ps Random Jitter “RJ” measured on Wavecrest SIA 3000 2.5 ps Integrated jitter RMS at 77.76MHz Integrated 12 kHz to 20 MHz 0.5 0.7 ps Measured on Wavecrest SIA 3000 6. Phase noise specifications PARAMETERS FREQUENCY 10Hz 100Hz 1kHz 10kHz 100kHz 1MHz UNITS Phase Noise relative to carrier 77.76MHz -75 -100 -125 -140 -145 -150 dBc/Hz Note: Phase Noise measured at VCON = 0V
Low Phase Noise PECL VCXO (65MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 3/02/04 Page 5 7. PECL Electrical Characteristics PARAMETERS SYMBOL CONDITIONS MIN. MAX. UNITS Output High Voltage VOH VDD – 1.025 V Output Low Voltage VOL RL = 50 Ω to (VDD – 2V) (see figure) VDD – 1.620 V 8. PECL Switching Characteristics PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Clock Rise Time tr @20/80% - PECL 0.6 1.5 ns Clock Fall Time tf @80/20% - PECL 0.5 1.5 ns OUT OUT 50Ω 50Ω PECL Levels Test Circuit PECL Transistion Time Waveform OUT OUT 50% 20% 80% tR tF VDD DUTY CYCLE 45 - 55% 55 - 45% 50% OUT OUT tSKEW PECL Output Skew 2.0V
Low Phase Noise PECL VCXO (65MHz to 130MHz) 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 3/02/04 Page 6
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. PART NUMBER The order number for this device is a combination of the following: Device number, Package type and Operating temperature range P521-38 D C Order Number Marking Package Option P521-38DC P521-38DC Die – Waffle Pack PART NUMBER TEMPERATURE C=COMMERCIAL PACKAGE TYPE D=DIE