P3C1021-10TC

P3C1021 PYRAMID | Alldatasheet

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Technical content

Document # SRAM134 REV OR Revised April 2007 P3C1021 HIGH SPEED 64K x 16 (1 MEG) STATIC CMOS RAM High Speed (Equal Access and Cycle Times) — 10/12/15/20 ns (Commercial) — 12/15/20 ns (Industrial) Low Power — 325 mW (max.) Single 3.3V ± 0.3V Power Supply Easy Memory Expansion Using CECECECECE and OEOEOEOEOE Inputs FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION 1519B

FEATURES

DESCRIPTION

The P3C1021 is a 65,536 words by 16 bits high-speed CMOS static RAM. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM oper- ates from a single 3.3V ± 0.3V tolerance power supply. Access times as fast as 10 nanoseconds permit greatly enhanced system operating speeds. CMOS is utilized to reduce power consumption to a low level. The P3C1021 is a member of a family of PACE RAM™ products offer- ing fast access times. The P3C1021 device provides asynchronous operation with matching access and cycle times. Memory loca- tions are specified on address pins A 0 to A15. Reading is accomplished by device selection ( CE and output en- abling (OE) while write enable (WE) remains HIGH. By presenting the address under these conditions, the data in the addressed memory location is presented on the data input/output pins. The input/output pins stay in the HIGH Z state when either CE or OE is HIGH or WE is LOW. Package options for the P3C1021 include 44-pin SOJ and TSOP packages. Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Fast t OE Automatic Power Down when deselected Packages —44-Pin SOJ, TSOP II SOJ TSOP II

Page 2 of 10Document # SRAM134 REV OR MAXIMUM RATINGS(1) Symbol Parameter Value Unit VCC Power Supply Pin with –0.5 to +4.6 V Respect to GND Terminal Voltage with –0.5 to VTERM Respect to GND V CC +0.5 V TA Operating Temperature –55 to +125 °C Symbol Parameter Value Unit TBIAS Temperature Under –55 to +125 °C Bias TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current 20 mA RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE ISB Standby Power Supply Current (TTL Input Levels) CE ≥ V IH VCC= Max, f = Max., Outputs Open V IN ≥ VIH or VIN ≤ VIL CE ≥ VCC - 0.2V VCC= Max, f = 0, Outputs Open V IN ≥ VCC - 0.3V or VIN ≤ 0.3V Standby Power Supply Current (CMOS Input Levels) I SB1 Industrial Grade(2) Ambient Temperature GND VCC 3.3V ± 0.3V 3.3V ± 0.3V Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Unit pF pF CAPACITANCES(4) VCC = 3.3V, TA = 25°C, f = 1.0MHz Symbol DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) VIH ILI ILO Parameter Input High Voltage Input Low Voltage Input Leakage Current Test Conditions VCC = Max. VIN = GND to VCC VCC = Max., CE = VIH, VOUT = GND to VCC Typ. Commercial –40°C to +85°C 0°C to +70°C Unit V V µA µA mA mA VOL Output Low Voltage (TTL Load) IOL = +8 mA, VCC = Min. V Output High Voltage (TTL Load) VOH IOH = –4 mA, VCC = Min. V Output Leakage Current P3C1021 ___ 15 5___ Min 2.0 –0.3(3) Max VCC +0.3 0.8 0.4 2.4 VIL

Page 3 of 10Document # SRAM134 REV OR ICC Symbol Parameter Temperature Range Dynamic Operating Current* Commercial Industrial N/A –12–10 –15 –20 Unit mA mA POWER DISSIPATION CHARACTERISTICS VS. SPEED 90 85 AC ELECTRICAL CHARACTERISTICS—READ CYCLE (VCC = 3.3V ± 0.3V, All Temperature Ranges)(2) Sym. tRC tAA tAC tOH tLZ tHZ tOE tOLZ tOHZ tPU tPD Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Hold from Address Change Chip Enable to Output in Low Z Chip Disable to Output in High Z Output Enable Low to Low Z Output Enable High to High Z Chip Enable to Power Up Time Chip Disable to Power Down Time Output Enable Low to Data Valid MaxMinMaxMinMaxMinMaxMin -10 -12 -15 -20 Unit ns ns ns ns ns ns ns ns ns ns ns tBE Byte Enable to Data Valid 5 6 7 8n s tLZBE Byte Enable to Low Z 0 00 0 ns tHZBE Byte Disable to High Z 5 6 7 8n s

Page 4 of 10Document # SRAM134 REV OR TIMING WAVEFORM OF READ CYCLE NO. 2 (OEOEOEOEOE CONTROLLED)(5,6) Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with V IL not more negative than –2.0V and VIH ≤ VCC + 0.5V, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested. 5. WE is HIGH for READ cycle. 6. CE is LOW and OE is LOW for READ cycle. 7. ADDRESS must be valid prior to, or coincident with CE transition LOW. 8. Transition is measured ± 200 mV from steady state voltage prior to change, with loading as specified in Figure 1. This parameter is sampled and not 100% tested. 9. Read Cycle Time is measured from the last valid address to the first transitioning address. TIMING WAVEFORM OF READ CYCLE NO. 1

Page 5 of 10Document # SRAM134 REV OR -10 AC CHARACTERISTICS—WRITE CYCLE (VCC = 3.3V ± 0.3V, All Temperature Ranges)(2) Sym. tWC tCW tAS tWP tAH tDW tDH Parameter Write Cycle Time Chip Enable Time to End of Write Address Set-up Time to Write Start Write Pulse Width Address Hold Time Data Hold Time Data Valid to End of Write MaxMinMaxMinMaxMinMaxMin -12 -15 -20 Unit ns ns ns ns ns ns ns ns tAW Address Valid to End of Write Write Enable to Output in High ZtWZ 56 7 8 n s TIMING WAVEFORM OF WRITE CYCLE NO. 1 (CECECECECE CONTROLLED) WE High to Low ZtLZWE 33 3 3 n s Byte Enable to End of WritetBW 78 91 0 n s

Page 6 of 10Document # SRAM134 REV OR TIMING WAVEFORM OF WRITE CYCLE NO. 2 ( BLEBLEBLEBLEBLE OR BHEBHEBHEBHEBHE CONTROLLED) TIMING WAVEFORM OF WRITE CYCLE NO. 3 (WEWEWEWEWE CONTROLLED, OEOEOEOEOE LOW)

Figure 1. Output Load Figure 2. Thevenin Equivalent

• including scope and test fixture.

be used in series with D OUT to match 166 Ω (Thevenin Resistance).

Page 8 of 10Document # SRAM134 REV OR

ORDERING INFORMATION

Page 9 of 10Document # SRAM134 REV OR SOJ SMALL OUTLINE IC PACKAGE TSOP II THIN SMALL OUTLINE PACKAGE Pkg # # Pins Symbol Min Max A 0.128 0.148 A1 0.082 - b 0.013 0.023 C 0.007 0.013 D 1.120 1.130 e E 0.435 0.445 E1 0.395 0.405 Q0 . 0 2 5 - 44 (400 mil)

0.050 BSC

0.370 BSC

Pkg # # Pins Symbol Min Max A 0.039 0.047 A2 0.033 0.045 b 0.012 0.016 D 0.396 0.404 E 0.721 0.729 e H D 0.462 0.470

0.0315 BSC

Page 10 of 10Document # SRAM134 REV OR REVISIONS DOCUMENT NUMBER: SRAM134 DOCUMENT TITLE: P3C1021 HIGH SPEED 64K x 16 (1 MEG) STATIC CMOS RAM REV. ISSUE DATE ORIG. OF CHANGE DESCRIPTION OF CHANGE OR Apr-07 JDB New Data Sheet