N08M1618L1A AMI | Alldatasheet

Document overview

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Technical content

Features

  • Dual voltage for Optimum Performance: Vccq - 2.3 to 3.6 Volts Vcc - 1.4 to 2.2 Volts
  • Very low standby current 0.5µA at 1.8V and 37 deg C
  • Very low operating current 1.0mA at 1.8V and 1µs (Typical)
  • Very low Page Mode operating current 0.5mA at 1.8V and 1µs (Typical)
  • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE ) for memory expansion
  • Low voltage data retention Vcc = 1.2V
  • Special Processing to reduce Soft Error Rate (SER)
  • Automatic power down to standby mode Pin Configuration Product Family Part Number Package Type Operating Temperature Power Supply Speed Standby Current (ISB), Max Operating Current (Icc), Max N08M1618L1AB 48 - BGA -40oC to +85oC 2.3V-3.6V(VCCQ) 1.4V-2.2V(VCC) 85ns @ 1.7V 150ns @ 1.4V 20 µA 2.5 mA @ 1MHz N08M1618L1AW Wafer 123456 A LB OE A0 A 1 A2 CE2 B I/O8 UB A3 A 4 CE1 I/O0 C I/O9 I/O 10 A 5 A 6 I/O 1 I/O 2 D VSS I/O11 A 17 A7 I/O3 VCC E VCCQ I/O12 NC A16 I/O4 VSS F I/O14 I/O13 A14 A15 I/O5 I/O6 G I/O15 NC A12 A13 WE I/O7 H A18 A8 A9 A10 A11 NC

48 Pin BGA (top)

CE1, CE2 Chip Enable Input OE Output Enable Input LB Lower Byte Enable Input UB Upper Byte Enable Input I/O0-I/O15 Data Inputs/Outputs VCC Power VSS Ground VCCQ Power I/O pins only NC Not Connected

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 2 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Functional Block Diagram Functional Description CE1 CE2 WE OE UB LB I/O0 - I/O15 1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. MODE POWER HXXXXX H i g h Z Standby2 2. When the device is in standby mode, control inputs (WE , OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. Standby XLXXXX H i g h Z Standby2 Standby XXXXHH H i g h Z Standby2 Standby LHL X3 3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. L1 L1 Data In Write3 Active -> Standby4 4. The device will consume active power in this mode whenever addresses are changed. Data inputs are internally isolated from any expernal influence. LHHL L1 L1 Data Out Read Active -> Standby4 LHHH L1 L1 High Z Active Standby4 Capacitance1 1. These parameters are verified in device characterization and are not 100% tested Item Symbol Test Condition Min Max Unit Input Capacitance CIN VIN = 0V, f = 1 MHz, TA = 25oC 8p F I/O Capacitance CI/O VIN = 0V, f = 1 MHz, TA = 25oC 8p F Address Inputs A0 - A3 Address Inputs A4 - A18 Word Address Decode Logic 32K Page x 16 word x 16 bit RAM Array Word Mux Input/ Output Mux and Buffers Page Address Decode Logic Control Logic CE1 CE2 WE OE UB LB I/O0 - I/O7 I/O8 - I/O15

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 3 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Absolute Maximum Ratings1 1. Stresses greater than those listed above may cause permanent dam age to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Item Symbol Rating Unit Voltage on any pin relative to VSS VIN,OUT –0.3 to VCC+0.3 V Voltage on VCC Supply Relative to VSS VCC –0.3 to 4.5 V Power Dissipation PD 500 mW Storage Temperature TSTG –40 to 125 oC Operating Temperature TA -40 to +85 oC Soldering Temperature and Time TSOLDER 240oC, 10sec(Lead only) oC Operating Characteristics (Over Specified Temperature Range) Item Symbol Test Conditions Min. Typ1 1. Typical values are measured at Vcc=Vcc Typ., T A=25°C and not 100% tested. Max Unit Core Supply Voltage VCC 1.4 1.8 2.2 V I/O Supply Voltage VCCQ VCCQ > or = VCC 2.3 3.6 V Data Retention Voltage VDR Chip Disabled3 1.2 V Input High Voltage VIH VCCQ-0.6 V CCQ+0.3 V Input Low Voltage VIL –0.3 0.6 V Output High Voltage VOH IOH = 0.2mA V CCQ–0.2 V Output Low Voltage VOL IOL = -0.2mA 0.2 V Input Leakage Current ILI VIN = 0 to VCC 0.1 µA Output Leakage Current ILO OE = VIH or Chip Disabled 0.1 µA Read/Write Operating Supply Current @ 1 µs Cycle Time2 2. This parameter is specified with the out puts disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. ICC1 VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 1.5 2.5 mA Read/Write Operating Supply Current @ 85 ns Cycle Time2 ICC2 VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 10.0 13.0 mA Page Mode Operating Supply Current @ 85 ns Cycle Time2 (Refer to Power Savings with Page Mode Operation diagram) ICC3 VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 3.5 mA Read/Write Quiescent Operating Sup- ply Current3 3. This device assumes a standby m ode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all inputs must be within 0.2 volts of either VCC or VSS. ICC4 VCC=2.2 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, f = 0 1 µA Standby Current3 ISB1 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 2.2 V 0.5 20.0 µA Data Retention Current3 IDR VCC = 1.2V, VIN = VCC or 0 Chip Disabled, tA= 85oC 0.1 1.0 µA

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 4 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Power Savings with Page Mode Operation (WE = VIH) Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature. The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs. Page Address (A4 - A18) OE CE1 CE2 Word Address (A0 - A3) Open page Word 1 Word 2 Word 16...

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 5 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Timing Test Conditions Item Input Pulse Level 0.1VCC to 0.9 VCC Input Rise and Fall Time 5ns Input and Output Timing Reference Levels 0.5 VCC Output Load CL = 30pF Operating Temperature -40 to +85 oC Timing VCCQ > or = VCC Item Symbol VCC = 1.4 - 2.2 V VCC = 1.7 - 2.2 V Units Min. Max. Min. Max. Read Cycle Time tRC 150 85 ns Address Access Time tAA 150 85 ns Address Access Time (Page Mode) tAAP 30 30 ns Chip Enable to Valid Output tCO 150 85 ns Output Enable to Valid Output tOE 50 40 ns Byte Select to Valid Output tLB, tUB 150 85 ns Chip Enable to Low-Z output tLZ 20 10 ns Output Enable to Low-Z Output tOLZ 20 5 ns Byte Select to Low-Z Output tLBZ, tUBZ 20 10 ns Chip Disable to High-Z Output tHZ 03 001 5 n s Output Disable to High-Z Output tOHZ 03 001 5 n s Byte Select Disable to High-Z Output tLBHZ, tUBHZ 03 001 5 n s Output Hold from Address Change tOH 20 10 ns Write Cycle Time tWC 150 85 ns Chip Enable to End of Write tCW 75 50 ns Address Valid to End of Write tAW 75 50 ns Byte Select to End of Write tLBW, tUBW 75 50 ns Write Pulse Width tWP 50 40 ns Address Setup Time tAS 00 n s Write Recovery Time tWR 00 n s Write to High-Z Output tWHZ 30 15 ns Data to Write Time Overlap tDW 50 40 ns Data Hold from Write Time tDH 00 ns End Write to Low-Z Output tOW 10 5 ns

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 6 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Timing of Read Cycle (CE1 = OE = VIL, WE = CE2 = VIH) Timing Waveform of Read Cycle (WE=VIH) Address Data Out tRC tAA tOH Data ValidPrevious Data Valid Address LB, UB OE Data Valid tRC tAA tCO tHZ(1,2) tOHZ(1) tLBHZ, tUBHZ tOLZ tOE tLZ(2) High-Z Data Out tLB, tUB tLBLZ, tUBLZ CE1 CE2

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 7 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Timing Waveform of Page Mode Read Cycle (WE = VIH) Page Address (A4 - A18) LB, UB OE tAA tCO tHZ tOHZ tLBHZ, tUBHZ tOLZ tOE High-Z Data Out tLB, tUB tLBLZ, tUBLZ CE1 CE2 Word Address (A0 - A3) tAAP tRC

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 8 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Timing Waveform of Write Cycle (WE control) Address Data In CE1 CE2 LB, UB Data Valid tWC tAW tCW tWR tWHZ tDH High-Z WE Data Out High-Z tOW tAS tWP tDW tLBW, tUBW

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 9 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Timing Waveform of Write Cycle (CE1 Control) Address WE Data Valid tWC tAW tCW tWR tDH LB, UB Data In High-Z tAS tWP tLZ tDW tLBW, tUBW Data Out tWHZ CE1 (for CE2 Control, use inverted signal)

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 10 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc. Ball Grid Array Package Dimensions (mm) DE e = 0.75 BALL MATRIX TYPESD SE J K SIDE VIEWTOP VIEW BOTTOM VIEW E D A1 BALL PAD CORNER (3) 1.10±0.10 0.20±0.05 0.15 0.05 Z Z 1. 0.30±0.05 DIA. 1. DIMENSION IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER. PARALLEL TO PRIMARY Z. 2. PRIMARY DATUM Z AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 3. A1 BALL PAD CORNER I.D. TO BE MARKED BY INK. 2. SEATING PLANE - Z SD SE e K TYP J TYP e A1 BALL PAD CORNER

Stock No. 23211-03 9/21/06 ADVANCE INFORMATION 11 The specifications of this device are subject to change without notice. For latest documentation see http://www.amis.com. N08M1618L1A Advance InformationAMI Semiconductor, Inc.

Ordering Information

© 2006 AMI Semiconductor, Inc. All rights reserved. AMI Semiconductor, Inc. ("AMIS") reserves the right to change or modify the information contained in this data sheet and the products described therein, without prior notice. AMIS does not convey any license under its patent rights nor the rights of others. Charts, drawings and schedules contained in this data sheet are provided for illustration pur- poses only and they vary depending upon specific applications. AMIS makes no warranty or guarantee regarding suitability of these products for any particular purpose, nor does AMIS assume any liability arising out of the application or use of any product or circuit described herein. AMIS does not authorize use of its products as critical components in any application in which the failure of the AMIS product may be expected to result in significant injury or death, including life support systems and critical medical instruments.

Revision History

Revision # Date Change Description 01 11/01/02 Initial Release 02 3/03/05 General Update: Updated ICC4 typical and ISB1 typical value Updated Block Diagram, Functional Description Table. Added tAAP, tLB, tUB, tLBZ, tUBZ, tLBHZ, tUBHZ, tLBW, tUBW timing parameters. Added Page Mode Read Timing Waveform Updated BGA 8X10 Package Drawing Updated VccQ range on DC Parameters Table 03 9/21/2006 Converted to AMI Semiconductor N08M1618L1AX-XX X I = Industrial, -40°C to 85°C 85 = 85ns @ 1.7V B = 48-ball BGA D = Known Good Die Temperature Performance Package Type