MSM85C154HVS OKI | Alldatasheet

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Technical content

MSM85C154HVS¡ Semiconductor GENERAL DESCRIPTION The MSM85C154HVS is an 8-bit microcontroller that has been developed assuming that it is used for evaluation of programs of MSM83C154S. ES (Engineering Sample) only.

FEATURES

  • Operating range Operating frequency : 1 to 22 MHz (16 to 22 MHz is recommended for program development) Operating voltage : 4.75 to 5.25 V (Use MSM85C154VS for 1 to 16 MHz) Operating temperature : Room temperature
  • Fully static circuit
  • On-chip program memory : 16K · 8-bit ROM (EPROM)
  • On-chip data memory : 256 · 8-bit RAM
  • External program memory address space : 64 Kbytes
  • External data memory address space : 64 Kbytes
  • I/O port (Port 1, 2, 3, impedance programmable) : 4 ports · 8 bits
  • 16-bit timer/counters : 3
  • Multifunctional serial port : I/O Expansion mode : UART mode (featuring error detection)
  • 6-source 2-priority level Interrupt and multi-level Interrupt available by programming IP and IE registers
  • Memory-mapped special function registers
  • Bit addressable data memory and SFRs
  • Minimum instruction cycle : 545 ns @ 22 MHz operation
  • "Multiply"/"divide" instruction cycle : 2.18 ms @ 22 MHz operation
  • Standby functions : Power-down mode (oscillator stop) Activated by software or hardware; provid- ing ports with floating or active status The software power-down stet mode is ter- minated by interrupt signal enabling execu- tion from the interrupted address.
  • Package 40-pin ceramic Piggyback (ADIP40-C-600-2.54) (Product name: MSM85C154HVS) ¡ Semiconductor MSM85C154HVS MSM83C154S Piggy Back E2E1024-27-Y4 This version: Jan. 1998 Previous version: Nov. 1996

MSM85C154HVS¡ Semiconductor BLOCK DIAGRAM PCH CONTROL SIGNAL SPECIAL FUNCTION REGISTER ADDRESS DECODER PLA IR AIR C-ROM TR1TR2ACC ALU BRPSW RAMDP R/W AMP 256 words

  • 8 bits TH2TL2 RCAP2H RCAP2L T2CON DPH PCL SP EPROM 16K words · 8 bits D0-7 DPL PCLLPCHL PORT 2 PORT 0 PCON IOCON OSC AND TIMING PORT 1 PORT 3 P2.0 P2.7 P0.0 P0.7 P1.0 P1.7 P3.0 P3.7 XTAL1 XTAL2 ALE RESET PSEN EA TH1 TL1 TH0 TL0 TMOD TCON IE IP SBUF(T) SBUF(R) INTERRUPTTIMER/COUNTER 0 & 1 SERIAL IO SCON SIGNALR/W TIMER/ COUNTER 2 A0-A13 SOCKET

MSM85C154HVS¡ Semiconductor PIN CONFIGURATION (TOP VIEW) V SS P1.0/T2 P1.1/T2EX P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RESET P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1/HPDI P3.6/WR P3.7/RD XTAL2 XTAL1 P2.0 V CC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 EA ALE PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 VCCVPP (VCC) (VCC) PGMA12 A13A7 A8A6 A9A5 A11A4 VSS (OE)A3 A10A2 CEA1 O7A0 O6O0 O5O1 O4O2 O3GND (VSS) 0.46±0.10 2.54 2.54MIN 7.6MAX 0.95MIN f 0.25 M 40-Pin Package (Piggy back)

MSM85C154HVS¡ Semiconductor ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit Power Supply Voltage Input Voltage Storage Temperature V CC Ta=25°C –0.5 to 7 V VI Ta=25°C –0.5 to V CC+0.5 V TSTG — –55 to +150 °C RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Range Unit Power Supply Voltage Oscillation Frequency VCC See below. 4.75 to 5.25 V VOSC See below. 1 to 22 MHz External Clock Operating Frequency Ambient Temperature fEXTCLK See below. 0 to 22 MHz Ta — room temp °C *1 Depends on the specification for crystal or ceramic resonator. 0.545 23456 Power Supply Voltage VCC (V) 2.2 0.6 tCY (ms) fOSC fEXTCLK (MHz) 4.75 5.25

MSM85C154HVS¡ Semiconductor

ELECTRICAL CHARACTERISTICS

0.2 VCC–0.1 Parameter Symbol Condition Min. Typ. Max. Unit Input Low Voltage V IL — –0.5 — V VCC+0.5Input High Voltage V IH Except XTAL1, EA, 0.2 VCC+0.9 — Vand RESET VCC+0.5Input High Voltage V IH1 XTAL1, RESET and EA 0.7 VCC —V 0.45 Output Low Voltage VOL IOL=1.6 mA — — V(PORT 1, 2, 3) 0.45 Output Low Voltage VOL1 IOL=3.2 mA — — V(PORT 0, ALE, PSEN) —Output High Voltage VOH IOH=–60 mA 2.4 — V (PORT 1, 2, 3) VCC=5 V±10% —IOH=–30 mA 0.75 V CC —V —IOH=–10 mA 0.9 V CC —V —Output High Voltage VOH1 IOH=–400 mA 2.4 — V (PORT 0, ALE, PSEN) VCC=5 V±10% —IOH=–150 mA 0.75 V CC —V —IOH=–40 mA 0.9 V CC —V –80 Logical 0 Input Current/ Logical 1 Output Current/ (PORT 1, 2, 3) I IL / IOH VI=0.45V –5 –60 mAVO=0.45V –500 Logical 1 to 0 Transition ITL VIL=2.0V — –240 mACurrent (PORT 1, 2, 3) 125RESET Pulldown Resistor R RST —2 0 4 0 k W/CR 10Pin Capacitance C IO Ta=25°C, f=1 MHz —— p F(except XTAL1) 50Power Down Current I PD —— 1 mA 3±10 Input Leakage Current ILI VSS < VI < VCC —— mA(PORT 0 floating, EA) (VCC=4.75 to 5.25V, VSS=0V, Ta=room temp)

MSM85C154HVS¡ Semiconductor Maximum power supply current normal operation I CC (mA) VCC 4.75V 5V 5.25V Freq 2.2 3.1 4.11 MHz 3.9 5.2 7.03 MHz 15.0 16.0 17.012 MHz 19.0 20.0 22.016 MHz 25.0 27.0 29.022 MHz Maximum power supply current idle mode I CC (mA) VCC 4.75V 5V 5.25V Freq 0.8 1.2 1.61 MHz 1.2 1.7 2.33 MHz 4.1 4.4 4.812 MHz 5.1 5.5 6.016 MHz 6.5 7.0 7.522 MHz Note: The values of Power-down current, operating current, and IDLE current do not include the current dissipated by EPROM.

MSM85C154HVS¡ Semiconductor VCC VSS INPUT OUTPUT VIH VIL (*2) V A IO VCC VSS INPUT OUTPUT (*1) V VCC VSS INPUT OUTPUT VIH VIL (*2) V A (*3) VCC VSS INPUT OUTPUT VIH VIL A A (*3) (*3) Measuring circuits *1: Repeated for specified input pins. *2: Repeated for specified output pins. *3: Input logic for specified status.

MSM85C154HVS¡ Semiconductor AC Characteristics External program memory access AC characteristics Parameter Symble Unit Min. Max. 1 to 22 MHz Variable clock from 45.5 1000 nstCLCLXTAL1, XTAL 2 Oscillation Cycle 2tCLCL-40 — nstLHLLALE Signal Width 1tCLCL-15 — nstAVLL Address Setup Time (to ALE Falling Edge) 1tCLCL-35 — nstLLAX Address Hold Time (from ALE Falling Edge) —4 t CLCL-100 nstLLPL Instruction Data Read Time (from ALE Falling Edge) 1tCLCL-30 — nstLLPL From ALE Falling Edge to PSEN Falling Edge 3tCLCL-35 — nstPLPHPSEN Signal Width —3 t CLCL-45 nstPLIV Instruction Data Read Time (from PSEN Falling Edge) 0— n stPXIX Instruction Data Hold Time (from PSEN Rising Edge) —1 t CLCL-20 nstPXIZ Bus Floating Time after Instruction Data Read (from PSEN Rising Edge) —5 t CLCL-105 nstAVIV Instruction Data Read Time (from Address Output) 0— n stAZPL Bus Floating Time(PSEN Rising Edge from Address float) 1tCLCL-20 — nstPXAV Address Output Time from PSEN Rising Edge VCC = 4.75 to 5.25V, VSS = 0V, Ta = room temp PORT 0, ALE, and PSEN connected with 100 pF load, other connected with 80 pF load *1 The variable check is from 0 to 22 MHz when the external check is used.

MSM85C154HVS¡ Semiconductor tLHLL tAVLL tLLPL tPLPH tLLIV tPLIV tPXAV tPXIZ tLLAX tAZPL tAVIV tPXIX A0 to A7 INSTR IN A0 to A7PORT0 PORT2 A8 to A15 A8 to A15 A8 to A15 PSEN ALE External program memory read cycle

MSM85C154HVS¡ Semiconductor External data memory access AC characteristics Parameter Symble Unit Min. Max. 1 to 22 MHz Variable clock from 45.5 1000 nstCLCLXTAL1, XTAL2 Oscillator Cycle 2tCLCL-40 — nstLHLLALE Signal Width 1tCLCL-15 — nstAVLL Address Setup Time (to ALE Falling Edge) 1tCLCL-35 — nstLLAX Address Hold Time (from ALE Falling Edge) 6tCLCL-100 — nstRLRLRD Signal Width 6tCLCL-100 — nstWLWHWR Signal Width —5 t CLCL-105 nstRLDV RAM Data Read Time (from RD Signal Falling Edge) 0— n stRHDX RAM Data Read Hold Time (from RD Signal Rising Edge) —2 t CLCL-70 nstRHDZ Data Bus Floating Time (from RD Signal Rising Edge) —8 t CLCL-100 nstLLDV RAM Data Read Time (from ALE Signal Falling Edge) —9 t CLCL-105 nstAVDV RAM Data Read Time (from Address Output) 3tCLCL-40 3t CLCL+40 nstLLWL RD/WR Output Time from ALE Falling Edge 4tCLCL-70 — nstAVWL RD/WR Output Time from Address Output 2tCLCL-40 — nstQVWXWR Output Time from Data Output 7tCLCL-105 — nstQVWHTime from Data to WR Rising Edge 2tCLCL-50 — nstWHQX Data Hold Time (from WR Rising Edge) 0— n stRLAZ Time from to Address Float RD Output 1tCLCL-30 1t CLCL+40 nstWHLH Time from RD/WR Rising Edge to ALE Rising Edge VCC = 4.75 to 5.25V, VSS = 0V, Ta = room temp PORT 0, ALE, and PSEN connected with 100 pF load, other connected with 80 pF load *1 The variable check is from 0 to 22 MHz when the external check is used.

MSM85C154HVS¡ Semiconductor tLHLL tWHLH tLLDV tLLWL tRLRH tAVLL tLLAX tRLDV tRHDX tRHDZ tAVWL tAVDV PCH A8 to A15 PCH P2.0 to P2.7 DATA A8 to A15 DPH or A8 to A15 PCH A0 to A7 PCL A0 to A7 Rr or DPL A0 to A7 PCL INSTR IN ALE PSEN RD PORT 0 PORT 2 DATA IN tAZRL tLHLL tWHLH tLLWL tWLWH tAVLL tLLAX tQVWH tWHQX tAVWL A8 to A15 PCH P2.0 to P2.7 DATA A8 to A15 DPHor A8 to A15 PCH A0 to A7 PCL A0 to A7 Rr or DPLA0 to A7 PCL INSTR IN ALE PSEN WR PORT 0 PORT 2 DATA (ACC) A8 to A15 PCH tQVWX External data memory read cycle External data memory write cycle

MSM85C154HVS¡ Semiconductor Serial port (I/O extension mode) AC characteristics Parameter Symbol Min. Max. Unit Serial Port Clock Cycle Time t XLXL 12tCLCL —n s Output Data Setup to Clock Rising Edge t QVXH 10tCLCL-133 — Output Data Hold After Clock Rising Edge t XHQX 2tCLCL-75 — Input Data Hold After Clock Rising Edge t XHDX 0— Clock Rising Edge to Input Data Valid t XHDV — 10t CLCL-133 ns ns ns ns CC = 4.75 to 5.25V, VSS = 0V, Ta = room temp)

MSM85C154HVS¡ Semiconductor tXLXL tQVXH tXHQX tXHDV tXHDX VALID VALID VALID VALID VALID VALID VALID VALID MACHINE CYCLE ALE SHIFT CLOCK OUTPUT DATA INPUT DATA

MSM85C154HVS¡ Semiconductor VOH VOL VOH VOL VIH VIL VIH VIL TEST POINT VOH VOL VOH VOL VIH VIL VIH VIL Floating Parameter Symbol Min. Max. Unit External Clock Freq. 1/t CLCL 0 22 MHz Clock Pulse width 1 t CHCx 15 — Clock Pulse width 2 t CLCX 15 — Rise Time t CLCH —5 Fall Time t CHCL —5 ns ns ns ns 0.7VCC 0.2VCC - 0.10.45 V VCC - 0.5 tCHCL tCLCH tCLCX tCLCL tCHCX NC EXTERNAL OSCILLATOR SIGNAL VSS XTAL1 XTAL2 AC characteristics measuring conditions 1.Input/output signal * The input signals in AC test mode are either V OH (logic "1") or VOL (logic "0") input signals where logic "1" corresponds to a CPU output signal waveform measuring point in excess of V IH, and logic "0" to a point below VIL. 2.Floating * The port 0 floating interval is measured from the time the port 0 pin voltage drops below VIH after sinking to GND at 2.4 mA when switching to floating status from a "1" output, and from the time the port 0 pin voltage exceeds VIL after connecting to a 400 mA source when switching to floating status from a "0" output. XTAL1 external clock input waveform conditions External clock drive waveform

MSM85C154HVS¡ Semiconductor (Unit : mm) PACKAGE DIMENSIONS Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ADIP40-C-600-2.54