MSM6585RS

MSM6585 OKI | Alldatasheet

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Technical content

Issue Date: Aug. 25, 2004 MSM6585 ADPCM Voice Synthesis IC GENERAL DESCRIPTION The MSM6585 is an version-up product of the MSM5205 voice synthesis IC. Mainly improved points are improvement for the precision of an internal DA converter, a built-in low-pass filter, and expansion on the sampling frequency. The MSM6585 does not include a control circuit to drive an external memory similar to the MSM5205. Therefore, the MSM6585 can be connected with not only semiconductor memories, but other memory media (CD-ROM, etc.) by the control of CPU.

FEATURES

• 4-bit ADPCM method
• Built-in 12-bit DA converter
• Built-in low-pass filter (LPF) (–40dB/oct)
• Sampling frequencies: 4k/8k/16k/32kHz
• Master clock frequency (ceramic oscillator) : 640kHz
• Voice data synthesis: Supported by voice analysis editing tool AR207
• Package options: 18-pin plastic DIP (DIP18-P-300-2.54) (MSM6585RS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (MSM6585MAZXXX) 30-pin plastic SSOP (SSOP30-P-56-0.65-K) (MSM6585MBZXXX) DIFFERENCES BETWEEN MSM6585 AND MSM5205 MSM6585 MSM5205
• Master clock frequency: 640kHz 384kHz
• Sampling frequency: 4k/8k/16k/32kHz 4k/6k/8kHz
• ADPCM bit length: 4-bit 3-bit/4-bit
• DA Converter: 12-bit 10-bit
• Low-pass filter: Included (–40dB/oct) Not included
• Overflow preventing circuit: Included Not included
• Power supply voltage: 4.5 to 5.5V 3.0 to 6.0V
• Operating current consumption: 10mA 4mA
• Operating temperature: –40 to +85°C –30 to +70°C
• D3 to D0 input timing VCK (O) D3 - D0 input timing ADPCM Data MSM6585 MSM5205

¡ Semiconductor M S M 6 5 8 5 B L O C K D IA G R A M D 3 D 2 D 1 D 0 A O UT D A O VD D GND 4-Bit LA TC H A D P C M S yn thesizer 12 -Bit D A C LP F O S C Tim in g C on troller TES T C IRC UIT XT XT S 1 S 2 RES ET V C K

¡ Semiconductor M S M 6 5 8 5 P IN C O N F IG U R A T IO N (T O P VIE W ) 18 -P in P lastic D IP S 1 S 2 D 0 D 1 D 2 D 3 GND VD D XT XT RES ET V C K D A O A O UT S 1 S 2 NC D 0 NC D 1 D 2 NC D 3 GND VD D XT XT NC RES ET NC V C K NC D A O A O UT 2 4 2 3 2 2 2 1 2 0 NC : No con n ection 2 4-P in P lastic S O P S 1 S 2 NC NC NC D 0 D 1 D 2 D 3 NC NC VD D XT NC NC NC XT RES ET V C K NC NC 3 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 NC : No con n ection 30 -P in P lastic S S O P NC GND NC D A O A O UT

¡ Semiconductor M S M 6 5 8 5 P IN D E S C R IP T IO N S ymbol T ype D escription S 1 I P in s to determ in e the sa m p lin g frequ en cy. The sa m p lin g frequ en cies of 3 2 k, 16 k, 8 k, a n d 4kHz ca n be selected by com bin a tion s. (S ee the sa m p lin g frequ en cies in FUNC TIO NA L D ES C RIP TIO N on the selection of com bin a tion s.) I P in to test the in tern a l circu it. S et this p in to a hig h level or m a ke it op en beca u se it ha s a bu ilt-in p u ll-u p resistor. D 0 -D 3 I In p u t p in s for A D P C M da ta . O P in to test the in tern a l circu it. M a ke this p in op en . GND Grou n d p in A O UT O P in to ou tp u t the a n a log voice from the low-p a ss filter. C on n ect a 0 .0 1 mF ca p a citor to this p in . (S ee the A O UT con n ectin g circu it in FUNC TIO NA L D ES C RIP TIO N on the con n ectin g circu it.) D A O O P in to ou tp u t the a n a log voice from the D A con verter. I P in s to test the in tern a l circu it. S et these p in s to a low level or m a ke them op en beca u se p u ll-down resistors a re in clu ded. V C K O This p in ou tp u ts the sa m p lin g frequ en cy selected by the com bin a tion s of S 1 a n d S 2 . The voice syn thesis sta rts or stop s by syn chron izin g with V C K . RES ET I Reset p in . The voice syn thesis circu it is in itia lized by syn chron izin g with V C K . If this p in is set to a hig h level, the D 0 to D 3 da ta in p u ts a re disa bled by syn chron izin g with V C K . The A O UT a n d D A 0 p in s ou tp u t 1/2 VD D a n d becom e the sta te of n o voice. XT I P in to con n ect a n oscilla tor. When the extern a l clock is u sed, in p u t it from this p in . XT O P in to con n ect a n oscilla tor. When the extern a l clock is u sed, m a ke this p in op en . VD D P ower su p p ly p in . In sert a byp a ss ca p a citor of 0 .1 mF or m ore between this p in a n d the GND p in . D IP S O P S S O P S 2 4-7 5 , 7, 8 , 10 7-10 2 1 2 2 2 3 2 0 2 4 2 2 2 5 2 3 2 9 2 4 3 0 P in P in to test the in tern a l circu it. M a ke this p in op en .

¡ Semiconductor M S M 6 5 8 5 A B S O L U T E M A XIM U M R A T IN G S C ondition Ta = 2 5 °C Ta = 2 5 °C R ating –0 .3 to +7.0 –0 .3 to VD D +0 .3 –5 5 to +15 0 U nit V V S ymbol VD D VIN TS TG P arameter P ower S u p p ly Volta g e In p u t Volta g e S tora g e Tem p era tu re (GND =0 V) R E C O M M E N D E D O P E R A T IN G C O N D IT IO N S E L E C T R IC A L C HA R A C T E R IS T IC S D C C haracteristics M in. 0 .8 ¥VD D –0 .1 VD D –0 .4 2 0 –40 0 –10 –2 0 5 0 T yp. 15 0 –12 0 M ax. VD D +0 .1 0 .2 ¥VD D 0 .4 40 0 2 0 –2 0 "H" In p u t Volta g e C ondition U nit V V V V mA mA mA mA mA mA m A m V kW kW S ymbol VC K: IO H = –40 mA VC K: IO L = 40 mA T1, T2 , RES ET: VIH = VD D S 1, S 2 , D 0 - D 3 , T3 : VIH = VD D XT: VIH = VD D T3 : VIL = 0 V S 1, S 2 , D 0 - D 3 , T1, T2 , RES ET: VIL=0 V XT=VIL=0 V fosc=6 40 kHz, No loa d No loa d P arameter "L" In p u t Volta g e "H" O u tp u t Volta g e "L" O u tp u t Volta g e "H" In p u t C u rren t "H" In p u t C u rren t "H" In p u t C u rren t "L" In p u t C u rren t "L" In p u t C u rren t "L" In p u t C u rren t C u rren t C on su m p tion D A O u tp u t Rela tive Error D A O u tp u t Im p eda n ce LP F Loa d Resista n ce VIH VIL VO H VO L IIH1 IIH2 IIH3 IIL1 IIL2 IIL3 ID D | VD A E | RD A O RA O UT (VD D =4.5 to 5 .5 V, GND =0 V, Ta =–40 to +8 5 °C ) C ondition R ange U nit S ymbol P arameter P ower S u p p ly Volta g e O p era tin g Tem p era tu re M a ster C lock Frequ en cy 4.5 to 5 .5 V VD D –40 to +8 5 Top oscilla tor con n ection 6 40 kHz fO S C (GND = 0 V)

¡ Semiconductor M S M 6 5 8 5 A C C haracteristics M in. T yp. M ax. P arameter U nit S ymbol C ondition tVC K = 2 5 0 ms = 12 5 ms = 6 2 .5 ms =3 1.2 5 ms fS A M = 4kHz ... = 8 kHz ... =16 kHz ... =3 2 kHz ... O rig in a l O scilla tion D u ty C ycle RES ET In p u t P u lse Width D a ta S etu p Tim e D a ta Hold Tim e tW(RS T) tS tH fdu ty 2 ¥tVC K tVC K/2 ms ms ms 5 0 6 0 Wh e n d a ta is sh a re d w ith th e M S M 5 2 0 5 , n o te th a t th e D 3 to D 0 se le c tio n tim in g s o f th e M S M 6 5 8 5 a n d M S M 5 2 0 5 a re d iffe re n t. (R e fe r to D IF F ER EN C ES B ET WEEN M S M 6 5 8 5 A N D M S M 5 2 0 5 .) T IM IN G D IA G R A M T h e VCK clo ck risin g a n d fa llin g e d g e s a re re v e rse d b e tw e e n th e M S M 5 2 0 5 a n d th e M S M 6 5 8 8 , a s in d ic a te d in D IF F ER EN C ES B ET WEEN M S M 6 5 8 5 A N D M S M 5 2 0 5 . N o te th a t th e M S M 6 5 8 5 ca n n o t a cce p t d a ta if th e M S M 5 2 0 5 co n tro ls to re p e a t v a lid a n d in v a lid e a ch h a lf c y c le , w h e n th e M S M 5 2 0 5 is re p la c e d w ith th e M S M 6 5 8 5 . tVC K tW(RS T) tH tS tVC K/8 V C K (O ) RES ET (I) D 3 - D 0 (I) IC in tern a lD 3 - D 0 selection tim in g s A O UT, D A O (O ) A D P C M 1 A D P C M 2 A D P C M N A D P C M N+1

¡ Semiconductor M S M 6 5 8 5 F U N C T IO N A L D E S C R IP T IO N 1 . S a m p lin g F re q u e n c y T h e re la tio n sh ip o f th e sa m p lin g fre q u e n c ie s o n S 1 a n d S 2 , a n d th e c u to ff fre q u e n c ie s a re liste d b e lo w . C utoff frequency (fC U T ) 1.6 kHz 3 .2 kHz 6 .4 kHz 12 .8 kHz S ampling frequency (fS A M ) 4 kHz 8 kHz 16 kHz 3 2 kHz S 2 L L H H S 1 L H L H 2 . A O U T C o n n e c tin g C irc u it C o n n e c t a 0 .0 1 mF c a p a c ito r to th e A O U T p in . T h e c irc u it d ia g ra m is a s sh o w n b e lo w . A O UT 0 .0 1mF M S M 6 5 8 5 A m p lifier S p ea ker Ev e n w h e n th e D A O p in is u se d , co n n e ct a 0 .0 1 mF ca p a cito r to th e A O U T p in . T h is ca p a cito r is u se d fo r th e im p ro v e m e n t o f a v o ic e q u a lity . 3 . V o ic e O u tp u t T h e M S M 6 5 8 5 h a s tw o v o ic e o u tp u t p in s. T h e D A O is d ire c t o u tp u t p in fro m th e in te rn a l D A co n v e rte r. T h e A O U T is a p in to o u tp u t a v o ice a fte r w h ich th e D A O o u tp u t p a sse d a b u ilt-in L P F . 3 .1 D A C o n v e rte r O u tp u t Wa v e fo rm T h e o u tp u t a m p litu d e fro m th e D A co n v e rte r is m a x . (4 0 95 / 4 0 96 ) ¥ V D D a n d b e co m e s a sta ir ste p w a v e fo rm sy n ch ro n iz e d w ith th e sa m p lin g fre q u e n cy . T h e D A O o u tp u t im p e d a n ce v a rie s in th e ra n g e s fro m 1 0 k W to 4 0 k W. T h e re fo re , d e te rm in e th e filte r co n sta n t so th a t th e re sisto r v a ria tio n d o e s n o t h a v e in flu e n c e o n th e c u to ff fre q u e n c y o f th e filte r.

¡ Semiconductor M S M 6 5 8 5 3 .2 L o w -p a ss F ilte r O u tp u t T h e cu to ff fre q u e n cy o f th e lo w -p a ss filte r v a rie s in p ro p o rtio n to th e sa m p lin g fre q u e n cy . T h e fo llo w in g fig u re sh o w s th e lo w -p a ss filte r c h a ra c te ristic s in th e sa m p lin g fre q u e n c y 8 k H z . 4 . O sc illa tio n F o llo w in g sh o w e x te rn a l c irc u it d ia g ra m s u sin g a c e ra m ic re so n a to r, KB R -6 4 0 B m a d e b y Ky o c e ra C o rp . a n d C S B 6 4 0 P m a d e b y M u ra ta M F G. C o ., L td . –2 0 –40 –6 0 10 0 10 k Frequ en cy (Hz) D a m p in g fa ctor (dB) XT XT 6 40 kHz 2 2 0 p F M S M 6 5 8 5 2 2 0 p F Kyocera C orp . KBR-6 40 B u sed XT XT 6 40 kHz 10 0 p F M S M 6 5 8 5 10 0 p F M u ra ta M FG. C orp . C S B6 40 P u sed 1M W

¡ Semiconductor M S M 6 5 8 5 A P P L IC A T IO N C IR C U IT S C entronics Interface C ircuit (sampling frequency : 8 kHz) BUS Y S TRO BE RES ET D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 0 .1mF S 1 A O UT 6 40 kHz D 1 D 0 0 .0 1mF A M P M S M 6 5 8 5 A D P C M D EC O D ER M S M 40 13 M S M 40 19 +5 V 0 .1mF 0 .1mF VD D D A O XT XT D 2 D 3 RES ET V C K S 2 GND C entronics T iming C hart RES ET RES D A TA S TRO BE V C K KA KB BUS Y M IN2 5 0 msec 12 5 msec First byte Hig h n ibble Low n ibble

¡ Semiconductor M S M 6 5 8 5 E xample of Interface C ircuit with 2 5 6 K-bit E P R O M T h e c irc u it e x a m p le a n d tim in g d ia g ra m th a t u se d th e 2 5 6 K-b it EP R O M a re sh o w n b e lo w . M S M 2 72 5 6 C E A 0 - A 10 A 11 A 12 A 13 A 14 O 0 O 4 O 1 O 5 O 2 O 6 O 3 O 7 O 0 - O 11 O 12 C L B1 A 1 RES ET A 2 B3 A 3 A 4 KB M S M 40 19 KA D 1 D 2 D 3 D 4 S 1 D 2 C L1 C L2 M S M 40 13 R1D 1S 2 Q1R2 D 0 D 1 D 2 D 3 XT XT M S M 6 5 8 5 RES ET S 2 S 1 A O UT 6 40 kHz 0 .0 1mF 10 0 kW M S M 40 40 RES ET S TA RT S W 10 kW 0 .1mF 10 0 kW (M S M 40 2 5 ) M 6 5 8 5 V C K (O ) S TA RT S W M 40 13 S 1 M 40 13 Q1 M 40 13 Q2 M 40 40 Q1 Q12 M 40 40 Q3 C L (M 6 5 8 5 RES ET) (Lower 4-bit) (Up p er 4-bit) V C K MSM4040

¡ Semiconductor M S M 6 5 8 5 P A D C O N F IG U R A T IO N P ad L ayout P ro d u c t n a m e M S M 6 5 8 5 F u n c tio n A D P C M v o ic e sy n th e sis IC D ie siz e ¥ = 2 .92 m m , Y = 3 .5 8 m m D ie th ic k n e ss 3 5 0 µm ±3 0 µm P a d siz e 1 3 0 µm ¥ 1 3 0 µm S u b stra te v o lta g e GN D Y X 2 0 P ad C oordiantes (T h e d ie c e n te r is lo c a te d a t X=0 , Y=0 ) P A D N o. P A D N ame X-axis Y-axis P A D N o. P A D N ame X-axis Y-axis S 1 3 77 –16 3 5 A O UT 3 8 16 3 5 S 2 8 19 –16 3 5 D A O –112 5 16 3 5 13 0 5 –16 3 5 –13 0 5 15 79 D 0 13 0 5 –943 –13 0 5 10 0 9 D 1 13 0 5 V C K –13 0 5 –8 8 D 2 13 0 5 10 95 RES ET –13 0 5 –8 18 D 3 13 0 5 16 3 5 XT –12 8 1 –16 3 5 8 3 0 16 3 5 XT –5 2 9 –16 3 5 A VS S 447 15 8 0 VD D –2 99 –15 49 (Un it: mm ) VS S 2 6 7 15 8 0 2 0 A VD D –119 –15 49

¡ Semiconductor M S M 6 5 8 5 (Unit : mm) P A C KA G E D IM E N S IO N S D IP 18 -P -3 0 0 -2 .5 4 P a cka g e m a teria l Lea d fra m e m a teria l P in trea tm en t S older p la te thickn ess P a cka g e weig ht (g ) Ep oxy resin 42 a lloy S older p la tin g 5 mm or m ore 1.3 0 TYP .

¡ Semiconductor M S M 6 5 8 5 (Unit : mm) N o te s fo r M o u n tin g th e S u rfa c e M o u n t T y p e P a c k a g e T h e S O P , QF P , T S O P , T QF P , L QF P , S O J, QF J (P L C C ), S H P , a n d B GA a re su rfa c e m o u n t ty p e p a c k a g e s, w h ic h a re v e ry su sc e p tib le to h e a t in re flo w m o u n tin g a n d h u m id ity a b so rb e d in sto ra g e . T h e re fo re , b e fo re y o u p e rfo rm re flo w m o u n tin g , c o n ta c t O k i’s re sp o n sib le sa le s p e rso n o n th e p ro d u c t n a m e , p a c k a g e n a m e , p in n u m b e r, p a c k a g e c o d e a n d d e sire d m o u n tin g c o n d itio n s (re flo w m e th o d , te m p e ra tu re a n d tim e s). S O P 2 4-P -43 0 -1.2 7-K P a cka g e m a teria l Lea d fra m e m a teria l P in trea tm en t S older p la te thickn ess P a cka g e weig ht (g ) Ep oxy resin 42 a lloy S older p la tin g 5 mm or m ore 0 .5 8 TYP . M irror fin ish

¡ Semiconductor M S M 6 5 8 5 (Unit : mm) N o te s fo r M o u n tin g th e S u rfa c e M o u n t T y p e P a c k a g e T h e S O P , QF P , T S O P , T QF P , L QF P , S O J, QF J (P L C C ), S H P , a n d B GA a re su rfa c e m o u n t ty p e p a c k a g e s, w h ic h a re v e ry su sc e p tib le to h e a t in re flo w m o u n tin g a n d h u m id ity a b so rb e d in sto ra g e . T h e re fo re , b e fo re y o u p e rfo rm re flo w m o u n tin g , c o n ta c t O k i’s re sp o n sib le sa le s p e rso n o n th e p ro d u c t n a m e , p a c k a g e n a m e , p in n u m b e r, p a c k a g e c o d e a n d d e sire d m o u n tin g c o n d itio n s (re flo w m e th o d , te m p e ra tu re a n d tim e s). S S O P 3 0 -P -5 6 -0 .6 5 -K P a cka g e m a teria l Lea d fra m e m a teria l P in trea tm en t S older p la te thickn ess P a cka g e weig ht (g ) Ep oxy resin 42 a lloy S older p la tin g 5 mm or m ore 0 .19 TYP . M irror fin ish

REVISION HISTORY

No. Date Previous Edition Current Edition

Description

Sep. 1999 Final edition 1 Final edition 2 Changed the voice analysis editing tools from AR203 and AR204 to AR207. FEDL6585-02 Jun. 30, 2004 Changed the package product names from MSM6585GS-K and MSM6585GS-AK to MSM6585MAZXXX and MSM6585MBZXXX, respectively. FEDL6585-03 Aug. 25, 2004 Changed the product name of the circuit block in the upper-left portion of the block diagram from MSM4013 to MSM4040.

The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd.