MSM6351

MSM6351 OKI | Alldatasheet

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Technical content

¡ Semiconductor GENERAL DESCRIPTION The MSM6351/6351L is a low-power microcontroller manufactured in silicon gate CMOS technology. Integrated into a single chip are ROM, RAM, five I/O ports, serial I/O port, time- base counter, LCD driver, three interrupts, crystal oscillator, and voltage tripler. The MSM6351/6351L, which can drive LCD display with higher-count segments, is best suited to battery powered applications, such as watches and game machines. The built-in 8-bit or 5-bit serial port provides a data communication capability with external machines.

FEATURES

• Low power consumption
• Large capacity memory
• ROM : 4096 words ¥ 15 bits
• RAM : 1024 words ¥ 4 bits
• I/O port Input-output port : 5 ports ¥ 4 bits (input or output can be specified for each port)
• 62 LCD drivers (1/3 duty or 1/4 duty is selectable. Up to 232 segments can be displayed)
• Single 1.5 V power supply operation (MSM6351) Can be changed to 3.0 V specification by mask option (MSM6351L).
• Melody function
• Built-in watchdog timer
• Built-in 8-bit or 5-bit serial port (asynchronous or synchronous selectable)
• 32.768 kHz crystal oscillator
• Package options: 100-pin plastic QFP (QFP100-P-1420-0.65-K) (Product name :MSM6351-¥¥GS-K/ MSM6351L-¥¥GS-K) 100-pin plastic QFP (QFP100-P-1420-0.65-L) (Product name :MSM6351-¥¥GS-L/ MSM6351L-¥¥GS-L) 100-pin plastic QFP (QFP100-P-1420-0.65-BK) (Product name :MSM6351-¥¥GS-BK/ MSM6351L-¥¥GS-BK) Chip ¥¥ indicates a code number. ¡ Semiconductor MSM6351/6351L Built-in 8 or 5 bit Serial Port and LCD Driver 4-Bit Microcontroller E2E0010-38-94 This version: Sep. 1998 Previous version: Mar. 1996

¡ Semiconductor BLOCK DIAGRAM DATA RAM 1024¥4Bits BANK PAGE WORK TEMP0 LCD CT P0.0 P0.1 P0.2 P0.3 P1.0 P1.1 P1.2 P1.3 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 P3.3 P4.0 P4.1 P4.2 P4.3 XTOUT XT XT RESET TEST1 TEST2 TEST3 SCLK ACC ALU FLAG SERIAL I/O SCNT SCND SBFF u SBFF l D-Bus P00C P01C P02C P03C P1¥C P2¥C P3¥C P4¥C IEXM2 IEXM1 IEXM0 IRQRT EIRT IRQEX INTERRUPT CONTROL FRMT ADDER STACK PROGRAM COUNTER(PC) INSTRUCTION DECODER INSTRUCTION REGISTER PROGRAM ROM 4096¥15Bits P2.0 to P23 WATCH- DOG TIMER WDOG1 WDOG0 TMOUT TIME BASE COUNTER SYSTEM CLOCK GENERATOR OSC PORT4 PORT3 PORT2 PORT1 PORT0 SOUT SIN VDD VSS1 VSS2 VOLTAGE REGURATOR CONVERTER VCM VCP VEE CAPF CAP0 CAP1 LCD DRIVER MELODY MDTH MDTL MPX S-Bus A-Bus VSS3 BD SEG0 SEG1 SEG2 SEG3 SEG61

¡ Semiconductor PIN CONFIGURATION (TOP VIEW) SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG31 SCLK SIN SOUT VCM VCP VEE VSS1 VSS2 VSS3 VDD XT XT XTOUT BD P1.0 P1.1 P1.2 P1.3 SEG30 SEG61 SEG60 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 P0.0 P0.1 P0.2 P0.3 P2.0 P2.1 P2.2 P2.3 P3.0 P3.1 P3.2 P3.3 P4.0 P4.1 P4.2 P4.3 RESET TEST1 TEST2 TEST3 100 100-Pin Plastic QFP

¡ Semiconductor PIN DESCRIPTIONS Symbol Type

Description

P0.0

• 4-bit I/O port 0 P0.1 The input (*) /output, the existence (*) / absence of pull-down resistance, and the HALT function release enable/disable (*) condition can be selected for each bit. P0.2 P0.3 P1.0 to P1.3
• 4-bit I/O port 1 P2.0 I/O A P2.1
• 4-bit I/O port 2 P2.2 P2.3 P3.0 to P3.3
• 4-bit I/O port 3 P4.0 to P4.3
• 4-bit I/O port 4 XTOUT O
• Oscillator clock output. E XT O
• Oscillator connection pins. B XT I
• Reset input. RESET I C TEST1 TEST2 I
• Test input. D TEST3 SIN I
• Serial port data input. F
• Serial port data output. When the port is not in an output state, SOUT O G SCLK I/O H BD O
• Melody output (buzzer drive output). I The oscillator clock is output when XTF (bit 3 of port P00C) is set to "1". This is an input with a pull-down resistor. The system is reset when "1" is input. This is an input with a pull-down resistor. this pin is set at high-impedance level, except when HZOUT (bit 3 of port P2XC) =1 and transmitting data. PORT0 PORT1 PORT2 PORT3 PORT4 Capture trigger signal External interrupt signal The input (*) /output, the existence (*) / absence of pull-down resistance, and the HALT function release enable/ disable (*) condition can be selected for each port.
• Serial port clock input/output. The input/output (*) is switched by the serial port control register SCNT. In the output mode, the serial clock frequency can be selected from the demultiplied signal (1/1, 1/2 or 1/4 of the system clock). SEG0 to SEG61 O
• LCD drive output with 1/3 bias and 1/3 duty, or 1/3 bias and 1/4 duty. The duty can be switched by LCD control register LCDCNT. A maximum of 177 segments can be displayed when using 1/3 duty and 232 when using 1/4 duty. Means system reset conditions.

¡ Semiconductor Output enable VSS VSS CMOS inverter Pull-down enable VSS 10 kW (Standard) I/O 3-state CMOS buffer Note:

1.5 V operationÆVSS1

3.0 V operationÆVSS2

VSS: Symbol

• –3.0 V power supply pin (for 3.0 V operation) VEE VCM
• Internal voltage converter capacitor connecting pin
• –1.5 V power supply pin (for 1.5 V operation)
• 0 V power supply pin VSS1
• Internal logic power supply pin
• –4.5 V power supply pin VCP I/O Circuitry Circuitry on Input/Output Pins A. Input/output port B. Oscillator VEE XT VEE VDD XT I O a b c a b c VDD Note PIN DESCRIPTIONS (continued)

¡ Semiconductor Circuitry on Input/Output Pins (continued) C. RESET input H. SCLK input/output D. TEST input I. BD output VDD Output resistor control VSS O E. XTOUT output F. SIN input G. SOUT output VSS O Output enable VSS CMOS Schmitt trigger buffer VSS I VSS I/O VSS Output enable VSS VSS I VSS O VSS I

¡ Semiconductor ABSOLUTE MAXIMUM RATINGS (MSM6351 (1.5 V Battery), BUF = "0") Parameter Symbol Condition Rating Unit Input Voltage Output Voltage *1 VO2 Ta = 25°C –6.0 to +0.3 VSS1 – 0.3 to VSS1 + 0.3 VSS1 – 0.3 to VSS1 + 0.3 V Power Supply Voltage Output Voltage *2 VIN VO1 –6.0 to +0.3 VDD = 0 V (VSS1 = Battery Voltage) TSTG Storage Temperature –55 to +125 *1 Normal output *2 LCD driver output RECOMMENDED OPERATING CONDITIONS (MSM6351 (1.5 V Battery), BUF = "0") Parameter Symbol Condition Range Unit Operating Voltage Vop fOSC –1.75 to –1.25 –20 to +70 32.768 V kHz BUF = "0" Operating Frequency Top Operating Temperature VDD = 0 V (VSS1 = Battery Voltage)

¡ Semiconductor ELECTRICAL CHARACTERISTICS (MSM6351 (1.5 V Battery), BUF = "0") PORT0 to PORT4 *3, SOUT, SCLK, XTOUT Parameter Symbol Condition Applied Pin VDD = 0 V, VSS1 = –1.5 V (Battery Voltage), VSS2 = –3.0 V, VSS3 = –4.5 V, fOSC = 32.768 kHz, CX = 35 pF, Ta = 25°C Min. Typ. Max. Unit Power Supply Current Voltage for Oscillation Start Output Current 1 Input Current 1 Input Leakage Current Input Current 3 Input Voltage IDD –VOSC –IOH1 ΩIOMH1Ω ΩIOML1Ω –IOL1 –IIH1 –IIH3 –VIH –VIL *1 *2 Within 2 sec. VOH = –0.2 V VOMH = VSS1 ±0.2 V VOML = VSS2 ±0.2 V VOL = –4.3 V VI = 0 V I/O input With pull-down resistor VI = 0 V With pull-down resistor 3.0 1.4 150 300 0.3 1.2 mA V mA mA mA mA V PORT0 to PORT4 RESET All input pins VI = 0 V, –1.5 V I/O input Without pull-down resistor PORT0 to PORT4, SCLK, SIN, SOUT ΩIIL2Ω Output Current 2 Output Current 3 –IOH2 mA mA IOL2 –IOH3 IOL3 VO = –0.5 V VO = –1.0 V VO = –0.5 V VO = –1.0 V Common/Segment Output 150 150 SEG0 to SEG61 BD *1 This value depends on program. *2 BUF = "0" PORT4 = P4.0 to P4.3

¡ Semiconductor ABSOLUTE MAXIMUM RATINGS (MSM6351L (3.0 V Battery), Halver used (BUF = "0")) Parameter Symbol Condition Rating Unit Input Voltage Output Voltage *1 VO2 Ta = 25°C –6.0 to +0.3 VSS2 – 0.3 to VSS2 + 0.3 VSS2 – 0.3 to VSS2 + 0.3 V Power Supply Voltage Output Voltage *2 VIN VO1 –6.0 to +0.3 VDD = 0 V (VSS2 = Battery Voltage) TSTG Storage Temperature –55 to +125 *1 Normal output *2 LCD driver output RECOMMENDED OPERATING CONDITIONS (MSM6351L (3.0 V Battery), Halver used (BUF = "0")) Parameter Symbol Condition Range Unit Operating Voltage Vop fOSC –3.5 to –2.6 –20 to +70 32.768 V kHz Halver used (BUF = "0") Operating Frequency Top Operating Temperature VDD = 0 V (VSS2 = Battery Voltage)

¡ Semiconductor ELECTRICAL CHARACTERISTICS (MSM6351L (3.0 V Battery), Halver used (BUF="0")) PORT0 to PORT4 *3, SOUT, SCLK, XTOUT Parameter Symbol Condition Applied Pin VDD = 0 V, VSS1 = –1.5 V, VSS2 = –3.0 V (Battery Voltage), VSS3 = –4.5 V, fOSC = 32.768 kHz, CX = 35 pF, Ta = 25°C Min. Typ. Max. Unit Power Supply Current Voltage for Oscillation Start Output Current 1 Input Current 1 Input Leakage Current Input Current 3 Input Voltage IDD –VOSC –IOH1 ΩIOMH1Ω ΩIOML1Ω –IOL1 –IIH1 –IIH3 –VIH –VIL *1 *2 Within 2 sec. VOH = –0.2 V VOMH = VSS1 ±0.2 V VOML = VSS2 ±0.2 V VOL = –4.3 V VI = 0 V I/O input With pull-down resistor VI = 0 V With pull-down resistor 1.5 2.4 150 300 600 0.5 2.5 mA V mA mA mA mA V PORT0 to PORT4 RESET All input pins VI = 0 V, –3 V I/O input Without pull-down resistor PORT0 to PORT4, SCLK, SIN, SOUT ΩIIL2Ω Output Current 2 Output Current 3 –IOH2 mA mA –IOL2 –IOH3 –IOL3 VO = –0.5 V VO = –2.5 V VO = –0.5 V VO = –2.5 V Common/Segment Output 500 500 SEG0 to SEG61 BD *1 This value depends on program. *2 When 3 V battery with halver is used (BUF = "0") PORT4 = P4.0 to P4.3

¡ Semiconductor ABSOLUTE MAXIMUM RATINGS (MSM6351L (3.0 V Battery), Halver not used (BUF = "1")) Parameter Symbol Condition Rating Unit Input Voltage Output Voltage *1 VO2 Ta = 25°C –6.0 to +0.3 VSS2 – 0.3 to +0.3 VSS2 – 0.3 to +0.3 V Power Supply Voltage Output Voltage *2 VIN VO1 –6.0 to +0.3 VDD = 0 V (VSS2 = Battery Voltage) TSTG Storage Temperature –55 to +125 *1 Normal output *2 LCD driver output RECOMMENDED OPERATING CONDITIONS (MSM6351L (3.0 V Battery), Halver not used (BUF = "1")) Parameter Symbol Condition Range Unit Operating Voltage Vop fOSC –3.5 to –2.2 –20 to +70 32.768 V kHz Halver not used (BUF = "1") Operating Frequency Top Operating Temperature VDD = 0 V (VSS2 = Battery Voltage)

¡ Semiconductor ELECTRICAL CHARACTERISTICS (MSM6351L (3.0 V Battery), Halver not used (BUF="1")) *1 This value depends on program. *2 When halver is not used (BUF = "1") PORT4 = P4.0 to P4.3 PORT0 to PORT4 *3, SOUT, SCLK, XTOUT Parameter Symbol Condition Applied Pin VDD = 0 V, VSS1 = –1.5 V, VSS2 = –3.0 V (Battery Voltage), VSS3 = –4.5 V, fOSC = 32.768 kHz, CX = 35 pF, Ta = 25°C Min. Typ. Max. Unit Power Supply Current Voltage for Oscillation Start Output Current 1 Input Current 1 Input Leakage Current Input Current 3 Input Voltage IDD –VOSC –IOH1 ΩIOMH1Ω ΩIOML1Ω –IOL1 –IIH1 –IIH3 –VIH –VIL *1 *2 Within 2 sec. VOH = –0.2 V VOMH = VSS1 ±0.2 V VOML = VSS2 ±0.2 V VOL = –4.3 V VI = 0 V I/O input With pull-down resistor VI = 0 V With pull-down resistor 3.0 2.4 150 300 600 0.5 2.5 mA V mA mA mA mA V PORT0 to PORT4 RESET All input pins VI = 0 V, –3 V I/O input Without pull-down resistor PORT0 to PORT4, SCLK, SIN, SOUT ΩIIL2Ω Output Current 2 Output Current 3 –IOH2 mA mA –IOL2 –IOH3 –IOL3 VO = –0.5 V VO = –2.5 V VO = –0.5 V VO = –2.5 V Common/Segment Output 500 500 SEG0 to SEG61 BD

¡ Semiconductor INSTRUCTION LIST Mnemonic Instruction code ADD ACC, REG1 (rP), (ACC), (Z), (C)¨(rP) + (ACC) ADD #i, REG1 (rP), (ACC), (Z), (C)¨(rP) +i ADC REG1 (rP), (ACC), (Z), (C)¨decimal adj [(rP) + (ACC) + (C)] ADCN REG1 (rP), (ACC), (Z), (C)¨N adjust [(rP) + (C)] SUB ACC, REG1 (rP), (ACC), (Z), (C)¨(rP) + (ACC) SUB #i, REG1 (rP), (ACC), (Z), (C)¨(rP) –i SBC REG1 (rP), (ACC), (Z), (C)¨decimal adj [(rP) – (ACC) – (C)] SBCN REG1 (rP), (ACC), (Z), (C)¨N adjust [(rP) – (C)] CMP ACC, REG1 (Z), (C)¨(rP) – (ACC) CMP #i, REG1 (Z), (C)¨(rP) – i INC REG1 (rP), (ACC), (Z), (C)¨(rP) +1 INCD REG2 (rPb), (ACC), (Z), (C)¨(rPb) +1 DEC REG1 (rP), (ACC), (Z), (C)¨(rP) –1 DECD REG2 (rPb), (ACC), (Z), (C)¨(rPb) –1 BIT ACC, REG1 (Z)¨(rP3) (ACC3) (rP2) (ACC2) (rP1) (ACC1) (rP0) (ACC0) BIT #i, REG1 (Z)¨(rP3) i3 (rP2) i2 (rP1) i1 (rP0) i0 BIS ACC, REG1 (rP), (ACC), (Z)¨(rP) (ACC) BIS #i, REG1 (rP), (ACC), (Z)¨(rP) i BIC ACC, REG1 (rP), (ACC), (Z)¨(rP) (ACC) BIC #1, REG1 (rP), (ACC), (Z)¨(rP) i XOR ACC, REG1 (rP), (ACC), (Z)¨(rP) (ACC) XOR #1, REG1 (rP), (ACC), (Z)¨(rP) i ROR REG1 (Z), (ACC)¨[ Æ(C)Æ(rP)Æ ] ROL REG1 (Z), (ACC)¨[ ¨(C)¨(rP)¨ ] ASR REG1 (Z), (ACC)¨[OÆ(rP)Æ(C)] ASL REG1 (Z), (ACC)¨[(C)¨(rP)¨O] CLG (G)¨O CLC (C)¨O CLZ (Z)¨O CLA (Z), (C), (G)¨O P P P P P P P P P P P P P P P P P P P P P P P P Ma- chine cycle r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 SEG (G)¨1 SEC (C)¨1 SEZ (Z)¨1 SEA (Z), (C), (G)¨1 Arithmetic operation instruction Bit manipulation instruction Rotate instruction Flag operation instruction

¡ Semiconductor INSTRUCTION LIST (continued) Mnemonic Instruction code MOV ACC, REG1 (rP)¨(ACC) MOVD ACC, REG2 (rPb)¨(ACC) MOV #i, REG1 (rP), (ACC), (Z)¨i MOV REG1, ACC (ACC), (Z)¨(rP) MOVD REG2, ACC (ACC), (Z)¨(rPb) EXG REG1 (rP)´(ACC) EXGD REG2 (rPb)´(ACC) CALL adrs (STACK)¨(PC), (PC)¨a11 to a0, (SP)¨(SP)+1 RET (PC)¨(STACK)+1, (SP)¨(SP)–1 RTI (PC)¨(STACK)+1, (SP)¨(SP)–1 (at INT routine) a11 a10 P P P P Ma- chine cycle r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 r3 r2 r1 r0 a3 a2 a1 a0 Data transfer instruction Subroutine instruciton BGT n if (G)=1 then (PC)¨(PC)+N else (PC)¨(PC)+1 P 1 n4 n3 n2 n1 n0 BLE n if (G)=0 then (PC)¨(PC)+N else (PC)¨(PC)+1 P 1 n4 n3 n2 n1 n0 BCS n if (C)=1 then (PC)¨(PC)+N else (PC)¨(PC)+1 P 0 n4 n3 n2 n1 n0 BCC n if (C)=0 then (PC)¨(PC)+N else (PC)¨(PC)+1 P 0 n4 n3 n2 n1 n0 BEQ n (BZE n) if (Z)=1 then (PC)¨(PC)+N else (PC)¨(PC)+1 P 0 n4 n3 n2 n1 n0 BNE n (BNZ n) if (Z)=0 then (PC)¨(PC)+N else (PC)¨(PC)+1 P 0 n4 n3 n2 n1 n0 BGE n if {(G)=1 or (Z)=1} then (PC)¨(PC)+N else (PC)¨(PC)+1 P 1 n4 n3 n2 n1 n0 BLT n if {(G)=0 and (Z)=0} then (PC)¨(PC)+N else (PC)¨(PC)+1 P 1 n4 n3 n2 n1 n0 MSA adrs * Specifies the first address of note data. (E00H~FFFH) 0 a8 a7 a6 a5 a4 a3 a2 a1 a0 DSP dig, REG1 * digit (Low Part)¨(rP), (ACC) P dig3 dig2 dig1 dig0 r3 r2 r1 r0 DSPH dig, REG1 * digit (High Part)¨(rP), (ACC) P dig3 dig2 dig1 dig0 r3 r2 r1 r0 DSPF dig, REG1 * digit (Low Part)¨(rP) via Table P dig3 dig2 dig1 dig0 r3 r2 r1 r0 DSPF dig, REG1 * digit (Low Part)¨(rP) via Table P dig3 dig2 dig1 dig0 r3 r2 r1 r0 OUT REG1, PORT (PORTy)¨(rP) 0 y4 P y3 y2 y1 y0 r3 r2 r1 r0 OUT #i, PORT (PORTy)¨i 1 y4 P y3 y2 y1 y0 i3 INP PORT, REG1 (rP), (ACC)¨(PORTy) 0 y4 P y3 y2 y1 y0 r3 r2 r1 r0 NOP NO Operation HALT HAIT CPU Jump instruction Melody start Display instruction Input/output instruction CPU control When P=0 in bit 8, N=n+1; when P=1, N=–n. JMP adrs (PC)¨a11 to a0 AMP @ REG1 (PC)¨(PC)+(rP)+1 JMPO @ REG1 (PC)¨(PC)+7 (rP)+1 a11 a10 a3 a2 a1 a0 r3 r2 r1 r0 r3 r2 r1 r0

¡ Semiconductor (Unit : mm) PACKAGE DIMENSIONS Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). QFP100-P-1420-0.65-K Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.29 TYP. Mirror finish

¡ Semiconductor (Unit : mm) Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). QFP100-P-1420-0.65-L Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.29 TYP. Spherical surface

¡ Semiconductor (Unit : mm) Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). QFP100-P-1420-0.65-BK Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.29 TYP. Mirror finish