MSM511000CL-45

MSM511000C OKI | Alldatasheet

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Technical content

¡ Semiconductor MSM511000C/CL

DESCRIPTION

The MSM511000C/CL is a 1,048,576-word ´ 1-bit dynamic RAM fabricated in Oki's silicon-gate CMOS technology. The MSM511000C/CL achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/ single-layer metal CMOS process. The MSM511000C/CL is available in a 26/20-pin plastic SOJ or 20-pin plastic ZIP. The MSM511000CL (the low-power version) is specially designed for lower- power applications.

FEATURES

• 1,048,576-word ´ 1-bit configuration
• Single 5 V power supply, –10% tolerance
• Input : TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 512 cycles/8 ms, 512 cycles/64 ms (L-version)
• Fast page mode, read modify write capability
• CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• Package options: 26/20-pin 300 mil plastic SOJ (SOJ26/20-P-300-1.27) (Product : MSM511000C/CL-xxJS) 20-pin 400 mil plastic ZIP (ZIP20-P-400-1.27) (Product : MSM511000C/CL-xxZS) xx indicates speed rank. PRODUCT FAMILY ¡ Semiconductor MSM511000C/CL 1,048,576-Word ´ 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE MSM511000C/CL-50 50 ns 100 ns 120 ns 440 mW 385 mW 5.5 mW/ Family Access Time (Max.) Cycle Time (Min.) Standby (Max.) Power Dissipation MSM511000C/CL-60 tRAC 60 ns 26 ns tAA 30 ns 14 ns tCAC 15 ns MSM511000C/CL-45 45 ns 90 ns 468 mW24 ns 14 ns Operating (Max.) 1.1 mW (L-version) 130 ns 330 mWMSM511000C/CL-70 70 ns 35 ns 20 ns E2G0009-17-41 This version: Jan. 1998 Previous version: May 1997

¡ Semiconductor MSM511000C/CL PIN CONFIGURATION (TOP VIEW) DOUT DIN RAS VCC 1A9 9NC VSS WE NC

2 CAS

VCC Power Supply (5 V) VSS Ground (0 V) NC No Connection

¡ Semiconductor MSM511000C/CL BLOCK DIAGRAM WE RAS CAS Timing Generator Timing Generator Column Decoders Write Clock Generator Sense Amplifiers I/O Selector Output Buffer DOUT DINInput Buffer Memory Cells Row Address Buffers On Chip VBB Generator VCC VSS Internal Address Counter Column Address Buffers Refresh Control Clock A0 - A9 Row De- coders Word Drivers 10 10 10 10

¡ Semiconductor MSM511000C/CL

ELECTRICAL CHARACTERISTICS

Recommended Operating Conditions Capacitance *: Ta = 25°C Voltage on Any Pin Relative to VSS Short Circuit Output Current Power Dissipation Operating Temperature Storage Temperature V T Symbol IOS PD* Topr Tstg –1.0 to 7.0 0 to 70 –55 to 150 Rating mA W Parameter V Unit Power Supply Voltage Input High Voltage Input Low Voltage VCC Symbol VSS VIH VIL 5.0 Typ.Parameter 4.5 2.4 –1.0 Min. 5.5 6.5 0.8 Max. (Ta = 0°C to 70°C) V Unit V V V Input Capacitance (A0 - A9, DIN) Input Capacitance (RAS, CAS, WE) Output Capacitance (DOUT) CIN1 Symbol CIN2 COUT Max. pF Unit pF pF Parameter CC = 5 V ±10%, Ta = 25°C, f = 1 MHz) Typ.

¡ Semiconductor MSM511000C/CL DC Characteristics IOH = –5.0 mAOutput High Voltage IOL = 4.2 mAOutput Low Voltage 0 V £ VI £ 6.5 V; All other pins notInput Leakage Current under test = 0 V DOUT disableOutput Leakage Current 0 V £ VO £ 5.5 V RAS, CAS cycling,Average Power tRC = Min.Supply Current (Operating) RAS, CAS = VIH Power Supply RAS, CASCurrent (Standby) RAS cycling,Average Power CAS = VIH,Supply Current tRC = Min.(RAS-only Refresh) RAS = VIH,Power Supply CAS = VIL,Current (Standby) DOUT = enable Average Power CAS before RASSupply Current (CAS before RAS Refresh) RAS = VIL,Average Power CAS cycling,Supply Current tPC = Min.(Fast Page Mode) tRC = 125 ms,Average Power CAS before RAS,Supply Current tRAS £ 1 ms(Battery Backup) ³ VCC –0.2 V V V mA mA mA mA mA mA mA mA mA mA RAS cycling, Parameter Symbol Condition VOH VOL ILI ILO ICC1 ICC2 ICC3 ICC5 ICC6 ICC7 ICC10 MSM511000 C/CL-45 MSM511000 C/CL-50 MSM511000 C/CL-60 Min. 2.4 –10 –10 Max. V CC 0.4 200 300 Min. 2.4 –10 –10 Max. V CC 0.4 200 300 Min. 2.4 –10 –10 Max. V CC 0.4 200 300 Unit CC = 5 V ±10%, Ta = 0°C to 70°C) Note 1, 2 1, 5 1, 2 1, 2 1, 3 1, 4, MSM511000 C/CL-70 Min. 2.4 –10 –10 Max. V CC 0.4 200 300 Notes : 1. I CC Max. is specified as ICC for output open condition. 2. The address can be changed once or less while RAS = VIL. 3. The address can be changed once or less while CAS = VIH. 5. L-version.

¡ Semiconductor MSM511000C/CL AC Characteristics (1/2) Random Read or Write Cycle Time Read Modify Write Cycle Time Fast Page Mode Cycle Time Fast Page Mode Read Modify Write Cycle Time Access Time from RAS Access Time from CAS Access Time from Column Address Output Low Impedance Time from CAS Transition Time Refresh Period Refresh Period (L-version) RAS Precharge Time RAS Pulse Width (Fast Page Mode) RAS Hold Time CAS Precharge Time (Fast Page Mode) CAS Pulse Width RAS Pulse Width CAS Hold Time CAS to RAS Precharge Time RAS to CAS Delay Time RAS to Column Address Delay Time Row Address Set-up Time Row Address Hold Time Column Address Set-up Time Column Address Hold Time Column Address Hold Time from RAS Column Address to RAS Lead Time Access Time from CAS Precharge RAS Hold Time from CAS Precharge CAS to Data Output Buffer Turn-off Delay Time ns ns ns ns ns ns ns ns ns ns ms ms ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Parameter MSM511000 C/CL-45 MSM511000 C/CL-50 MSM511000 C/CL-60 tRC tRWC tPC tPRWC tRAC tCAC tAA tCPA tCLZ tOFF tT tREF tREF tRP tRAS tRASP tRSH tCP tCAS tCSH tCRP tRCD tRAD tASR tRAH tASC tCAH tAR tRAL tRHCP Min. 110 Max. 10,000 100,000 10,000 Min. 100 120 Max. 10,000 100,000 10,000 Min. 120 140 Max. 10,000 100,000 10,000 Unit Note 4, 5, 6 4, 5 4, 6 CC = 5 V ±10%, Ta = 0°C to 70°C) Note 1, 2, 3 MSM511000 C/CL-70 Min. 130 155 Max. 10,000 100,000 10,000 Symbol

¡ Semiconductor MSM511000C/CL AC Characteristics (2/2) Read Command Set-up Time Read Command Hold Time Read Command Hold Time referenced to RAS Write Command Set-up Time Write Command Hold Time Write Command Hold Time from RAS Write Command Pulse Width Write Command to RAS Lead Time Write Command to CAS Lead Time Data-in Set-up Time Data-in Hold Time Data-in Hold Time from RAS CAS to WE Delay Time Column Address to WE Delay Time RAS to WE Delay Time CAS Active Delay Time from RAS Precharge RAS to CAS Set-up Time (CAS before RAS) RAS to CAS Hold Time (CAS before RAS) CAS Precharge WE Delay Time Parameter Symbol MSM511000 C/CL-45 MSM511000 C/CL-50 MSM511000 C/CL-60 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Note t RCS tRCH tRRH tWCS tWCH tWP tCWL tRWL tDS tDH tDHR tCWD tAWD tRWD tCPWD tRPC tCSR tCHR tWCR Min. Max. —n s Min. Max. Min. Max. CC = 5 V ±10%, Ta = 0°C to 70°C) Note 1, 2, 3 MSM511000 C/CL-70 Min. Max.

¡ Semiconductor MSM511000C/CL Notes: 1. A start-up delay of 100 ms is required after power-up, followed by a minimum of eight initialization cycles ( RAS-only refresh or CAS before RAS refresh) before proper device operation is achieved. 2. The AC characteristics assume t T = 5 ns. 3. V IH (Min.) and VIL (Max.) are reference levels for measuring input timing signals. Transition times (tT) are measured between VIH and VIL. 4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF. 5. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met. tRCD (Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD (Max.) limit, then the access time is controlled by tCAC. 6. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD (Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD (Max.) limit, then the access time is controlled by tAA. 7. t OFF (Max.) defines the time at which the output achieves the open circuit condition and is not referenced to output voltage levels. 8. t RCH or tRRH must be satisfied for a read cycle. 9. t WCS, tCWD, tRWD, tAWD and tCPWD are not restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If tWCS ‡ tWCS (Min.), then the cycle is an early write cycle and the data out will remain open circuit (high impedance) throughout the entire cycle. If t CWD ‡ tCWD (Min.) , tRWD ‡ tRWD (Min.), tAWD ‡ tAWD (Min.) and tCPWD ‡ tCPWD (Min.), then the cycle is a read modify write cycle and data out will contain data read from the selected cell; if neither of the above sets of conditions is satisfied, then the condition of the data out (at access time) is indeterminate. 10. These parameters are referenced to the CAS leading edge in an early write cycle, and to the WE leading edge in a read modify write cycle.

¡ Semiconductor MSM511000C/CL RAS CAS Address WE DOUT VIH VIL VIH VIL V IH VIL VIH VIL VOH VOL tRC tRAS tRP tCSHtCRP tRCD tRSH tCRP tCAS tRAD tRAL tASR tRAH tASC tCAH Row Column tAR tRCS tRCH tRRH tCAC tAA tCLZ tRAC tOFF Open Valid Data "H" or "L" TIMING WAVEFORM Read Cycle Write Cycle (Early Write) RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" DIN VIH VIL tRC tRAS tRP tCSH tCRP tRCD tRSH tCRP tCAS tAR tRAD tRAL tRAHtASR tASC tCAH Row Column tCWLtWCR tWCS tWCH tRWLtDHR tDS tDH Valid Data Open tWP E2G0088-17-41A

¡ Semiconductor MSM511000C/CL Read Modify Write Cycle Fast Page Mode Read Cycle RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" tRASP tRP tCSH tCRP tRCD tCAS tCP tPC tCAS tCP tRSH tCAS tCRP tAR tASR tRAH tASC tCAH tASC tCAH tRAL tASC tCAH Row Column Column Column tRAD tRCS tRCH tRCS tRCH tRCS tRRH tRCH tCAC tAA tRAC tCAC tAA tCPA tCAC tAA tCPA Valid Data Valid Data Valid Data tCLZ tOFF tCLZ tOFF tCLZ tOFF tRHCP RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" /#06 DIN VIH VIL /#06/#08 tRWC tRPtRAS tCRP tRCD tRSH tRWL tCAS tCRP tCSH tAR tCWLtRAD tRAL tASR tRAH tASC tCAH Row Column tAWD tRWD tCWD tWP tRCS tDS tDH Valid Data tCAC tAA tRAC Open tOFF Valid Data tCLZ

¡ Semiconductor MSM511000C/CL Fast Page Mode Write Cycle (Early Write) Fast Page Mode Read Modify Write Cycle RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" DIN VIH VIL tRASP tRP tCRP tRCD tCAS tCP tPC tCAS tCP tCAS tRSH tCRP tAR tASR tRAH tASC tCAH tASC tCAH tASC tCAH tRAL Row Column Column Column tRAD tWCR tWCS tWCH tWCS tWCH tWCS tWCH tDS tDH tDS tDH tDS tDH Valid Data Valid Data Valid Data Open tDHR tRHCP tWP tCWL tWP tWP tCWL tCWL tRWL /#05/#08 /#04/#07 RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" DIN VIH VIL tRASP tCSH tPRWCtRCD tCAS tCP tCAS tRSH tRP tCRP tCAS tAR tASR tRAH tASC tCAH tASC tCAH tASC tCAH tRAL Row Column Column Column tRWD tRCS tCWD tCWL tCWD tCWL tCWD tCWL tAWD tAA tRAD tCAC tWP tAWD tCPA tAA tCACtOFF tWP tAWD tCPA tAA tCACtOFF tWP tOFF Valid Data Valid Data Valid DatatRAC tCLZ tDS tDH tCLZ tDS tDH tCLZ tDS tDH tRWL Valid Data Valid Data Valid Data tCP tRCS tRCS tRHCP tCPWD tCPWD

¡ Semiconductor MSM511000C/CL RAS-Only Refresh Cycle CAS before RAS Refresh Cycle RAS CAS Address DOUT VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" tRC tRP tRAS tRPCtCRP tRAHtASR Row Open Note: WE = "H" or "L" /,/#02 tOFF RAS CAS DOUT VIH VIL VIH VIL VOH VOL tRC tRAS tRP tRPC tCP tCSR tCHR tOFF Open Note: WE, Address = "H" or "L"

¡ Semiconductor MSM511000C/CL Hidden Refresh Read Cycle RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" tRC tRAS tRP tRAS tCRP tRCD tRSH tCHR tRAD tRAL tASR tRAH tASC tCAH tAR tRCS tRRH tCAC tAA tRAC tOFF tCLZ Valid Data Row Column Hidden Refresh Write Cycle RAS CAS Address WE DOUT VIH VIL VIH VIL VIH VIL VIH VIL VOH VOL "H" or "L" /#06 DIN VIH VIL tRC tRAS tRP tRAS tCRP tRCD tRSH tCHR tAR tRAD tRAL tASR tRAH tASC tCAH Row Column tRWL tWCR tWCS tWCH tDS tDH Valid Data Open tDHR tRAD tWP

¡ Semiconductor MSM511000C/CL (Unit : mm) PACKAGE DIMENSIONS Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.80 TYP. Mirror finish

¡ Semiconductor MSM511000C/CL (Unit : mm) ZIP20-P-400-1.27 Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.50 TYP. Mirror finish