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Technical content

Issue Date: Nov. 18, 2009 MR36V01G52B 64M–Word × 16–Bit or 128M–Word × 8–Bit Page Mode P2ROM

FEATURES

electrically switchable configuration

  • Page size of 8-word x 16-Bit or 16-word x 8-Bit
  • 3.0 V to 3.6V power supply
  • Random Access time 110 ns MAX
  • Page Access time 25 ns MAX
  • Operating current 50 mA MAX
  • Standby current 25 mA MAX
  • Input/Output TTL compatible
  • Three-state output PACKAGES
  • 56-pin plastic TSOP (TSOP(1)56-P-1420-0.50-K-MC) P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM. This exclusive LAPIS Semiconductor technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing. Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which include the following; PIN CONFIGURATION (TOP VIEW) A23 A241 56

2 A25 2 55

5 A16 3 54

4 BYT

E# 4 53 3 Vs s 5 52

2 D15/

1 D7 7 50

0 D14 8 49

56 A8 D13 10 47

9 D5 11 46

ype1) A2

0 D12 12 45

1 D11 15 42

8 D2 18 39

7 D9 19 38

# 23 34 A3 Vs s 24 33 A2 CE # 25 32 A1 A0 26 31 NC NC 27 30

28 NC Vc

Short lead time , since the P2ROM is programmed at the final stage of the production process, a large P2ROM inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive lead-time and minimize liability as a custom product.

  • No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges apply.
  • No additional programming charge, unlike Flash and OTP that require additional programming and handling costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput. The cost is included in the unit price.
  • Custom Marking is available at no additional charge.

D15 / A–1 Data output / Address input A0 to A25 Address inputs D0 to D14 Data outputs CE# Chip enable input OE# Output enable input BYTE# Word / Byte select input VCC Power supply voltage VSS Ground NC No connect × 8/× 1

6 Switch

CE# OE# BYTE# CE OE Row Decoder Me mory Cell Matrix 32M × 16-Bit or 64M × 8-Bit Multiplexer & Sense Amp. Addres s Buffeｒ C olumn Decoder Ou tput Buffer D0 D2 D4 D6 D8 D10 D12 D14 D1 D3 D5 D7 D9 D11 D13 D15 In 8-b it output mode, these pins are placed in a high-Z state and pin D15 functions as the A-1 address pin.

Mode CE# OE# BYTE# VCC D0 to D7 D8 to D15 A-1 Read (16-Bit) L L H DOUT ∗ Read (8-Bit) L L L DOUT Hi–Z L/H H Output disable L H L Hi–Z ∗ H Standby H ∗ L 3.3 V Hi–Z ∗ ∗: Don’t Care (H or L) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Value Unit Operating temperature under bias Ta 0 to 70 °C Storage temperature Tstg –55 to 125 °C Input voltage VI –0.5 to VCC+0.5 V Output voltage VO –0.5 to VCC+0.5 V Power supply voltage VCC relative to VSS –0.5 to 5 V Output short circuit current Ios — 10 mA Power dissipation per package PD Ta=25°C 1.0 W RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70°C) Parameter Symbol Condition Min. Typ. Max. Unit VCC power supply voltage VCC 3.0 — 3.6 V Input “H” level VIH 2.2 — VCC+0.5∗ V Input “L” level VIL VCC = 3.0 to 3.6 V –0.5∗∗ — 0.6 V Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. PIN CAPACITANCE (VCC = 3.3 V, Ta = 25°C, f = 1 MHz) Parameter Symbol Condition Min. Typ. Max. Unit Input(except BYTE#) CIN1 — — 20 Output Cout VI = 0 V — — 20 pF

ELECTRICAL CHARACTERISTICS

(VCC = 3.3 V ± 0.3 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Typ. Max. Unit Input leakage current ILI V I = 0 to VCC — — 20 μA Output leakage current ILO V O = 0 to VCC — — 20 μA ICCSC CE# = Add.=VCC — — 25 mA VCC power supply current (Standby) ICCST CE# = Add.=VIH — — 25 mA VCC power supply current (Read) ICCA1 CE# = VIL OE# = VIH tc = 200 ns — — 50 mA Input “H” level VIH — 2.2 — VCC+0.5∗ V Input “L” level VIL — –0.5∗∗ — 0.6 V Output “H” level VOH I OH = –2 mA 2.4 — — V Output “L” level VOL I OL = 2 mA — — 0.4 V Voltage is relative to V SS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns.

(VCC = 3.3 V ± 0.15 V, Ta = 0 to 40°C) Parameter Symbol Condition Min. Max. Unit Address cycle time tC — 100 — ns Address access time tACC — — 100 ns Address skew time tASK — — 10 ns CE Address skew time TCSK — — 10 ns Page cycle time tPC — 25 — ns Page access time tPAC CE# = OE# = VIL — 25 ns CE# access time tCE OE# = VIL — 100 ns OE# access time tOE CE# = VIL — 25 ns tCHZ OE# = VIL 0 20 ns Output disable time tOHZ CE# = VIL 0 20 ns Output hold time tOH CE# = OE# = VIL 0 — ns (VCC = 3.3 V ± 0.3 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Max. Unit Address cycle time tC — 110 — ns Address access time tACC — — 110 ns Address skew time tASK — — 10 ns CE Address skew time TCSK — — 10 ns Page cycle time tPC — 25 — ns Page access time tPAC CE# = OE# = VIL — 25 ns CE# access time tCE OE# = VIL — 110 ns OE# access time tOE CE# = VIL — 25 ns tCHZ OE# = VIL 0 20 ns Output disable time tOHZ CE# = VIL 0 20 ns Output hold time tOH CE# = OE# = VIL 0 — ns Measurement conditions Output load Output 30 pF (Including scope and jig)

TIMING CHART (READ CYCLE) Random Access Mode Read Cycle Page Access Mode Read Cycle Address CE# OE# Dout tC tCE tOE tOH tCHZ tOHZ Valid Data Hi-Z ｔASK tOH tACC Valid Data tC tACC Hi A3 to A25 tC tCE tOE tACC tOH tCHZ tOHZ Hi-Z Hi-Z Dout ｔCSK A0 to A2 (X 32 mode) A-1 to A2 (X16 mode) OE# CE# tPCtPC tPAC tPAC

(VCC = 3.3 V ± 0.3 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Max. Unit VCC set up time tvset — 5 270 us Power on sequence hold time tposh — 1 — ms Power off hold time tvpoff — 1 — ms TIMING CHART (POWER ON) Unavailable Don’t power-on Note: A start-up delay of 1ms is required after power-on. If you power-off VCC ,you must wait 1ms to power-on. CE# must be HIGH while VCC power on sequence. LEVEL=VSS LEVEL = 3.0 V VCC tvpoff tposh VCC 0.1V tvset

(Unit: mm) No tes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).

REVISION HISTORY

No. Date Previous Edition Current Edition

Description

FEDR36V01G52B-002-01 Nov. 18,2009 – – Final edition 1

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