MR27T6402L

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Technical content

Issue Date: Jan. 06, 2009 MR27T6402L 4M–Word × 16–Bit or 8M–Word × 8–Bit P2ROM

FEATURES

PIN CONFIGURATION (TOP VIEW)

• 4,19 4,304-word × 16-bit / 8,388,608-word × 8-bit electrically switchable configuration
• Access time 2.7 V to 3.6 V power supply 90 ns MAX 3.0 V to 3.6 V power supply 70 ns MAX
• Operating current 20 mA MAX (5MHz)
• Standby current 10 µA MAX
• Input/Output TTL compatible
• Three-state output PACKAGES
• MR27T6402L-xxxMA 44-pin plastic SOP (SOP44-P-600-1.27-K)
• MR27T6402L-xxxTN 48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K)
• MR27T6402L-xxxLY 48-ball BGA (P-TFBGA48-6.4x10.0-0.80) P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM. This exclusive LAPIS Semiconductor technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing. Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which include the following;
• Short lead time , since the P2ROM is programmed at the final stage of the production process, a large P2ROM inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive lead-time and minimize liability as a custom product.
• No mask charge , since P2ROMs do not utilize a custom mask for storing customer code, no mask charges apply.
• No additional programming charge, unlike Flash and OTP that require additional programming and handling costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput. The cost is included in the unit price.
• Custom Marking is available at no additional charge.
• Pin Compatible with Mask ROM and some FLASH products. NC NC NC NC A15 A14 A13 A12 48TSOP(Type-I) A21 A18 A17 CE# V SS OE# D10 D11 A20 A 19 2 A 10 5 A 11 6 A 12 7 A 13 8 A 14 9 A 15 10 A 16 11 BYT E# 12 VSS 13 D 15/A–1 14 D 14 16 D 13 18 D 12 20 VCC 22 44SOP A16 BYTE# V SS D15/A–1 D14 D13 D12 V CC D11 D10 OE# V SS CE#

PIN CONFIGURATION (TOP VIEW): BGA PACKAGE TOP View - Ball Side Down A3 A7 NC NC A9 A13 A4 A17 NC NC A8 A12 A2 A6 A18 A21 A10 A14 A1 A5 A20 A19 A11 A15 A0 D0 D2 D5 D7 A16 CE# D8 D10 D12 D14 BYTE# OE# D9 D11 VCC D13 D1 D3 D4 D6 VSS VSS H G F E D C B A 6541 2 3 D15 / A–1 48-ball BGA

CE# BYTE# OE# CE OE × 8/× 16 Switch D0 D2 D4 D6 D8 D10 D12 D14 Memory Cell Matrix 4M × 16-Bit or 8M × 8-Bit Multiplexer Output Buffer Row Decoder Column Decoder Address Buffer A–1 A A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 In 8-bit output mode, these pins are placed in a high-Z state and pin D15 functions as the A-1 address pin. PIN DESCRIPTIONS Pin name Functions D15 / A–1 Data output / Address input A0 to A21 Address inputs D0 to D14 Data outputs CE# Chip enable input OE# Output enable input BYTE# Word / Byte select input VCC Power supply voltage VSS Ground NC No connect

Mode CE# OE# BYTE# VCC D0 to D7 D8 to D14 D15/A–1 Read (16-Bit) L L H DOUT Read (8-Bit) L L L DOUT Hi–Z L/H H Output disable L H L Hi–Z H Standby H ∗ L 2.7 V to 3.6 V Hi–Z ∗: Don’t Care (H or L) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Value Unit Operating temperature under bias Ta 0 to 70 °C Storage temperature Tstg — –55 to 125 °C Input voltage VI –0.5 to VCC+0.5 V Output voltage VO –0.5 to VCC+0.5 V Power supply voltage VCC relative to VSS –0.5 to 5 V Power dissipation per package PD Ta = 25°C 1.0 W Output short circuit current IOS — 10 mA RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70°C) Parameter Symbol Condition Min. Typ. Max. Unit VCC power supply voltage VCC 2.7 — 3.6 V Input “H” level VIH 2.2 — VCC+0.5∗ V Input “L” level VIL VCC = 2.7 to 3.6 V –0.5∗∗ — 0.6 V Voltage is relative to VSS. ∗ : Vcc+1.5V (Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V (Min.) when pulse width of undershoot is less than 10ns. PIN CAPACITANCE (VCC = 3.0 V, Ta = 25°C, f = 1 MHz) Parameter Symbol Condition Min. Typ. Max. Unit Input C IN1 — — 12 BYTE# C IN2 VI = 0 V — — 200 Output C OUT V O = 0 V — — 12 pF

ELECTRICAL CHARACTERISTICS

(VCC = 2.7 V to 3.6 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Typ. Max. Unit Input leakage current ILI V I = 0 to VCC — — 10 μA Output leakage current ILO V O = 0 to VCC — — 10 μA ICCSC CE# = VCC — — 10 μA VCC power supply current (Standby) ICCST CE# = VIH — — 1 mA VCC power supply current (Read) ICCA CE# = VIL, OE# = VIH f=5MHz — — 20 mA Input “H” level VIH — 2.2 — VCC+0.5∗ V Input “L” level VIL — –0.5∗∗ — 0.6 V Output “H” level VOH I OH = –1 mA 2.4 — — V Output “L” level VOL I OL = 2 mA — — 0.4 V Voltage is relative to VSS. ∗ : Vcc+1.5V (Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V (Min.) when pulse width of undershoot is less than 10ns.

(VCC = 2.7 V to 3.6 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Max. Unit Address cycle time tC — 90 — ns Address access time tACC CE# = OE# = VIL — 90 ns CE# access time tCE OE# = VIL — 90 ns OE# access time tOE CE# = VIL — 30 ns tCHZ OE# = VIL 0 30 ns Output disable time tOHZ CE# = VIL 0 25 ns Output hold time tOH CE# = OE# = VIL 0 — ns (VCC = 3.0 V to 3.6 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Max. Unit Address cycle time tC — 70 — ns Address access time tACC CE# = OE# = VIL — 70 ns CE# access time tCE OE# = VIL — 70 ns OE# access time tOE CE# = VIL — 30 ns tCHZ OE# = VIL 0 20 ns Output disable time tOHZ CE# = VIL 0 20 ns Output hold time tOH CE# = OE# = VIL 0 — ns Measurement conditions Output load Output 50 pF (Including scope and jig)

TIMING CHART (READ CYCLE) 16-BIT READ MODE (BYTE# = V IH) Hi tC tCE tOE tOH tCHZ tOHZ Valid DataHi-Z tOH Valid Data tACC tC tACC A0 to A21 CE# OE# D0 to D15 -BIT READ MODE (BYTE# = VIL) Hi tC tCE tOE tOH tCHZ tOHZ Valid DataHi-Z tOH Valid Data tACC tC tACC A-1 to A21 CE# OE# D0 to D7

(Unit: mm) No tes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).

(Unit: mm) Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).

(Unit: mm) Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 10/

REVISION HISTORY

No. Date Previous Edition Current Edition

Description

FEDR27T6402L-02-01 May. 9, 2005 – – Final edition 1 1,5 1,5 Change tC, tACC, tCE (3.0V to 3.6V )to 70ns 5 5 Changed Input signal level from “0V/3V” to “0V/Vcc”. FEDR27T6402L-002-02 Oct. 30, 2008 – – Changed company logo and name to OKI SEMICONDUCTOR FEDR27T6402L-002-03 Jan. 6, 2009 1 1,2,10 Add MR27T6402L-xxxLY (BGA package) 11/

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