DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 8

Technical content

Issue Date: Oct. 01, 2008 MR26V6455J 2M–Word  32–Bit or 4M–Word  16–Bit Page Mode P2ROM FEATURES PIN CONFIGURATION (TOP VIEW) NC NC A20 WORD# OE# CE# Vss D31/A-1 D15 D30/A-1 D14 Vss Vcc D29 D13 D28 D12 D27 D11 D26 D10 Vss Vcc D25 D24 Vcc A19 A18 A17 A16 A15 A14 A13 Vcc D16 D17 Vss Vcc D18 D19 D20 D21 Vss Vcc

  • 2,09 7,152-word  32-bit / 4,194,304-word  16-bit electrically switchable configuration
  • Page size of 8-word x 32-Bit or 16-word x 16-Bit
  • 3.0 V to 3.6 V power supply
  • Random Access time 100 ns MAX
  • Page Access time 30ns MAX
  • Operating current 100 mA MAX
  • Standby current 20 µA MAX
  • Input/Output TTL compatible
  • Three-state output PACKAGES
  • MR26V6455J-xxxMB 70-pin plastic SSOP (P-SSOP70-500-0.80-EK-MC) P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM. This exclusive LAPIS Semiconductor technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing. Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which include the following;
  • Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM inventory "bank system" of un-programmed packaged products are maintained to provide an ag gressive lead-time and minimize liability as a D7cu stom product.
  • No mask charge, since P2ROMs do not utilize a D2 c ustom mask for storing customer code, no mask Vs s ch arges apply. A6· No additional programming charge, unlike Flash and A7 OTP that require additional programming and handling costs, the P2ROM already has the code A8 loaded at th e factory with minimal effect on the A9 p roduction throughput. The cost is included in A10th e unit price.
  • Custom Marking is available at no additional charge. A11 A12

A-1(D × 16/×

32 Switch

CE# OE# WORD# CE OE Row Decoder Me mory Cell Matrix PIN DESCRIPTIONS Pin name Functions D31 / A-1,D30/A-1 Data output / Address input A0 to A20 Address inputs D0 to D29 Data outputs CE# Chip enable input OE# Output enable input WORD# Word -Byte select input VCC Power supply voltage VSS Ground A4 A5 × 32-Bit or 4M × 16-Bit A6 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 D2 D4 D6 D8 D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 D30 Multiplexer Output Buffer C olumn Decoder Addres s Buffer D1 D3 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D25 D27 D29 D31 In16-bit output mode, these pins are placed in a high-Z state and pin D31,D30 functions as the A-1 address pin.

Mode CE# OE# WORD# VCC D0 to D15 D16 to D29 D30/A–1,D31/A-1 Read (32-Bit) L L H DOUT Read (16Bit) L L L DOUT Hi–Z L/H H Output disable L H L Hi–Z  H Standby H  L 3.3 V Hi–Z  : Don’t Care (H or L) ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Value Unit Operating temperature under bias Ta 0 to 70 °C Storage temperature Tstg — –55 to 125 °C Input voltage VI –0.5 to VCC+0.5 V Output voltage VO –0.5 to VCC+0.5 V Power supply voltage VCC relative to VSS –0.5 to 5 V Power dissipation per package PD Ta = 25°C 1.0 W Output short circuit current IOS — 10 mA RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70°C) Parameter Symbol Condition Min. Typ. Max. Unit VCC power supply voltage VCC 3.0 — 3.6 V Input “H” level VIH 2.2 — VCC+0.5 V Input “L” level VIL VCC = 3.0 to 3.6 V –0.5 — 0.6 V Voltage is relative to VSS.  : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.  : -1.5V(Min.) when pulse width of undershoot is less than 10ns. PIN CAPACITANCE (VCC = 3.3 V, Ta = 25°C, f = 1 MHz) Parameter Symbol Condition Min. Typ. Max. Unit Input C IN1 — — 20 WORD# C IN2 VI = 0 V — — 400 Output C OUT V O = 0 V — — 20 pF

ELECTRICAL CHARACTERISTICS

(VCC = 3.3 V ± 0.3 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Typ. Max. Unit Input leakage current ILI V I = 0 to VCC — — 10 A Output leakage current ILO V O = 0 to VCC — — 10 A ICCSC CE# = VCC — — 20 A VCC power supply current (Standby) ICCST CE# = VIH — — 1 mA VCC power supply current (Read) ICCA1 CE# = VIL OE#= VIH tc = 5MHz — — 100 mA Input “H” level VIH — 2.2 — VCC+0.5 V Input “L” level VIL — –0.5 — 0.6 V Output “H” level VOH I OH = –2 mA 2.4 — — V Output “L” level VOL I OL = 2 mA — — 0.4 V Voltage is relative to VSS.  : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.  : -1.5V(Min.) when pulse width of undershoot is less than 10ns. AC Characteristics (VCC = 3.3 V ± 0.3 V, Ta = 0 to 70°C) Parameter Symbol Condition Min. Max. Unit Address cycle time tC — 100 — ns Address access time tACC CE# = OE# = VIL — 100 ns Page cycle time tPC — 30 — ns Page access time tPAC CE# = OE# = VIL — 30 ns CE# access time tCE OE# = VIL — 100 ns OE# access time tOE CE# = VIL — 30 ns tCHZ OE# = VIL 0 20 ns Output disable time tOHZ CE# = VIL 0 20 ns Output hold time tOH CE# = OE# = VIL 0 — ns Measurement conditions Input signal level 0 V/3 V Input timing reference level 1/2Vcc Output load 50 pF Output timing reference level 1/2Vcc Output load Output 50 pF (Including scope and jig)

TIMING CHART (READ CYCLE) Random Access Mode Read Cycle Address CE# OE# Dout tC tCE Va ta tOE tOH tCHZ tOHZ lid D a Hi-Z Hi-Z tOH tACC Va talid Da tACC tC Page Access Mode Read Cycle A3 to A20 tC tCE tOE tACC tOH tCHZ tOHZ Hi-Z Hi-Z Dout tPAC A-1 to A2 (x16 mode) tPC tPC tPAC A0 to A2 (x32 mode) CE# OE#

(Unit: mm) No tes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).

REVISION HISTORY

No. Date Previous Edition Current Edition

Description

FEDR26V6455J-02-01 Oct.30, 2007 – – Final edition 1 1 1 Deleted “Pin Compatible with Mask ROM”. FEDR26V6455J-002-02 Oct.1, 2008 – – Changed company logo and name to OKI SEMICONDUCTOR

No copying or reproduction of this document, in part or in whole, is permitted without the consent of LAPIS Semiconductor Co., Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing LAPIS Semiconductor's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from LAPIS Semiconductor upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, LAPIS Semiconductor shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. LAPIS Semiconductor does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by LAPIS Semiconductor and other parties. LAPIS Semiconductor shall bear no responsibility what soever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation eq uipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While LAPIS Semiconductor always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. LAPIS Semiconductor shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). LAPIS Semiconductor shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Copyright 2008 - 2011 LAPIS Semiconductor Co., Ltd.