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TEL: 886-3-572-8688 www.padauk.com.tw MF616 3-Phase Brushless DC Motor Controller Data Sheet Version 0. 01 – Apr. 14, 2020 Copyright 2020 by PADAUK Technology Co., Ltd., all rights reserved.
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 2 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 IMPORTANT NOTICE PADAUK Technology reserves the right to make changes to its products or to terminate production of its products at any time without notice. Customers are strongly recommended to contact PADAUK Technology for the latest information and verify whether the information is correct and complete before placing orders. PADAUK Technology products are not warranted to be suitable for use in life -support applications or other critical application s. PADAUK Technology assumes no liability for such applications. Critical applications include, but are not limited to, those that may involve potential risks of death, personal injury, fire or severe property damage. PADAUK Technology assumes no responsi bility for any issue caused by a customer’s product design. Customers should design and verify their products within the ranges guaranteed by PADAUK Technology. In order to minimize the risks in customers’ products, customers should design a product with adequate operating safeguards.
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 3 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 Table of Contents
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 4 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 Revision History: Revision Date Description 0.00 2019/12/27 Preliminary version 0.01 2020/04/14 Update DC/AC Characteristics: fSYS, RPH, fIHRC, fILRC
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 5 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 1. Key Features 3-Phase brushless DC motor with hall IC interface PWM or voltage control input FG/RD/ALM/RALN/RXX/RRXX output Alarm output Reverse brake control Software hall degree forward and backward Close loop or/and open loop control Current limit and over-current protection Under voltage lock out protection Over voltage lock out protection Soft-start, lock-protect and auto-restart System protection - Low-voltage detection with reset - Illegal opcode detection with reset MTP Programming - Support 6-wire factory programming mode - Support 4-wire in-system programming mode DC Fan Applications - Operating voltage range: 3.5V~5.5V - Operating temperature range: -40°C~105°C 16-pin SSOP16 package MF616 is a 3 -phase BLDC motor controller based on 8- bit 8 -FPPA MCU which can be programmed by 6-wire factory mode or 4- wire ISP mode. MF616 receives motor position signal from Hall IC and can control the six step square wave flexibly to make the best efficiency of the motor. Through the PADAUK patented AP development system, it can easily set any speed curve, output signal and protection parameters etc., and it can observe the motor response online immediately. Using the MF616’s development system, it’s much easier and adjustable for application.
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 6 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 2. Pin Diagram and Pin Description Pin No. Pin Name I/O Description
1 PWM_CL Output C output signal to control the low side of motor driver
2 PWM_BL Output B output signal to control the low side of motor driver
3 PWM_AL Output A output signal to control the low side of motor driver
4 ALARM_OUT Output Digital output to motor alarm
5 GND - Ground
6 HALL_C Input Digital input to sense motor position C
7 HALL_B Input Digital input to sense motor position B
8 HALL_A Input Digital input to sense motor position A
9 ISENSE_IN Input Analog input to sense motor current
10 VSENSE_IN Input Analog input to sense motor voltage
11 PWM_IN Input PWM control input
12 VDD - Positive power
13 FG Output Rotation speed detection
14 PWM_AH Output A output signal to control the high side of motor driver
15 PWM_BH Output B output signal to control the high side of motor driver
16 PWM_CH Output C output signal to control the high side of motor driver
MF616 (SSOP16-150mil) PWM_CL PWM_BL PWM_AL GND HALL_C HALL_B ALARM_OUT HALL_A PWM_CH PWM_BH PWM_AH FG VDD PWM_IN VSENCE_IN ISENCE_IN
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 7 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 3. Device Characteristics 3.1. Absolute Maximum Ratings Name Min Typ. Max Unit Notes Supply Voltage (VDD) 3.5 5.5 V Exceed the maximum rating may cause permanent damaged !! Input Voltage -0.3 VDD + 0.3 V Operating Temperature -40 105 °C Storage Temperature -50 125 °C Junction Temperature 150 °C 3.2. DC/AC Characteristics Symbol Description Min Typ Max Unit Conditions (Ta=25℃) VDD Operating Voltage 3.5 4.75 5.0 5.0 5.5
5.5 V -40 oC <Ta<85 oC
-40 oC <Ta<105 oC VFSV Forbidden V DD startup voltage range 0.7 1.6 V VPORV VDD power down release voltage 0.7 V TPOR VDD power on time (V DD from 0V to 5V) 50 ms TFSV VDD power on time during V FSV range 10 ms fSYS System clock IHRC IHRC Internal low RC oscillator 33.8K Hz VDD = 3.3V VDD = 2.5V VDD = 5.0V IOP Operating Current 1.8 3.5 150 mA mA uA uA fSYS=1MIPS@5.0V fSYS=8MIPS@5.0V fSYS=ILRC ~ 32KHz@5.0V fSYS=ILRC ~ 12KHz@3.3V IPD Power Down Current (by stopsys command) uA uA VDD=5.0V VDD=3.3V IPS Power Save Current (by stopexe command) 0.4 mA VDD=5.0V; Band-gap, LVD, IHRC, ILRC, Timer16 modules are ON. VIL Input low voltage for IO lines 0 0.2VDD V VIH Input high voltage for IO lines 0.8 VDD VDD V IOL IO lines sink current 11 14 17 mA VDD=5.0V, VOL=0.5V IOH IO lines drive current -8 -10 -12 mA VDD=5.0V, VOH=4.5V
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 8 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 Symbol Description Min Typ Max Unit Conditions (Ta=25℃) RPH Pull-high Resistance 90 170 KΩ VDD=5.0V VDD=3.3V VBRD Low Voltage Detect Voltage * (Brown-out voltage) 4.2 3.7 3.35 3.25 3.05 2.9 2.75 2.47 4.5 3.75 3.5 3.3 3.15 2.7 4.8 4.3 4.05 3.75 3.55 3.4 3.25 2.93 V VBG Band-gap Reference Voltage (before calibration) 1.12 1.20 1.28 V VDD=5V, 25oC Band-gap Reference Voltage * -40oC <Ta<105oC* fIHRC Frequency of IHRC after calibration * 15.52* 16* 16.48* MHz 25oC, VDD=3V~5.5V -40oC <Ta<105oC* fILRC Frequency of ILRC * 31.5* 33.8* 35* KHz VDD=5.0V, Ta=25oC 32* 34* 35.5* VDD=3.3V, Ta=25oC 29* 34* 40* VDD=3.3V, -40oC <Ta<85oC* VADC Workable ADC operating Voltage 2.5 5.0 V VAD AD Input Voltage 0 VDD V ADrs ADC resolution 11 bit ADclk ADC clock period 2 us 2.5V ~ 5.5V tADCONV ADC conversion time (TADCLK is the period of the selected AD conversion clock) TADCLK AD DNL ADC Differential NonLinearity ±3* LSB AD INL ADC Integral NonLinearity ±3* LSB ADos ADC offset* 3 LSB -40oC <Ta<85oC* -40oC <Ta<105oC* tINT Interrupt pulse width 30 ns VDD = 5.0V VDR RAM data retention voltage* 1.5 V In power-down mode. Watchdog timeout period (TILRC is the clock period of ILRC) 4096 misc[1:0]=01 16384 misc[1:0]=10 tSBP System boot-up period from power-on
1024 TILRC Where TILRC is the clock
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 9 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 Symbol Description Min Typ Max Unit Conditions (Ta=25℃) tWUP System wake-up period Fast wake-up by IO toggle from STOPEXE suspend
128 TSYS Where TSYS is the time
Fast wake-up by IO toggle from STOPSYS suspend, IHRC is the system clock
128 TSYS
Where T SIHRC is the stable time of IHRC from power-on. Fast wake-up by IO toggle from STOPSYS suspend, ILRC is the system clock Where T SILRC is the stable time of ILRC from power-on. Normal wake-up from STOPEXE or STOPSYS suspend 1024 TILRC Where TILRC is the clock period of ILRC HCPos Comparator offset* - ±10 ±20 mV HCPcm Comparator input common mode* 0 VDD-1.5 V HCPspt Comparator response time** 100 500 ns Both Rising and Falling HCPmc Stable time to change comparator mode 2.5 7.5 us *These parameters are for design reference, not tested for every chip. ** Response time is measured with comparator input at (VDD-1.5)/2 -100mV, and (VDD-1.5)/2+100mV The characteristic diagrams are the actual measured values. Considering the influence of production drift and other factors, the data in the table are within the safety range of the actual measured values.
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 10 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 4. Reference Application Circuit VDD_5V VCC_5V HALL_A PWM R33 0.1R R1206 R41 R0603 ALARM 10u/100V C1206 SOT-23 SOT-23 SOT-23 V ZD1 5.6V SOD-123 ALARM HALL_C R22 20K R0402 VDD 2.2n C0603 ISENSE_IN 15u/100V DIP(6.3*11) PWM_AH Q13 SOT-23 PWM_AL R16 R1206 HALL_C 1N4148 SOD-80 R27 10K R0603 COM R39 200K R0805 R1206 IN4148W SOD-123 R30 R0402 DFN3*31 3 2 PWM_CL U PHASE PWM_IN R28 10K R0603 R24 R0402 2.2n C0603 U W ISENSE_IN R18 R0402 R20 R0402 PWM_BL TO-277A R1206 PWM_BH GND PWM_AL C10 NC C0603 TO-252 2 3 C17 100p C0805 HALL_B ALARM TO-277A C15 100p C0603 R40 15K R0805 HALL_B R12 1.8k R2512 R14 R0805 R43 10K R0603 TO-2521 Q11 TO-2521 R21 20K R0402 Q12 SOT-23 FG R11 1.8k R2512 U VCC_5V Q14 SOT-23 VPP VCC_5V R31 10K R0402 R10 20k R1206 PWM_CH V W PHASE TO-252 2 3 FG_OUT R36 R0402 220n C0603 R34 0.1R R1206 SOT-23 Out Vcc GND R0402 R0402 R0402 GND C12 NC C0603 HALL_A SOT-23 Out Vcc GND R1206 R37 5.1R R0603 PWM_CH C11 NC C0603 R38 10K R0603 PWM_BL ALARM_OUT C13 100p C0603 W R26 10K R0603 2.2n C0603 R29 100R R0603 FG C14 100p C0603 VCC_5V R25 10K R0402 R1206 TO-252 2 3 4.7u C0805 R19 R0402 FG Singnal 100p C0805 DC Fan SSOP16 PA1 PA0/INT0 PA7/NC/X 1 PA6/CKIN/X 2 VDD PB7/AD7 PB6/AD6 PB5/AD5 PA2 PA3 PA4 PA5/PRST# GND PB0/INT1/AD0 PB1/AD1 PB2/AD2 PWM_AH FG_OUT PWM_IN R23 20K R0402 R1206 VSENSE_IN PWM_CL 0.1u C0603 V PHASE C16 0.1u C0603 PWM_BH R13 R0805 R15 R0805 SOT-23 Out Vcc GND R42 5.1R R0603 R17 R0603 Q10 TO-2521 PWM Singnal R32 10K R0603 VDD VCC_5V PWM VSENSE_IN VCC_48V VCC_5V R1206 R35 10K R0402ALARM Singnal TO-252
3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 11 of 11 PDK-DS-MF616_V001 – Apr. 14, 20 20 5. Package Information: SSOP16 (150mil)