MF520 | DigiCamel IC Datasheet

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3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 2 of 12 PDK-DS-MF520_V001 – Apr. 14, 2020 IMPORTANT NOTICE PADAUK Technology reserves the right to make changes to its products or to terminate production of its products at any time without notice. Customers are strongly recommended to contact PADAUK Technology for the latest information and verify whether the information is correct and complete before placing orders. PADAUK Technology products are not warranted to be suitable for use in life -support applications or other critical application s. PADAUK Technology assumes no liability for such applications. Critical applications include, but are not limited to, those that may involve potential risks of death, personal injury, fire or severe property damage. PADAUK Technology assumes no responsi bility for any issue caused by a customer’s product design. Customers should design and verify their products within the ranges guaranteed by PADAUK Technology. In order to minimize the risks in customers’ products, customers should design a product with adequate operating safeguards.

3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 4 of 12 PDK-DS-MF520_V001 – Apr. 14, 2020 Revision History: Revision Date Description 0.00 2020/01/07 Preliminary version 0.01 2020/04/14 1. Amend Chapter 1 and Section 3.1: Operating Temperature 2. Update DC/AC Characteristics: VDD, fSYS, RPH, fIHRC, fILRC, ADos

3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 5 of 12 PDK-DS-MF520_V001 – Apr. 14, 2020 1. Key Features  3-Phase brushless DC motor with hall IC interface  Sine wave / square wave  PWM or voltage control input  FG output  Software hall degree forward  Close loop or/and open loop control  Current limit and over-current protection  Lock-protect and auto-restart  System protection - Low-voltage detection with reset - Illegal opcode detection with reset  MTP Programming - Support 6-wire factory programming mode - Support 4-wire in-system programming mode  BLDC Applications - Operating voltage range: 3.5V~5.5V - Operating temperature range: -40°C~85°C  20-pin SSOP20 package MF520 is a 3 -phase BLDC motor controller based on 8- bit 8 -FPPA MCU which can be programmed by 6-wire factory mode or 4- wire ISP mode. MF520 receives motor position signal from Hall IC and can control the sine wave or six step square wave flexibly to make the best efficiency of the motor. Through the PADAUK patented AP development system, it can easily set any speed curve, output signal and pr otection parameters etc., and it can observe the motor response online immediately. Using the MF 520’s development system, it ’s much easier and adjustable for application.

1 PWM_CL Output C output signal to control the low side of motor driver

2 PWM_BL Output B output signal to control the low side of motor driver

3 PWM_AL Output A output signal to control the low side of motor driver

4 PA5 I/O Digital input / digital output / analog input

5 NC - NA

6 GND - Ground

7 HALL_C Input Digital input to sense motor position C

8 HALL_B Input Digital input to sense motor position B

9 HALL_A Input Digital input to sense motor position A

10 PB3 I/O Digital input / digital output / analog input

11 PB4 I/O Digital input / digital output / analog input

12 ISENSE Input Analog input to sense motor current

13 FW/REV Input Forward / Reverse control input

14 PWM_IN Input PWM control input

15 VDD - Positive power

16 NC - NA

17 FG Output Rotation speed detection

18 PWM_AH Output A output signal to control the high side of motor driver

19 PWM_BH Output B output signal to control the high side of motor driver

20 PWM_CH Output C output signal to control the high side of motor driver

MF520 (SSOP20-150mil) PWM_CL PWM_BL PWM_AL NC HALL_C HALL_B PA5 HALL_A PWM_CH PWM_BH PWM_AH FG NC FW/REV ISENCE PB4 PB3 PWM/VSP VDD GND

3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 7 of 12 PDK-DS-MF520_V001 – Apr. 14, 2020 3. Device Characteristics 3.1. Absolute Maximum Ratings Name Min Typ. Max Unit Notes Supply Voltage (VDD) 3.5 5.5 V Exceed the maximum rating may cause permanent damaged !! Input Voltage -0.3 VDD + 0.3 V Operating Temperature -40 85 °C Storage Temperature -50 125 °C Junction Temperature 150 °C 3.2. DC/AC Characteristics Symbol Description Min Typ Max Unit Conditions (Ta=25℃) VDD Operating Voltage 3.5 5.0 5.5 V -40 oC <Ta<85 oC VFSV Forbidden V DD startup voltage range 0.7 1.6 V VPORV VDD power down release voltage 0.7 V TPOR VDD power on time (V DD from 0V to 5V) 50 ms TFSV VDD power on time during V FSV range 10 ms fSYS System clock IHRC IHRC Internal low RC oscillator 33.8K Hz VDD = 3.3V VDD = 2.5V VDD = 5.0V IOP Operating Current 1.8 3.5 150 mA mA uA uA fSYS=1MIPS@5.0V fSYS=8MIPS@5.0V fSYS=ILRC ~ 32KHz@5.0V fSYS=ILRC ~ 12KHz@3.3V IPD Power Down Current (by stopsys command) uA uA VDD=5.0V VDD=3.3V IPS Power Save Current (by stopexe command) 0.4 mA VDD=5.0V; Band-gap, LVD, IHRC, ILRC, Timer16 modules are ON. VIL Input low voltage for IO lines 0 0.2VDD V VIH Input high voltage for IO lines 0.8 VDD VDD V IOL IO lines sink current 11 14 17 mA VDD=5.0V, VOL=0.5V IOH IO lines drive current -8 -10 -12 mA VDD=5.0V, VOH=4.5V RPH Pull-high Resistance 170 KΩ VDD=5.0V VDD=3.3V VBRD Low Voltage Detect Voltage * 4.2 4.5 4.8 V

3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 8 of 12 PDK-DS-MF520_V001 – Apr. 14, 2020 Symbol Description Min Typ Max Unit Conditions (Ta=25℃) (Brown-out voltage) 3.7 3.35 3.25 3.05 2.9 2.75 2.47 3.75 3.5 3.3 3.15 2.7 4.3 4.05 3.75 3.55 3.4 3.25 2.93 VBG Band-gap Reference Voltage (before calibration) 1.12 1.20 1.28 V VDD=5V, 25oC Band-gap Reference Voltage * -40oC <Ta<85oC* fIHRC Frequency of IHRC after calibration * 15.52* 16* 16.48*1 6.32* MHz 25oC, VDD=3V~5.5V -40oC <Ta<105oC* fILRC Frequency of ILRC * 20.4* 24* 27.6* KHz VDD=5.0V, Ta=25oC 7.8* 12* 16.2* VDD=3.3V, -40oC <Ta<85oC* VADC Workable ADC operating Voltage 2.5 5.0 V VAD AD Input Voltage 0 VDD V ADrs ADC resolution 11 bit ADclk ADC clock period 2 us 2.5V ~ 5.5V tADCONV ADC conversion time (TADCLK is the period of the selected AD conversion clock) TADCLK AD DNL ADC Differential NonLinearity ±3* LSB AD INL ADC Integral NonLinearity ±3* LSB ADos ADC offset* 3 LSB -40oC <Ta<85oC* -40oC <Ta<105oC* tINT Interrupt pulse width 30 ns VDD = 5.0V VDR RAM data retention voltage* 1.5 V In power-down mode. Watchdog timeout period (TILRC is the clock period of ILRC) 4096 misc[1:0]=01 16384 misc[1:0]=10 tSBP System boot-up period from power-on

1024 TILRC Where TILRC is the clock

3-Phase BLDC Motor Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 9 of 12 PDK-DS-MF520_V001 – Apr. 14, 2020 Symbol Description Min Typ Max Unit Conditions (Ta=25℃) tWUP System wake-up period Fast wake-up by IO toggle from STOPEXE suspend

128 TSYS Where TSYS is the time

Fast wake-up by IO toggle from STOPSYS suspend, IHRC is the system clock

128 TSYS

Where T SIHRC is the stable time of IHRC from power-on. Fast wake-up by IO toggle from STOPSYS suspend, ILRC is the system clock Where T SILRC is the stable time of ILRC from power-on. Normal wake-up from STOPEXE or STOPSYS suspend 1024 TILRC Where TILRC is the clock period of ILRC HCPos Comparator offset* - ±10 ±20 mV HCPcm Comparator input common mode* 0 VDD-1.5 V HCPspt Comparator response time** 100 500 ns Both Rising and Falling HCPmc Stable time to change comparator mode 2.5 7.5 us *These parameters are for design reference, not tested for every chip. ** Response time is measured with comparator input at (VDD-1.5)/2 -100mV, and (VDD-1.5)/2+100mV The characteristic diagrams are the actual measured values. Considering the influence of production drift and other factors, the data in the table are within the safety range of the actual measured values.

Product Information

MF520 specifications and overview.

Summary

3-Phase Brushless DC Motor Controller

Description

3-Phase Brushless DC Motor Controller

Source title MF520 Datasheet(PDF) - PADAUK Technology.

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