MB88151APNF-G-100-JNE1

MB88151A CYPRESS | Alldatasheet

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The following document contains information on Cypress products. The document has the series name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will offer these products to new and existing customers with the series name, product name, and ordering part number with the prefix “CY”. How to Check the Ordering Part Number 1. Go to www.cypress.com/pcn. 2. Enter the keyword (for example, ordering part number) in the SEARCH PCNS field and click Apply. 3. Click the corresponding title from the search results. 4. Download the Affected Parts List file, which has details of all changes For More Information Please contact your local sales office for additional information about Cypress products and solutions. About Cypress Cypress is the leader in advanced embedded system solutions for the world's most innovative automotive, industrial, smart home appliances, consumer electronics and medical products. Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable, high-performance memories help engineers design differentiated products and get them to market first. Cypress is committed to providing customers with the best support and development resources on the planet enabling them to disrup t markets by creating new product categories in record time. To learn more, go to www.cypress.com.

Spread Spectrum Clock Generator Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 002-08311 Rev. *B Revised December 18, 2017 MB88151A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. It corresponds to both of the center spread which modulates frequency in modulation off as Middle Centered and down spread which modulates so as not to exceed frequency in modulation off.

Features

■ Modulation rate : ± 0.5%, ± 1.5% (Center spread), − 1.0%, − 3.0% (Down spread) ■ Equipped with oscillation circuit : Range of oscillation 16.6 MHz to 33.4 MHz ■ Modulation clock output Duty : 40% to 60% ■ Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load) ■ Power supply voltage : 3.3 V ± 0.3 V ■ Operating temperature : − 40 °C to + 85 °C ■ Package : SOP 8-pin MB88151A-100 (Multiply-by-1) MB88151A-200 (Multiply-by-2) Input frequency/ Output frequency 16.6 MHz to 33.4 MHz/ 16.6 MHz to 33.4 MHz 16.6 MHz to 33.4 MHz/ 33.2 MHz to 66.8 MHz Modulation clock cycle-cycle jitter Less than100 ps Less than 100 ps

Document Number: 002-08311 Rev. *B Page 3 of 26 MB88151A 1. Product Lineup MB88151A has five kinds of multiplication type. 2. Pin Assignment 3. Pin Description * : XPD = 800 kΩ pull-up resistor at “L” Product Input Frequency Range Multiplier Ratio Output Frequency Range MB88151A-100 16.6 MHz to 33.4 MHz Multiply-by-1 16.6 MHz to 33.4 MHz MB88151A-200 Multiply-by-2 33.2 MHz to 66.8 MHz Pin Name I/O Pin No. Description XIN I 1 Resonator connectio n pin/clock input pin VSS ⎯ 2 GND pin SEL0 I 3 Modulation rate setting pin SEL1 I 4 Modulation rate setting pin CKOUT O 5 Modulated clock output pin ENS/XPD I 6 Modulation enable setti ng pin (with pull-up resistance)/ Power down pin (with pull-up resistor)* V DD ⎯ 7 Power supply voltage pin XOUT O 8 Resonator connection pin XIN V SS SEL0 SEL1 XOUT V DD ENS/XPD CKOUT MB88151A TOP VIEW SOB008

Document Number: 002-08311 Rev. *B Page 4 of 26 MB88151A 4. I/O Circuit Type (Continued) Pin Circuit Type Remarks SEL0, SEL1 CMOS hysteresis input ENS ■ With 50 kΩ pull-up resistors ■ CMOS hysteresis input XPD ■ With 50 kΩ + 800 kΩ pull-up resistors Note : If “L” is input to XPD, 50 kΩ pull-up resistor is disconnected. ■ CMOS hysteresis input 50 kΩ 800 kΩ 50 kΩ

Document Number: 002-08311 Rev. *B Page 5 of 26 MB88151A (Continued) Note : For XIN and XOUT pins, refer to “Oscillation Circuit”. Pin Circuit Type Remarks CKOUT ■ CMOS output ■ IOL = 4 mA

Document Number: 002-08311 Rev. *B Page 6 of 26 MB88151A 5. Handling Devices

5.1 Preventing Latch-up

A latch-up can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an input or output pin or (b) a voltage higher than the rating is applied between VDD pin and VSS pin. The latch-up, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the maximum rating.

5.2 Handling Unused Pins

Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or pull-down resistor. Unused output pin should be opened.

5.3 The Attention when the External Clock is Used

Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock. Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.

5.4 Power Supply Pins

Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source. We recommend connecting electrolytic capacitor (about 10 μF) and the ceramic capacitor (about 0.01 μF) in parallel between VSS pin and VDD pin near the device, as a bypass capacitor.

5.5 Oscillation Circuit

Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring. Design the printed circuit board that surrounds the XIN and XOUT pins with ground.

Document Number: 002-08311 Rev. *B Page 7 of 26 MB88151A 6. Block Diagram M N L IDAC ICO VDD CKOUT VSS Rf = 1 MΩ SEL1 XOUT XIN SEL0 ENS/XPD Modulation clock output Modulation rate setting Modulation rate setting Modulation enable setting/ Power down setting Reference clock PLL block Reference clock Phase compare V/I conversion Modulation logic Modulation rate setting/ Modulation enable setting Loop filter Modulation clock output MB88151A PLL block Charge pump A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing EMI.

Document Number: 002-08311 Rev. *B Page 8 of 26 MB88151A 7. Pin Setting When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization wait time for the modulation clock take the maximum value of “Electrical Characteristics AC Characteristics Lock-up time”. ENS Modulation Enable Setting (MB88151A-100/200) Note : Spectrum does not spread when “L” is set to ENS. The clock with low jitter can be obtained. Because of ENS has Pull-up resistance, spectrum spread when “H” is set to it or open the terminal. SEL0, SEL1 Modulation Rate Setting Note : The modulation rate can be changed at the level of the terminal. ENS Modulation L No modulation H Modulation SEL1 SEL0 Modulation Rate Modulation Type LL ± 1.5% Center spread LH ± 0.5% Center spread HL − 1.0% Down spread HH − 3.0% Down spread

Document Number: 002-08311 Rev. *B Page 9 of 26 MB88151A ■ Center Spread Spectrum is spread (modulated) by centering on the frequency in modulation off. ■ Down Spread Spectrum is spread (modulated) below the frequency in modulation off. −1.5% +1.5% Radiation level Frequency Frequency in modulation off Center spread example of ± 1.5% modulation rate Modulation width 3.0% −3.0% Frequency in modulation off Frequency Radiation level Down spread example of − 3.0% modulation rate Modulation width 3.0%

Document Number: 002-08311 Rev. *B Page 10 of 26 MB88151A 8. Absolute Maximum Ratings * : The parameter is based on VSS = 0.0 V. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Parameter Symbol Rating Unit Min Max Power supply voltage* V DD − 0.5 + 4.0 V Input voltage* V I VSS − 0.5 V DD + 0.5 V Output voltage* V O VSS − 0.5 V DD + 0.5 V Storage temperature T ST − 55 + 125 °C Operation junction temperature T J − 40 + 125 °C Output current I O − 14 + 14 mA Overshoot V IOVER ⎯ VDD + 1.0 (tOVER ≤ 50 ns) V Undershoot V IUNDER VSS−1.0 (tUNDER ≤ 50 ns) ⎯ V VDD VSSInput pin Overshoot/Undershoot tUNDER ≤ 50 ns tOVER ≤ 50 ns VIOVER ≤ VDD + 1.0 V VIUNDER ≤ VSS − 1.0 V

Document Number: 002-08311 Rev. *B Page 11 of 26 MB88151A 9. Recommended Operating Conditions (VSS = 0.0 V) WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. Parameter Symbol Pin Conditions Value Unit Min Typ Max Power supply voltage V DD VDD ⎯ 3.0 3.3 3.6 V “H” level input voltage V IH XIN, SEL0, SEL1, ENS ⎯ VDD × 0.8 ⎯ VDD + 0.3 V “L” level input voltage V IL ⎯ VSS ⎯ VDD × 0.2 V Input clock duty cycle tDCI XIN 16.6 MHz to

33.4 MHz 40 50 60 %

Operating temperature Ta ⎯⎯ − 40 ⎯ + 85 °C XIN ta tb 1.5 V Input clock duty cycle (tDCI = tb/ta)

Document Number: 002-08311 Rev. *B Page 12 of 26 MB88151A 10. Electrical Characteristics ■ DC Characteristics (Ta = − 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Symbol Pin Conditions Value Unit Min Typ Max Power supply current I CC VDD No load capacitance at output 24 MHz MB88151A-100 ⎯ 5.0 7.0 mA Output voltage VOH CKOUT “H” level output, IOH = − 4 mA VDD − 0.5 ⎯ VDD V VOL “L” level output, IOL = 4 mA VSS ⎯ 0.4 V Output impedance Z O CKOUT 16.6 MHz to 66.8 MHz ⎯ 45 ⎯Ω Input capacitance C IN XIN, SEL0, SEL1, ENS Ta = + 25 °C, V DD = VI = 0.0 V, f = 1 MHz ⎯⎯ 16 pF Load capacitance C L CKOUT 16.6 MHz to 66.8 MHz ⎯⎯ 15 pF Input pull-up resistance RPUE ENS V IL = 0.0 V 25 50 200 kΩ RPUP XPD V IL = 0.0 V 500 800 1200

Document Number: 002-08311 Rev. *B Page 13 of 26 MB88151A ■ AC Characteristics (Ta = − 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Note : The modulation clock stabilization wait time is required after the power is turned on, the IC recovers from power saving, or after FREQ (frequency range) or ENS (modulation ON/OFF) setting is changed. For the modulation clock stabilization wait time, assign the maximum value for lock-up time. Parameter Symbol Pin Conditions Value Unit Min Typ Max Oscillation frequency f x XIN, XOUT Fundamental oscillation 8.3 ⎯ 33.4 MHz Input frequency f in XIN External clock input (multiply-by-1, 2) 16.6 ⎯ 33.4 MHz Output frequency f OUT CKOUT MB88151A-100 (Multiply by 1) 16.6 ⎯ 33.4 MHz MB88151A-200 (Multiply by 2) 33.2 ⎯ 66.8 Output slew rate SR CKOUT 0.4 V to 2.4 V Load capacitance 15 pF 0.4 ⎯ 4.0 V/ns Output clock duty cycle t DCC CKOUT 1.5 V 40 ⎯ 60 % Modulation period (Number of input clocks per modulation) fMOD (nMOD) CKOUT MB88151A-100, MB88151A-200 fin/2200 (2200) fin/1900 (1900) fin/1600 (1600) kHz (clks) Lock-up time t LK CKOUT 16.6 MHz to 66.8 MHz ⎯ 25 m s Cycle-cycle jitter t JC CKOUT MB88151A-100 MB88151A-200 No load capacitance, Ta ⎯⎯ 100 ps-rms

Document Number: 002-08311 Rev. *B Page 14 of 26 MB88151A <Definition of modulation frequency and number of input clocks per modulation> MB88151A contains the modulation period to realize the efficient EMI reduction. The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) . Furthermore, the average value of fMOD equals the typical value of the electrical characteristics. t fMOD (Min) f MOD (Max) t Modulation waveform Clock time nMOD (Max) fOUT (Output frequency) Clock time nMOD (Min)

Document Number: 002-08311 Rev. *B Page 15 of 26 MB88151A 11. Output Clock Duty Cycle (tDCC = tb/ta) 12. Input Frequency (fin = 1/tin) 13. Output Slew Rate (SR) CKOUT 1.5 V ta tb

0.8 VDD

2.4 V 0.4 V tftr CKOUT

Document Number: 002-08311 Rev. *B Page 16 of 26 MB88151A 14. Cycle-cycle Jitter (tJC = | tn − tn+1 |) tn+1tn CKOUT Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after (or, immediately before) .

Document Number: 002-08311 Rev. *B Page 17 of 26 MB88151A 15. Modulation Waveform fMOD − 1.5 % + 1.5 % fMOD − 1.0 % − 0.5 % ■ ±1.5% modulation rate, Example of center spread ■ −1.0% modulation rate, Example of down spread CKOUT Output frequency CKOUT Output frequency Frequency at modulation OFF Frequency at modulation OFF Time Time

Document Number: 002-08311 Rev. *B Page 18 of 26 MB88151A 16. Lock-up Time If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”). For the input clock stabilization time, check the characteristics of the resonator or oscillator used. For modulation enable control using the ENS pin during normal operation, the set clock signal is output from CKOUT pin at most the lock-up time (tLK) after the level at the ENS pin is determined. Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-cycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time.

3.0 VVDD

SEL0, SEL1, ENS Internal clock stabilization wait time tLK (lock-up time ) VIL VIH XIN ENS CKOUT tLK (lock-up time ) tLK (lock-up time )

Document Number: 002-08311 Rev. *B Page 19 of 26 MB88151A When the power down is controlled by XPD pin, the desired clock is obtained after the pin is set to H level until the maximum lock- up time tLK is elapsed. XPD XIN CKOUT Internal clock stabilization wait time tLK (lock-up time)

Document Number: 002-08311 Rev. *B Page 20 of 26 MB88151A 17. Oscillation Circuit The figure below shows the connection example about general resonator. The oscillation circuit has the built-in resistance (Rf). The value of capacity (C1 and C2) is required adjusting to the most suitable value of individual resonator. The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which you use for the most suitable value. Input the clock to XIN pin, and do not connect anything with XOUT pin if you use the external clock (you do not use the resonator). Rf (1 MΩ) XIN Pin MB88151A LSI Internal MB88151A LSI External XOUT Pin ■ When using the resonator ■ When using an external clock OPEN Rf (1 MΩ) Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter characteristic. MB88151A LSI Internal MB88151A LSI External XOUT PinXIN Pin External clock

Document Number: 002-08311 Rev. *B Page 21 of 26 MB88151A 18. Interconnection Circuit Example MB88151A C 1 C2 C4 C3 SEL0 SEL1 Xtal ENS C1, C2 : Oscillation stabilization capacitance (refer to “Oscillation Circuit”.) C3 : Capacitor of 10 μF or higher C4 : Capacitor about 0.01 μF (connect a capacitor of good high frequency property (ex. laminated ceramic capacitor) to close to this device.) R1 : Impedance matching resistor for board pattern

Document Number: 002-08311 Rev. *B Page 22 of 26 MB88151A 19. Spectrum Example Characteristics The condition of the examples of the characteristic is shown as follows : Input frequency = 20 MHz (Output frequency = 20 MHz : Using MB88151A-100 (Multiply-by-1)), Power - supply voltage = 3.3 V, None load capacity, Modulation rate = ± 1.5% (center spread). Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz (ATT use for − 6dB). CH B Spectrum 10 dB /REF 0 dBm Avg RBW# 1 kHZ VBW 1 kHZ ATT 6 dB CENTER 20 MHZ SWP 2.505 s SPAN 4 MH Z No modulation −6.54 dBm ±1.5% modulation −24.45 dBm

Document Number: 002-08311 Rev. *B Page 23 of 26 MB88151A 20. Ordering Information Part Number Input Frequency Range Multiplier Ratio Output Frequency Range Package Remarks MB88151APNF-G-100-JNE1

16.6 MHz to

33.4 MHz

by-1 16.6 MHz to 33.4 MHz 8-pin plastic SOP (SOB008) MB88151APNF-G-200-JNE1 Multiply- by-2 33.2 MHz to 66.8 MHz MB88151APNF-G-100-JNEFE1 by-1 16.6 MHz to 33.4 MHz Emboss taping (EF type)MB88151APNF-G-200-JNEFE1 Multiply- by-2 33.2 MHz to 66.8 MHz MB88151APNF-G-100-JNERE1 by-1 16.6 MHz to 33.4 MHz Emboss taping (ER type)MB88151APNF-G-200-JNERE1 Multiply- by-2 33.2 MHz to 66.8 MHz

Document Number: 002-08311 Rev. *B Page 24 of 26 MB88151A 21. Package Dimension $7 '$780 + 127(6 L 1 1.05 REF L c 0.45 0.15 0.60 0.75 0.25 NOM.MIN. 6.00 BSC. E D A 1.30 5.05 BSC. 1.40 0.05 SYMBOL MAX. 1.50 1.75 0.25 ș E1 3.90 BSC b 0.36 0.44 0.52 e 1.27 BSC. DIMENSIONS L 2 0.25 BSC h 0.40 BSC. 11. JEDEC SPECIFICATION NO. REF : N/A D E1 E

0.20 C A-B D

e 0.10 C SEATING PLANE b 0.13 C A-B D SIDE VIEW TOP VIEW b SECTION A-A' c L GAUGE PLANE DETAIL A L2ș A

0.25 H D;

0.25 H D

㻭 㻰 㻯 INDEX AREA h 45° SIDE VIEW BOTTOM VIEW 㻮 002-15856 Rev.**

Document Number: 002-08311 Rev. *B Page 25 of 26 MB88151A Document History Spansion Publication Number: DS04-29127-3E Document Title: MB88151A Spread Spectrum Clock Generator Document Number: 002-08311 Revision ECN Orig. of Change Submission Date Description of Change ** – TAOA 06/29/2009 Initial Release *A 5569547 TAOA 12/30/2016 Updated to Cypress Template *B 5993569 TAOA 12/18/2017 Deleated EOL part number: MB88151A-101/201/400/401/500/501/800/801 Updated Package Dimensions: Updated to Cypress format. Changed the package name from FPT-8P-M02 to SOB008.

Document Number: 002-08311 Rev. *B Revi sed December 18, 2017 Page 26 of 26 © Cypress Semiconductor Corporation, 2007-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document, including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Softwa re provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited. TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent permitted by applicable law, Cypr ess reserves the right to make changes to this document without further notice. Cypress does n ot assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (inc luding resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whol e or in part, and you s hall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unin tended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. MB88151A Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products ARM® Cortex® Microcontrollers cypress.com/arm Automotive cypress.com/automotive Clocks & Buffers cypress.com/clocks Interface cypress.com/interface Internet of Things cypress.com/iot Memory cypress.com/memory Microcontrollers cypress.com/mcu PSoC cypress.com/psoc Power Management ICs cypress.com/pmic Touch Sensing cypress.com/touch USB Controllers cypress.com/usb Wireless Connectivity cypress.com/wireless PSoC® Solutions PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 Cypress Developer Community Forums | WICED IOT Forums | Projects | Video | Blogs | Training | Components Technical Support cypress.com/support