MSM5832 OKI | Alldatasheet
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DECEMBER 1983 = a | Fe] Fee semiconductor Ee) MSM5832 MICROPROCESSOR REAL-TIME 3 CLOCK/CALENDAR 3 GENERAL DESCRIPTION FEATURES Sg | The susese ‘Ss a monolithic, metal-gate CMOS integrated + Microprocessor bus-oriented be] circuit at tunctons aga foal time cuckyeaiender aren t vod min 5 ocessor ‘applications. The on-chip 32.768 TIME MONTH DATE YEAR DAY OF WEEK oO ‘Hz crystal controlled oscillator time base is counted down to 23:59:58 12 7 ou - 8 ? provide addressable 4-bit 1/0 data of SECONDS, MINUTES, + 4BIT DATA BUS. QO HOURS, DAY-OF-WEEK, DATE, MONTH, and YEAR. Oata ac- + 4-BIT ADDRESS: m hold neu. Omer tnctons nce 12M/aeniomeasekens,_* ORG. Wt Hold, Chip esac input o feap year identification and manual + 30 second correction. ‘+ Interrupt signal outputs— 1024, 1, 1/60, 1/3600 Hz o The MSMS5B32 normally operates trom a § volt ++ 5% supply. + 32.768 KHz crystal contralled operation Battery back-up operation down to 2.2 volts allows continuation» Leap year register bit [o} cline keping when manpower ttt Ono tctoatinc yr Ym wt 4 Ines rapid toating of to time Keeping Operations, Yoo Meut882 is ‘oferedin an teieeo anna laste (RS guttix) package. * #30 second error correction * Single § volt power supply Ps] + Back-up battery operation to VoD=2.2 V m * Low Power Dissipation > 90 uw Max. at VoD=3 V 2.5 mw Max. at VOD=5 V rr + High Density 200 mil 18.Pin Package 4 —_ TJ, ess—Od PF FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION = ATO veo TY SP nao nem] © Lr] wn) 7 Be ° a moa fan r a : Face rere (= oot ttt | ag Fa vesr fo} {) ver oa ery m Jno “Gy fF) owo hs] ae 1 pers fT Fy tity TTT ia (ewes ty ie) wn oSts | 2 | ss01n0 |_| | | ‘Ao to Aa: Address inputs m rss WRITE: Write Enable 2 ae eth hh ' 5 Dp LFF “If ali v=] READ: Read Enable 5 | * Sot) ———~ HOLD: Count Hold Enable et ees Ped — so v1 MN sys0f 10] | iio oes —= ome a wor it von CS: Chip Select 2 ! ——= ey ty Do to Do: Data Input/Output Mo —_ re i) TEST: Test Input i fo] => £80 ADJ: +30 Second me ion | ‘Bee Fig. 7 Correction Input i woEery | Ot XT & XT: xtal oscitiator i a | connections ! a ——— Vow: +8 V Sunol D ——j q pp \\ (GND: Grouna |
00 0 of 81 {+ + + + fo~g | Stor Swarereset to 2070 irecpeciive of input date Do~Os3 when write Instruction is executed ee ee 11 0 of mio [ee + fows | + 0 1 0 ett De="1" torPM © O3="'1" for 24 hour format 6~2 | De="0"forAM —_Ds="0" for 12 hour format oe wg | 02 ="'1" tor 29 days in month 2 (1) “data valid as “O" or "1" blank does not exist (unrecognized during a write and held at “0” during a read) ‘tdata bits used for AM/PM, 12/24 HOUR and leap year must be masked from the H10 and D10 registers for correct time to be read. (2) IW1D2 previously set to "1", upon completion of month 2 day 29, Q2 will be internally reset to “0” TYPICAL CHARACTERISTICS— Oscillator Frequency Deviations Frequency Deviation Frequency Deviation vs Temperature vs Supply Voltage met ete LY | GEREE EE sees 1 omit (0 ) i = = vo = sur sesmeiiee ggh PPP tg FREE Se #2 T= om LN ce ee ce es OS aS CO Se a SS A SS AS OS SS EN AS A SS SS A SS ee ee ee ee ee TS OS SS SS SOS 7 GS ON SES ON SN | oe SS |__| Ee Knol A aS a oe es) ee A A [vee of (| Peoeesogs aos Mss eres 75 Se SS | [vei oot eee i rr ee ae ee Se a ses ee OS SS a a SE SS en ee ee (SS A A a ESSSSa0=--= one oo oo oe os ee os FIGURE 2 FIGURE 3 a SSSsSsSSSSSSsSsSSSSSSSSS—S—S ABSOLUTE MAXIMUM RATINGS Wots: Stresses above those listed under Rating [ symoor [Value | Unit ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. Supply Voltage -0.9~ 7.0 v This is @ strese rating only and functionat
Parenter | eymbet | win | t [ wo | van | Conaione Supply Voltage | vo | a7s[s [sas ]v | SV = 5% Stanapy Suppy vonage | voos [ 22[s [7 |v | [vw | se[s [vo {v_| oo = 5V = 5% “Device will run at 2x speed when operating at 65.S36KHz 1(xT) DC CHARACTERISTICS (Vo = 5V + 5%; Ta = —30 to + 85°C, unless otherwise noted) Parameter | Sym | win [tp toe | Ua Cendione Datal/OLeakage Current | ko | -1 | | 1 | uA | Vo =0toVo0,C8 = "0" Output Low Voltage [vo | | [04 | v | t=16macs= "1", READS 1" Output Low Current Pim | 16{ | | mA] vo-oav,.cS— "1", READS "1" Output High Voltage [Vou [Open Drain n-MOS ; () XT. XT and DO~ D3 excluded AC CHARACTERISTICS CAPACITANCE Ta = 25°C, f = 1 MHz Input/Output Capacitance | cvo | | | 8 | oF \\ Input Capacitance [ow [fy 8 Tr Note: This parameter is periodically sampled and not 160% tested. : READ CYCLE | (Woo = 5V * 5%; Ta = 25°C) | Parameter [ symbor[ min. [ typ. [ max. [unit | wo. seruptime [ve | sof fs HOLD Hold Time ae a) ee ee) HOLD Pulse Width [ ow [| | [1 | sec \\ READ Hold Time Se | appnessAccesstime [| mm | | [ie [as
woLo 0% son ws te th READ bead ti or —— mK bo =o y ./ y ¥ YY nigh mareoance ara fwvatio oat YaLio HIGH IMPEDANCE Noles: 1. A Read occurs during the overiap of a high CS and 8 high READ 2. Qutput Load: 1 TTL Gate, Cu = 50 pf and Ri = 4.7 KS? 3.CS may be a permanent "1", or may be coincident with HOLD pulse WRITE CYCLE (Voo = SV 5%; Ta = 25°C) Parameter [ Symbot | min. | Max. | unit appressPutsewiatn | uw | 17 | | oS DATA Setup Tine [we [os | Js writ use wa | aw [10 | os WRITE CYCLE FIGURE 5 to ‘HOLD bated 50% Ws, taw bea
0 Tos lL ‘
asao ae Ca * = a = ‘Notes: 1. A WRITE occure during the overap of a high CS, a ign HOLD and a high WRITE 2. CS may bo a permanent "1", of may bo coincident with HOLD pulse
‘A block diagram of the MSM5092 microprocessor real-time Db ~ Ds (pine 6 ~ 12): Data Inpute/Outputs, two-way bus fines clock/ calendar and a package connection dagrem are shown _controllad by READ and WRITE inputs. Ae ahown in Figure 7 Con the first page. Figure 9 ilustrates a method of Interfacing external pul-up resistors of 4.7K or higher aro requived by The between the clock/calendar circult and a micro processor. sper There! MOS outs Ose we WO ‘echanne! MOS outpuls. D3 i the MSB-Do is the Figures 9, 10 and 11 itustrate alternative standby power supply SB. cea, A uncon tae igo BAM SEES 5a yy, crm is ng unconneito~pul-down Shown in Figure 1 Unioea thence reed eS 0 GND ie provided by an internal resistor—or connected (0 descriptions are based on the block diagram. GND. With CS at Voo, pulzas to VoD on the TEST input wil, directly clock the S1, MI10, W, D1 and ¥1 counters, depending 32.768 K Hz OSCILLATOR (pine 18 and 17): An internal invert: on which counter Is addressed (W and D1 are telocieg ty or ing ampiitie with feedback resistor, RF, is connected with a address in this mode only). Rotl-over to next counter is enabled Crystal and two capacttors aa sown in Figure 6to forma stable, inthis made, curate cscillator—which serves as the precion time base of . . | the circuit. Capacitors C1 and C2 in series provide the parallel ‘Ma. Input Freq = 1OKHz : load capacitance required for precise tuning of the quartz crys- tal, Typical oscilator pertormance aa a function of ambient temperature and supply voltage ts shown in Figures 2 and 3 respectively. DATAI/O 43v Doo CIRCUIT FIGURE 6 . spit be = | Bre = 200K 7? >“: ar ] tt Hi rap oo = it ' i P GND 0+ Voo I 4 it gir cs 8 bs asMsotns os Crs C= 15+ 3008 1» os READ CHIP SELECT (pin 6: Connecting CS input 10 VoD enables all MsMsesons inputs and oulpute. Unconnected=pull-down ta GNO is pro- vided by an internal resistor—ar connecting CS to GND will dis- able HOLO, WRITE, READ, +30 ADJ, 00~Da, AoDa and Test. ‘As shown in Figure 9 CS can be used to detect system power failure by connecting system power (+5V) 0 CS. so nat wnen | REFERENCE SIGNAL OUTPUT systam power it on, all inputs and outputs will be enabled. ana_| Reference signals sip svalale ae oupuls on Do ~Dsit C3, when system power is off, all inputs and outputs will be disabled | READ and AD ~ Ad dre at VoD. Reter to Figure @ tor species, The threshold voltage of CS is higher than all other inputs to 4s shown in Figure 9 inese signals may be used to generate insure correct operation ofthis tunction, interrupts tor the microprocessor. HOLD (pin 18): Switching this input to VOC Inhibits the Internal 1Hz clock to the &1 counter. After the specitied HOLD sat-up. TT time (150 ya), all countora will be in a static stale, thus allowing 2tVOr-tree read or write operations. So long aa the HOLO puss §©6 REFERENCE SIGNAL i ‘width is le8s than 1 second, accuracy of the real ime will be undisturbed. Pull-down to GND is provided by an internal OUTPUTS FIGURE 8 resistor. EAD (pin 3}: Read function as shown in Figure 4 is enabled when READ is switched to Voo. Pulldown to GND is provided mo REFERENCE | PULSE by an internal resistor ConpiTions pasquency | wor WRITE (pin 2): Wete function a9 shown in Figure § is enabled when WRITE is euitened to Ube: Pul-down (eNO ie ernraes worn = | oocy | oeate | outy 20% oan inerrant neao=n |p | ine | zee | £20 ADJ (Pin 15): Momentarily connecting this input to Vec - [von | (31.25 ms) will reset seconds (81, $10 counters and 2""~2"> esau [oe [voor | r221 ys frequency dividers) to 00; seconds were 30 or mare, one Ao~ As =H Vea wine aang nara gt oer [ee | ystoore [rez wore less than 30, ie minutes are unchanged. Pulldown to i GND ie provided by an Imernei reales tm (1) 1026 Hz signal at Do not dependent on HOLD input level | Use this signal for trimming the quartz oseietor Probe ‘Ao ~ Aa (pine 4 ~ 7); Adaress inputs, used to select internal ‘capacitance wil ioad the oscitator i a probes placed on Counters for road/write operations (eee function table~-Figure XT or XT cousing erroneous readings. Trim to i 1). A"1" is defined as Voo; a "0" is GNO. Pulldown to GND 976.5625 ya = -0016 no 's provided by internal resistors. (2) Negative Pulse, Negative True G) Positive Pulse, Posiive True |
TYPICAL APPLICATION—Use with Programmable Peripheral Interface (PPI) FIGURE 9 H = ma iz \\ [fel - h aad SyBaw eke as wemee] +e. aan oe | fe] . | Re) TR NOTE & . This circuit combines battery charging with switching logic to | _}. power the S&32/58321 trom the baler when system peer fas. ad AL Is a Current limit to protect the battery if VoD is accidentally | Re} ZO Short Sri de Dee care nara yominens sonny > oo (+5¥), 01 and 02's anodes will be one diode drop positive from [| tystem power and the cathode of O2 wil alsa track the system “~ power supply. VCHG and RCHG are chosen to trickle charge the | Rv szm Eatoran UCHO teod net bea rguieted wotage ano te une + eb au Tagulated voltage into the system +5V supply is ideal. When oma ='—$— "system power tals, D1 and D2 prevent the battery from trying to Jug!" Bower the system, Voo willbe the baton voliage whenever YONG me 4s fess than the battery voltage. TYPICAL APPLICATIONS — Alternative Standby Power Supply Circuits FIGURE 10 FIGURE 11 opie Sprang: 200 #-P w Vesa) = 01V aaa w an * + A ong share We Lf. chara fer vo T = Moxa = = = = Ory Celis = 129536 toe PACKAGE SPECIFICATIONS | a BL rh TP aE UAC AA eves an 203 bE 8s, OKI SEMICONDUCTOR, INC. 785 NORTH MARY AVENUE, SUNNYVALE, CALIF. 94086-2900 SESE MNOROUCTOR, ING._785 NORTH MARY AVENUE, SUNNYVALE, CALIF. 94086-2000 TELEPHONE: (408) 720-1900 FAX: (408) 720-1918 ‘OKI Semiconductor reserves the right to make changes in specifications at any time and without notice. The information furnished by OK! Semi- conductor in this publication is beligved to be accurale and reliable. However, no responsibility is assumed by OKI Semiconductor for its use, nor for any infringements of patents or other rights of third parties resulting trom ite use. No license is granted under any patents or patent rights of OKI. ® 1982 OKI SEMICONDUCTOR, INC. PRINTED INUSA.