LS7225

LS7225 LSI | Alldatasheet

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BnR-B * with Tamper Output FEATURES: AUX. DELAY INPUT 17 LL] & [14) 14 © Stand Alone Lock Logic sie Bae toe © 5040, 4 Digit Combination with a 10 number Key Board SEQUENCE ENABLE [2/ 13) 13 SELECTED © ut of Sequence Detection KEYS IN © Tamper Output,Sequence Enable Input (GND) Vop [3 Hip {sequence © Direct LED and Lock Relay Drive AUX. DELAY OUTPUT i); © Externally Controlled Combination Delay 1 © Internal Pull Down Resistors on all Inputs TAMPER OUTPUT [5] [1 Ip UNSELECTED KEYS © High Noise Immunity © Low Current Consumption (40 A max @ 12 VOC) (+4V to +18V) Vsg {61 [9] MOMENTARY LOCK CONTROL © Single Power Supply Operation (+4V to +18V) OUTPUT © Momentary or Static Lock Control Output LOCK INDICATOR |8] Lock CONTROL OUTPUT @ Auxilary Delay Circuitry Included ouTPUT TOP VIEW DESCRIPTION: STANDARD 14 PIN DIP The LS7225 is a monolithic, ion implanted MOS 4 Key Figure 1 Keyless lock. The circuit includes sequential logic for inter- pretation of correct key closure; a momentary and Static Lock Contro! output, out of sequence detection circuitry ee ae UNSELECTED KEYS: : A logical "1" at this input resets the SEQUENTIAL DE- DESCRIPTION OF OPERATION: TECTOR” for the SELECTED KEYS inputs and causes the SELECTED KEYS AND COMBINATION DELAY: TAMPER output to transmit @ pulse. This input should be A sequence of logical "1" ’s at the inputs Ij, !2, 1g, and Iq wired to all the keys that are not part of the input sequence. (in correct sequence) sets the “SEQUENTIAL MEMORY”, causing the LOCK CONTROL output to go high, the MO- LOCK CONTROL: MENTARY LOCK CONTROL OUTPUT to go high, (See This toggle output will change state (logical''1” or open) MOMENTARY LOCK CONTROL), and the lock indicator to whan the “SEQUENTIAL MEMORY” is set. (See SELECT: ! open. An axternal capacitor at input |} (Pin 11)determines ED KEYS). the amount of time allowed to enter the SELECTED KEYS inputs in proper sequence. The delay is a function of the ex- *See figure 7 \\ ternal capacitance and the supply voltage (See figure 2) The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use. LS7225/6 LsUcst 817

DC ELECTRICAL CHARACTERISTICS: (Vppe OV, Vsg +4 to +18V, ~25°C <TA<+70°C unless otherwise specified). vss MIN TYP = MAX UNITS Lock Control and 5Vde 1.50 300 4,50 mA Momentary Lock 9Vde 3.00 550 8.00 Control Output Pin —-12Vde 5.00 7.50 9,50 Band 9 On (Logic 15 Vide 8.00 10.00 12.50 “I")Vout=Veg_2 —-18Vde 9.00 11,00 13.50 LOCK INDICATOR: Tamper Output 5Vde 0.05 aie §=60.30 mA This output is the complement of the LOCK CONTROL = Pin 5 On bed ae od output {it drives an LED directly.) {Logical 1") 12Vde 0.70 1.00 1.60 an Vout=Vss-2 15Vde 0.90 1.50 2.00 MOMENTARY LOCK CONTROL: Ieee ce 210 2.60 This output goes on (Logical 1”) when the “SEQUENTIAL MEMORY” is set. It goes open when input 1; (pin 11) to the apes ve an oF mA input delay level detector changes fom logical "1" tologcal yavnayee ve ta es oe '0”. (See input Voltage Specification) 15Vec 244 312 384 TAMPER: 18Véc 3.04 3874.74 This output gives a 15us pulse when I3 or Ig receives a logic “1” out of sequence or when input pin 10 (unselected key) re- fate eae bed ss bee a ma ceives a logical “1”. This output is normally open. (See Onc wy ovat ne im. yo Figure 3) Tamper output is inhibited during the time be O”{Losica ; : a " and the first logic "1" i in 11 Vout Clamp to 15Vde 7.00 8.00 10,00 eee ae nd the eae lees | PRE LT Sy 18Vde 800 ©1000 13.00 The tamper output should be used to discharge the capacitor |NPUT VOLTAGE SPECIFICATIONS: at Pin 11 as shown in figure 8 and figure 4 so that |; must be —_p, 1 applied again to start @ new sequence when a tamper output eter eyes Vss MIDS (MAX UTS occurs. Pulse stretcher network is indicated to provide suf- INPUT LEVEL ficient discharge time. DETECTORS Pins 1 and 11 Input Logic “0” vit 5.0 0 Vgs-3 Ve SEQUENCE ENABLE: one 3 0 | ve A Logical “1” at this input disables the “SEQUENTIAL DE- 12 0 Vss-8 TECTOR” thereby disallowing any sequential input. This 15 0 Vss-9 input is intended to be used in conjunction with the TAMPER 18 0 Vss-9.5 pret (Soe: Anpieatien Beet 2): Input Logic"1” = ViH_— 5.0 Vgg-1.0 gg Vide 8 v Vv; POWER-ON-RESET: &. rae 82 A Power-On-Reset circuit resets the device to a “lock” con- 16 Veg-5.0 Ves dition upon application of power. 18 Va5-6.6 Vss POWER SUPPLIES: All Other Foputs The circuit will operate over the range of +4 to +18 volts. Input Logic “0” Vil Vss 0 Vss-3_Vde Input Logic "1" ViH Vs Vss-1 Vg Vde AUXILIARY DELAY NETWORK (pins 1 & 4) . : Ste This retriggerable one shot is provided for any convenient de- NOTE: Typical input load current is GA with input @Vpp, Vsg @+12V. lay generation, INPUT CAPACITANCE: 10 PF MAXIMUM RATINGS: {Voltages Referenced to Vp) ARAMETER = SYMBOL MIN Wes aasanea lait __ Convenience Delay Rating Symbol Value Units Set-Up Time Ts 6 8 10 sec OC Supply Voltage Vss +4to+18 = =Vde Hold Time Ty 14 16 20 psec Operating Temperature Range TA —2510+70 °C Input Lock Control Storage Temperature Range TSTG —-65to+150 °C Output Delay Thc 10 3 15 psec Input Putse Width Tw 100 usec TAmper Output Tamper Output Pulse Width Tw 5 us Combination Delay Rise Time w C+70ns Fall Time tt C+60ns 8-18 Lsucsi 187225/6

y +120 5 ole + - Gu he: a Jwom Lock CONTROL OUT ‘ ’ LOCK CONTROL => ye 8 our KLYBOARD = = Pv Figure 8 Typical application for independent contro! of combination (input) time and “UNLOCK” time. C-1 determines input time. C-2 determines “UNLOCK” time. Note; With this configuration one tamper pulse is transmitted at the start of “UNLOCK” time. 8-20 LSUCSI LS7225/6

Momentary Lock-Contro! Output-Off = Tamper Output-Off Sequential Memory and Sequential Detector ort TAMER Lake, 4 OUTPUT : foo <i> a 1 Sequential Memory-Set Lock Indicator Output-Off Lock Control Output-On Momentary Lock D Control Output-On rs ! : Lock Indicator Output-Of Lock Control Output-On Momentary Lock Control Output: Off Tamper Ourpur-Off a YES Figure 6 1S7225/6 Lsicst 8-21

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