GP4558 ETL | Alldatasheet

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Technical content

Features

&No frequency compensated required &No latch-up &Large common mode and differential voltage range &Parameter tracking over temperature range &Gain and phase match between amplifiers &Internally frequency compensated &Low noise input transistors Package Dimensions A - 0.5334 c1 0.203 0.279 A1 0.381 - D 9.017 10.16 A2 2.921 4.953 E 6.096 7.112 b 0.356 0.559 E1 7.620 8.255 b1 0.356 0.508 e 2.540 BSC b2 1.143 1.778 HE - 10.92 b3 0.762 1.143 L 2.921 3.810 c 0.203 0.356 Pin Configurations Block Diagram L A SEATING PLANE eb ZZ E D c SECTION Z - Z b GAUGE PLANE DIP-8

ISSUED DATE :2005/06/24 REVISED DATE : Absolute Maximum Ratings at Ta = 25:::: Parameter Symbol VALUE Unit Supply Voltage VCC ±22 V Differential Input Voltage VI(DIFF) ±18 V Input Voltage VI ±15 V Power Dissipation PD 600 mW Operating Temperature Range TOPR 0 ~ +70 : Storage Temperature Range TSTG -65 ~ +150 :

Electrical Characteristics

(VCC=15V Vee=-15V, TA=25:) Parameter SYMBOL Test Conditions Min Typ. Max Unit Supply Current, all Amp, no load ICC - 2.3 4.5 mA Input Offset Voltage VIO RS<10k - 2 6 mV Input Offset Current IIO - 5 200 nA Input Bias Current IBIAS - 30 500 nA Common Mode Input Voltage VI(R) ±12 ±13 V Large Signal Voltage Gain GV VO(P-P)=±10V, RL 2k 20 200 - V/mV Output Voltage Swing VO(P-P) RL 10k - ±12 ±14 V Common Mode Rejection Ratio CMRR RS 10k 70 90 - dB Supply Voltage Rejection Ratio PSRR RS 10k 76 90 - dB Power Consumption PC - 70 170 mV Slew Rate SR Vi=±10V, RL 2k, CL 100pF 1.2 2.2 - V/s Rise Time TRIS Vi=±20mV, RL 2k, CL 100pF - 0.3 - s Overshoot OS Vi=±20mV, RL 2k, CL 100pF - 15 - % Input Resistance Ri 0.3 2 - M Output Resistance RO - 75 - Total Harmonic Distortion THD f=1kHz, AV=20dB, RL=2k, VO= 2VPP, CL=100pF - 0.008 - % Channel Separation VO1/VO2 - 120 - dB Frequency Characteristics (VCC=15V Vee=-15V, TA=25:) Parameter SYMBOL Test Conditions Min Typ. Max Unit Unity Gain Bandwidth BW 2.0 2.8 - MHz

ISSUED DATE :2005/06/24 REVISED DATE : Typical Performance Characteristics Fig 1. Burst Noise vs. Rs Fig 2. RMS Noise vs. Rs Fig 3. Output Noise vs. Rs Fig 4. Spectral Noise vs. Density Fig 5. Open Loop Frequency Response Fig 6. Phase Margin vs. Frequency

ISSUED DATE :2005/06/24 REVISED DATE : Important Notice: All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of GTM. GTM reserves the right to make changes to its products without notice. GTM semiconductor products are not warranted to be suitable for use in life-support Applications, or systems. GTM assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Head Office And Factory: TEL : 886-3-597-7061 FAX : 886-3-597-9220, 597-0785 China: (201203) No.255, Jang-Jiang Tsai-Lueng RD. , Pu-Dung-Hsin District, Shang-Hai City, China TEL : 86-21-5895-7671 ~ 4 FAX : 86-21-38950165 Fig 7. Positive Output Voltage Swing vs. Load Resistance Fig 8. Power Bandwidth (Large Signal)