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Issue Date: Aug. 21, 2008 ML9471 1/3, 1/4, 1/5 Duty 80 Output LCD Driver GENERAL DESCRIPTION The ML9471 is a LCD driver for dynamic display providing 3-duty-switchable pins (1/3, 1/4, 1/5 duty). It can directly drive LCDs of up to 400, 320 and 240 segments when 1/5, 1/4 and 1/3 duty are selected respectively.
FEATURES
- Operating range Supply voltage : 3.0 to 5.5 V Operating temperature range : 40 to + 105C
- Segment output : 80 pins 1/5 duty : Up to 400 segments can be displayed. 1/4 duty : Up to 320 segments can be displayed. 1/3 duty : Up to 240 segments can be displayed.
- Serial transfer clock frequency : 4 MHz
- Serical interface with CPU :Through three input pins (DATA_IN, LOAD, and CLOCK)
- Built-in oscillator circuit for COMMON signals
- One-to-one correspondence between input data and output data When input data is at “H” level : Display goes on. When input data is at “L” level : Display goes off.
- The entire display can be turned off. ( BLANK pin)
- Package options 100-pin plastic TQFP (TQFP100-P-1414-0.50-K) (Product name: ML9471TB)
LAPIS Semiconductor ML9471 BLOCK DIAGRAM 80-Dot Segment Driver 80-Bit Latch 5 80-Bit Latch 4 LATCH SELECTORLOAD OSC 80-Bit Latch 3 80-Bit Latch 1 80-Bit Latch 2 DATA_IN CLOCK OSC_OUT OSC_OUT OSC_IN DSEL1 DSEL2 VDD GND BLANK TIMING GENERATOR 80-Ch Data Selector COMMON Driver SEG1 SEG80 VLC1 VLC2 VLC3 COM1 COM2 COM3 COM4 COM5 80 808080 88-Stage Shift Register
LAPIS Semiconductor ML9471 PIN CONFIGURATION (TOP VIEW) 100-Pin Plastic TQFP 100 SEG 50 SEG 49 SEG 48 SEG 47 SEG 46 SEG 45 SEG 44 SEG 43 SEG 42 SEG 41 SEG 40 SEG 39 SEG 38 SEG 37 SEG 36 SEG 35 SEG 34 SEG 33 SEG 32 SEG 31 NC VDD LOAD CLOCK DATA_IN BLANK DSEL2 DSEL1 OSC_OUT OSC_OUT OSC_IN GND VLC3 VLC2 VLC1 COM5 COM4 COM3 COM2 COM1 SEG80 SEG79 SEG78 SEG77 SEG76 SEG 75 SEG 74 SEG 73 SEG 72 SEG 71 SEG 70 SEG 69 SEG 68 SEG 67 SEG 66 SEG 65 SEG 64 SEG 63 SEG 62 SEG 61 SEG 60 SEG 59 SEG 58 SEG 57 SEG 56 SEG 55 SEG 54 SEG 53 SEG 52 SEG 51 SEG 1 SEG 2 SEG 3 SEG 4 SEG 5 SEG 6 SEG 7 SEG 8 SEG 9 SEG 10 SEG 11 SEG 12 SEG 13 SEG 14 SEG 15 SEG 16 SEG 17 SEG 18 SEG 19 SEG 20 SEG 21 SEG 22 SEG 23 SEG 24 SEG 25 SEG 30 SEG 29 SEG SEG SEG 26
LAPIS Semiconductor ML9471 PIN DESCRIPTION Symbol Type Description OSC_IN OSC_OUT OSC_OUT I O O Pins for oscillation. The oscillator circuit is configured by externally connecting two resistors and a capacitor. Make the wiring length as short as possible, because the resistor connected to the OSC_IN pin has a higher value and the circuit is susceptible to external noise. DATA_IN I Serial data input pin. The display goes on when input data is at a “H” level, and it goes off when input data is at “L” level. CLOCK I Shift clock input pin. Data from the DATA_IN pin is transferred in synchronization with the rising edge of the shift clock. LOAD I Load signal input pin. Serially input data is transferred to the 80-bit latch at “H” level of this load signal, then held at “L” level. BLANK l Input pin that turns off all segments. The entire display goes off when “L” level is applied to this pin. The display returns to the previous state when “H” level is applied. DSEL1 DSEL2 I I Input pins to select 1/3, 1/4, or 1/5 duty. Following shows how each duty is selected. DSEL2 DSEL1 Duty selected L L 1/3 L H 1/4 H X 1/5 X : D o n ’ t c a r e COM1 to COM5 O Display output pins for LCD. These pins are connected to the COMMON side of the LCD panel. SEG1 to SEG80 O Display output pins for LCD. Theses pins are connected to the SEGMENT side of the LCD panel. For the correspondence between the output of these pins and input data, see the “Data Structure” Section. VLC1, VLC2, VLC3 — Bias pins for LCD driver. Through these pins, bias voltages for the LCD are externally supplied. The bias potential must meet the following condition: V DD > VLC1 VLC2 > VLC3 =GND VDD, GND — Supply voltage pin and ground pin. Note: Built-in schmitt circuit is used for all input pins.
LAPIS Semiconductor ML9471 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Condition Rating Unit Supply Voltage VDD Ta = 25°C –0.3 to 6.5 V Input Voltage VI Ta = 25°C –0.3 to VDD+0.3 V Storage Temperature TSTG — –55 to 150 °C Power Dissipation PD Ta < 105°C 700 mW Output Current IO — –2.0 to 2.0 mA RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Range Unit Supply Voltage VDD V LC3 = GND 3.0 to 5.5 V CLOCK Frequency fCP — 1 to 4 MHz Operating Temperature Ta — –40 to 105 °C Oscillator Circuit Parameter Symbol Applicable pin Condition Min. Max. Unit Oscillator Resistance R0 OSC_OUT — 20 120 k Oscillator Capacitance C0 OSC_OUT — 0.00047 0.01 F Current Limiting Resistance R 1 OSC_IN — 62 360 k Common Signal Frequency f COM COM1 to COM5 — 25 250 Hz Note: See Section, “Reference Data”, for the resistor and capacitor values in the table. RC Values in Oscillator Circuit Parameter Symbol Applicable pin 1/3 duty 1/4 duty 1/5 duty Unit Oscillator Resistance R0 OSC_OUT 68 51 43 k Oscillator Capacitance C0 OSC_OUT 0.001 0.001 0.001 F Current Limiting Resistance R 1 OSC_IN 220 160 130 k Example of an oscillator circuit:
LAPIS Semiconductor ML9471
ELECTRICAL CHARACTERISTICS
(VDD = 3.0 to 5.5 V, Ta = –40 to +105°C, unless otherwise specified) Parameter Symbol Applicable pin Condition Min. Max. Unit “H” Input Voltage 1 V IH1 CLOCK, OSC_IN — 0.85 V DD V DD V “L” Input Voltage 1 V IL1 CLOCK, OSC_IN — GND 0.15 V DD V “H” Input Voltage 2 V IH2 *1 — 0.8 V DD V DD V “L” Input Voltage 2 V IL2 *1 — GND 0.2 V DD V “H” Input Current I IH All input pins V DD = 5.5 V, VI = VDD — 10 A “L” Input Current I IL All input pins V DD = 5.5 V, VI = 0 V 10 — A VOC0a I O = 100 A V DD 1 — V VOC1 I O = 100 A *3 V LC1 1 V LC1 +1 V VOC2 I O = 100 A *4 V LC2 1 V LC2 +1 V COMMON Output Voltage VOC3 COM1 - COM5 V DD = 3.0 V IO = +100 A *5 — V LC3 +1 V VOS0 I O = 10 A V DD 1 — V VOS1 I O = 10 A *3 V LC1 1 V LC1 +1 V VOS2 I O = 10 A *4 V LC2 1 V LC2 +1 V Segment Output Voltage VOS3 SEG1 - SEG80, VDD = 3.0 V IO = +10 A *5 — V LC3 +1 V Supply Current I DD V DD V DD = 5.0 V, no load. *2 — 0.5 mA *1 Applies to all input pins excluding CLOCK and OSC_IN. *2 R 0 = 51 k R 1 = 160 k C 0 = 0.001 F *3 V LC1 = 2.0V *4 V LC2 = 1.0V *5 V LC3 = 0V
LAPIS Semiconductor ML9471 AC Characteristics (VDD =3.0 to 5.5V, Ta = –40 to +105°C, unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit Clock “H” Time tWHC — 70 — — ns Clock “L” Time tWLC — 70 — — ns Data Set-up Time tDS — 50 — — ns Data Hold Time tDH — 50 — — ns Load “H” Time tWHL — 100 — — ns Clock-to-load Time tCL — 100 — — ns Load-to-Clock Time tLC — 100 — — ns Clock Rise time, Fall time t R1, tF1 — — — 50 ns OSC_IN Input Frequency f OSC — — — 20 kHz OSC_IN Rise time, Fall time t R2, tF2 — — — 100 ns
LAPIS Semiconductor ML9471 POWER-ON/OFF TIMING * VLC1, VLC2 are applied when VDD is applied to external bias resistor. INITIAL SIGNAL TIMING * Once V DD is applied, BLANK should be applied to ‘L’ level to make all SEGMENTs off until first group of display data is latched. VDD BLANK
LAPIS Semiconductor ML9471 FUNCTIONAL DESCRIPTION Operation As sho wn in “Data Structure”, the display data consists of the data field corresponding to the output for turning the segments on or off and the select field that selects field that selects the input block of data. Data input to the DATA_IN pin is loaded into the 88-bit shift register, transferred to the 80-bit latch while the load signal is at “H” level, and then output via the 80-dot segment driver. Data Structure Inpu t data Correspondence between select bits and COM1 to COM5 C5 C4 C3 C2 C1 Description 0 0 0 0 1 Display data corresponding to COM1 0 0 0 1 0 Display data corresponding to COM2 0 0 1 0 0 Display data corresponding to COM3 0 1 0 0 0 Display data corresponding to COM4 1 0 0 0 0 Display data corresponding to COM5 Notes: 1. Arbitrary data can be set for the dummy bits. 2. Select bit, C 1 to C 5, selects 80-bit latches that correspond to COM1 to COM5, respectively. Therefore, if “1” is set for more than one select bit, data is set to all the corresponding 80-bit latches. Example: If “1” is set to all the select bits C 1 to C 5, the display data of D 1 to D 80 is set to all the 80-bit latches that correspond to COM1 to COM5.
LAPIS Semiconductor ML9471 COM1 – COM5 Timing Chart: VDD VLC1 VLC2 VLC3 COM1 COM2 COM3 1/3 DUTY COM TIMING VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3
LAPIS Semiconductor ML9471 SEGn True Value Table: LATCH1 LATCH2 LATCH3 LATCH4 LATCH5 COM1 COM2 COM3 COM4 COM5 SEGn 0 0 0 0 1 *Note: “H” = VDD; “M1” = VLC1; “M2” = VLC2; “L” = VLC3=GND
LAPIS Semiconductor ML9471 Timing Chart FOR 1/3 DUTY DRIVE MODE:
LAPIS Semiconductor ML9471 Timing Chart FOR 1/4 DUTY DRIVE MODE: VDD VLC1 VLC2 VLC3 COM1 COM2 COM3 COM4 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 SEG1 SEG2 COM1 COM2 COM3 COM4
LAPIS Semiconductor ML9471 Timing Chart FOR 1/5 DUTY DRIVE MODE: VDD VLC1 VLC2 VLC3 COM1 COM2 COM3 COM4 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 VDD VLC1 VLC2 VLC3 SEG1 SEG2 COM1 COM2 COM3 COM4 SEG1 SEG2 COM5 COM5 VDD VLC1 VLC2 VLC3
LAPIS Semiconductor ML9471 APPLICATION CIRCUITS (For 1/4 duty)
LAPIS Semiconductor ML9471 REFERENCE DATA The data shown in this section is for reference (a metal film resistor and a film capacitor are used). Resistor and capacitor values must be determined based on experiments. Use the following expression to convert oscillation frequency to COMMON frame frequency (or vice versa): f COM=fOSC × Duty/16 f COM : COMMON frame frequency f OSC : Oscillation frequency Duty : e.g., 1/4 for 1/4 duty For example, if f COM=100Hz at 1/5 duty, the oscillation frequency is fOSC =8000Hz. IDD vs. V DD 0.1 0.2 0.3 0.4 0.5 0.6 0.7 VDD [V] IDD [mA] Ta=25°C R0=51k R1=160k C0=0.001µF 1/4 duty
LAPIS Semiconductor ML9471 fOSC---R0,C0 ML9471 Oscillator Frequency Result VDD=3V 25°C 0.10 1.00 10.00 100.00 0 25 50 75 100 125 150 R0[k] fOSC[kHz] 0.00047µF | 62k 0.00047µF | 360k 0.01µF | 62k 0.01µF | 360k ML9471 Oscillator Frequency Result VDD=5.5V 25°C 0.10 1.00 10.00 100.00 0 25 50 75 100 125 150 R0[k] fOSC[kHz] 0.00047µF | 62k 0.00047µF | 360k 0.01µF | 62k 0.01µF | 360k
LAPIS Semiconductor ML9471 PACKAGE DIMENSIONS TQFP100-P-1414-0.50-K Mirror finish Package material Epoxy resin Lead frame material 42 alloy Lead finish Sn-2Bi (Bi 2% typ.) Pin treatment Solder plating (t5μm) Package weight (g) 0.55 TYP. Rev. No./Last Revised 1/Jul. 18, 2007 Notes for Mounting the Surface Mount Type Package The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact ROHM's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). (Unit: mm)
LAPIS Semiconductor ML9471
REVISION HISTORY
Document No. Date Previous Edition Current Edition
Description
PEDL9471-01 Dec. 15, 2006 – – Preliminary edition 1 PEDL9471-02 Jan. 15, 2007 – – Preliminary edition 2 PEDL9471-03 Jan. 9, 2008 – – Preliminary edition 3 FEDL9471-01 Aug. 21, 2008 – – Final edition 1
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