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Technical content
Features
VID Control Range Via I2C Compatitable Interface : 0.72V to 1.48V in 10mV Steps Adjustable Current Limit Adjustable Thermal Shutdown Fast Transient Response Adjustable Output Voltage from 0.8V to 8V Steady 700kHz Switching Frequency Optimized for All Ceramic Capacitors Externally-Adjustable, Pre-Biased Compatible Soft- Start Input Under-Voltage Lockout Output Over- and Under-Voltage Protection RoHS Compliant and Halogen Free
Applications
Industrial and Commercial Low Power Systems Computer Peripherals LCD Monitors and TVs Green Electronics/Appliances Point of Load Regulation for High-Performance DSPs, FPGAs, and ASICs Simplified Application Circuit Pin Configuration (TOP VIEW) WQFN-20L 4x4 PVCC PGOOD SDA SS FB VS SW SW PGND SW VIN BOOT EN VCC SCL PGND AGND VIN 6 789 1720 1819 PGND 5 11 PGOOD RT6203B FB VIN BOOT SW SS CSS VOUT VIN EN PGND Enable Power Good VCC PVCC SCL SDA AGND VS CFF Address Selection I2C Control
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Pin No. Pin Name Pin Function 1 PVCC 5V power supply output. Connect a capacitor (typical 1 F) to AGND. 2 PGOOD Open-drain power good indicator output. 3 A0 LSB of chip address. Tie to GND for 0, pull high for 1. 4 A1 LSB+1 of chip address. Tie to GND for 0, pull high for 1. 5 SCL I2C clock input. 6 SDA I2C data input. 7 SS Soft-start time setting. Connect an external capacitor to GND. 8 FB Feedback voltage input. Connect to output voltage feedback resistor divider. 9 VS Output voltage controlled by VID. 10 AGND Analog ground. 11, 12, 21 (Exposed Pad) PGND Power ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum thermal dissipation. 13, 14, 15 SW Switch node. 16, 17 VIN Power input. Connect to high-side MOSFET Drain. 18 VCC Power input for internal circuit. 19 EN Enable control Input.
20 BOOT
Bootstrap supply for high-side gate driver. This capacitor is needed to drive the power switch's gate above the supply voltage. It is connected between the SW and BS pins to form a floating supply across the power switch driver. A 0.1F capacitor is recommended for use. Marking Information Functional Pin Description 2H=YM DNN 2H= : Product Code YMDNN : Date Code RT6203BHGQW Note : Richtek products are : RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes.
Ordering Information
2G=YM DNN 2G= : Product Code YMDNN : Date Code RT6203B Package Type QW : WQFN-20L 4x4 (W-Type) (Exposed Pad-Option 1) Lead Plating System G : Green (Halogen Free and Pb Free) UVP Trim Operation H : Hiccup L : Latch-off PWM/PSM Mode B : PWM Mode
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Functional Block Diagram Operation The RT6203B is a high-performance 700kHz 5A step-down regulator with internal power switches and synchronous rectifiers. It features an Advanced Constant On-Time (ACOT TM) control architecture that provides stable operation with ceramic output capacitors without complicated external compensation, among other benefits. The ACOT TM control mode also provides fast transient response, especially for low output voltages and low duty cycles. The input voltage range is from 4.5V to 18V and the output is adjustable from 0.8V to 8V. The proprietary ACOT TM control scheme improves upon other constant on-time architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. The RT6203B are optimized for ceramic output capacitors. Since there is no internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. Constant On-Time (COT) Control The heart of any COT architecture is the on-time one shot. Each on-time is a pre-determined “fixed” period that is triggered by a feedback comparator. This robust arrangement has high noise immunity and is ideal for low duty cycle applications. After the on-time one-shot period, there is a minimum off-time period before any further regulation decisions can be considered. This arrangement avoids the need to make any decisions during the noisy time periods just after switching events, when the switching node (SW) rises or falls. Because there is no fixed clock, the high-side switch can turn on almost immediately after load transients and further switching pulses can ramp the inductor current higher to meet load requirements with minimal delays. Traditional current mode or voltage mode control schemes typically must monitor the feedback voltage, current signals (also for current limit), and internal ramps and compensation signals, to determine when to turn off the high-side switch Reg UGATE LGATE Driver BOOT PVCC Control VIBIAS On-Time VIN Min. Off VREF Comparator SS SW PGND EN PVCC OC 6µA VREG5 UV & OV VIN Comparator VREF 7bits PGOOD VS SW DAC OUT EN FB PVCC VCC ZC Serial Interface Chip Address 01101A1A0 EXT INT EXT INT 92.5% DAC OUT EXT INT DAC OUT SDA SCL AGND DAC VOUT = 0.72V to 1.48V
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. and turn on the synchronous rectifier. Weighing these small signals in a switching environment is difficult to do just after switching large currents, making those architectures problematic at low duty cycles and in less than ideal board layouts. Because no switching decisions are made during noisy time periods, COT architectures are preferable in low duty cycle and noisy applications. However, traditional COT control schemes suffer from some disadvantages that preclude their use in many cases. Many applications require a known switching frequency range to avoid interference with other sensitive circuitry. True constant on-time control, where the on-time is actually fixed, exhibits variable switching frequency. In a step-down converter, the duty factor is proportional to the output voltage and inversely proportional to the input voltage. Therefore, if the on-time is fixed, the off-time (and therefore the frequency) must change in response to changes in input or output voltage. Modern pseudo-fixed frequency COT architectures greatly improve COT by making the one-shot on-time proportional to V OUT and inversely proportional to VIN. In this way, an on-time is chosen as approximately what it would be for an ideal fixed-frequency PWM in similar input/output voltage conditions. The result is a big improvement but the switching frequency still varies considerably over line and load due to losses in the switches and inductor and other parasitic effects. Another problem with many COT architectures is their dependence on adequate ESR in the output capacitor, making it difficult to use highly-desirable, small, low-cost, but low-ESR ceramic capacitors. Most COT architectures use AC current information from the output capacitor, generated by the inductor current passing through the ESR, to function in a way like a current mode control system. With ceramic capacitors the inductor current information is too small to keep the control loop stable, like a current mode system with no current information. ACOT TM Control Architecture Making the on-time proportional to V OUT and inversely proportional to V IN is not sufficient to achieve good constant-frequency behavior for several reasons. First, voltage drops across the MOSFET switches and inductor cause the effective input voltage to be less than the measured input voltage and the effective output voltage to be greater than the measured output voltage. As the load changes, the switch voltage drops change causing a switching frequency variation with load current. Also, at light loads if the inductor current goes negative, the switch dead-time between the synchronous rectifier turn-off and the high-side switch turn-on allows the switching node to rise to the input voltage. This increases the effective on time and causes the switching frequency to drop noticeably. One way to reduce these effects is to measure the actual switching frequency and compare it to the desired range. This has the added benefit eliminating the need to sense the actual output voltage, potentially saving one pin connection. ACOT TM uses this method, measuring the actual switching frequency and modifying the on-time with a feedback loop to keep the average switching frequency in the desired range. To achieve good stability with low-ESR ceramic capacitors, ACOT TM uses a virtual inductor current ramp generated inside the IC. This internal ramp signal replaces the ESR ramp normally provided by the output capacitor ESR. The ramp signal and other internal compensations are optimized for low-ESR ceramic output capacitors. ACOT TM One-Shot Operation The RT6203B control algorithm is simple to understand. The feedback voltage, with the virtual inductor current ramp added, is compared to the reference voltage. When the combined signal is less than the reference and the on- time one-shot is triggered, as long as the minimum off- time one-shot is clear and the measured inductor current (through the synchronous rectifier) is below the current limit. The on-time one-shot turns on the high-side switch and the inductor current ramps up linearly. After the on time, the high-side switch is turned off and the synchronous rectifier is turned on and the inductor current ramps down linearly. At the same time, the minimum off-time one-shot is triggered to prevent another immediate on-time during the noisy switching time and allow the feedback voltage and current sense signals to settle. The minimum off-time is kept short (230ns typical) so that rapidly-repeated on- times can raise the inductor current quickly when needed.
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Shutdown, Start-Up and Enable (EN) The enable input (EN) has a logic-low level of 0.4V. When VEN is below this level the IC enters shutdown mode and supply current drops to less than 10μA. When VEN exceeds its logic-high level of 2V the IC is fully operational. Unlike many competing devices, EN is a high voltage input that can be safely connected to V IN (up to 18V) for automatic start-up. Input Under-Voltage Lockout In addition to the enable function, the RT6203B feature an Under-Voltage Lockout (UVLO) function that monitors the internal linear regulator output (PVCC). To prevent operation without fully-enhanced internal MOSFET switches, this function inhibits switching when V CC drops below the UVLO falling threshold. The IC resumes switching when V CC exceeds the UVLO rising threshold. Soft-Start (SS) The RT6203B soft-start uses an external pin (SS) to clamp the output voltage and allow it to slowly rise. After VEN is high and VIN exceeds its UVLO threshold, the IC begins to source 6μA from the SS pin. An external capacitor at SS is used to adjust the soft-start timing. Following below equation to get the minimum capacitance range in order to avoid UV occurs. Do not leave SS unconnected. During start-up the SS capacitor is charged and the RT6203B operates in discontinuous switching mode with very small pulses. This prevents negative inductor currents and keeps the circuit from sinking current. Therefore, the output voltage may be pre-biased to some positive level before start-up. Once the V SS ramp charges enough to raise the internal reference above the feedback voltage, switching will begin and the output voltage will smoothly rise from the pre-biased level to its regulated level. After V SS rises above about 2.2V output over- and under-voltage protections are enabled and the RT6203B begins continuous-switching operation. Internal Regulator (PVCC) An internal linear regulator (PVCC) produces a 5V supply from V IN. The 5V power supplies the internal control circuit, such as internal gate drivers, PWM logic, reference, analog circuitry, and other blocks. 1 μF ceramic capacitor for decoupling and stability is required. Over-Temperature Protection The RT6203B includes an Over-Temperature Protection (OTP) circuitry to prevent overheating due to excessive power dissipation. The OTP will shut down switching operation when the junction temperature exceeds 150°C. Once the junction temperature cools down by approximately 20°C the IC will resume normal operation with a complete soft-start. For continuous operation, provide adequate cooling so that the junction temperature does not exceed 150°C. OUT OUT LIM SS REF C V 0.75 1.2t = I Load Current 0.8 t6 AC V
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation.
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified) Absolute Maximum Ratings (Note 1) Power Dissipation, PD @ TA = 25°C Package Thermal Resistance (Note 2) ESD Susceptibility (Note 3) Recommended Operating Conditions (Note 4) Parameter Symbol Test Conditions Min Typ Max Unit Supply Current Shutdown Current I SHDN V EN = 0V -- 1.5 10 A Shutdown Current by VID I SHDN_VID Special code = 1110110 -- 75 105 A Quiescent Current I Q V EN = 2V, VFB = 1V -- 0.55 1.2 mA Logic Threshold EN Input Voltage Logic-Low V IL -- -- 0.4 V Logic-High V IH 2 -- -- EN Pull-High Current -- 1 -- A VFB Voltage and Discharge Resistance Feedback Voltage V FB Regulation mode 0.792 0.8 0.808 V Output Voltage V OUT I 2C mode Ideal VOUT 1.5% Ideal VOUT Ideal VOUT +1.5% V Minimum Output Voltage Rising Time per 10mV Special code = 1100001 (default) -- 1 -- s
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit Maximum Output Voltage Rising Time per 10mV Special code = 1101000 -- 8 -- s VPVCC Output VPVCC Output Voltage V PVCC 6V = VIN = 18V, 0 < IPVCC < 5mA 4.8 5 5.2 V Line Regulation VLINE 6V = VIN = 18V, IPVCC = 5mA -- -- 20 mV Load Regulation VLOAD 0 < I PVCC < 5mA -- -- 30 mV Output Current I PVCC V IN = 6V, VPVCC = 4V 100 210 -- mA RDS(ON) Switch-On Resistance RDS(ON)_H V BOOT – VSW = 5V -- 60 100 RDS(ON)_L -- 30 50 Current Limit Current Limit I LIM Special code = 1110000 (default) 5.8 7 8.2 A Special code = 1110001 4.15 5 5.85 Special code = 1110010 2.4 3 3.6 On-Time Timer Control Switching Frequency f SW -- 700 -- kHz Minimum Off-Time t OFF(MIN) -- 230 -- ns Soft-Start SS Charge Current V SS = 0V 5 6 7 A UVLO UVLO Threshold Wake Up VPVCC 3.55 3.85 4.15 V Hysteresis -- 0.4 -- Power Good PGOOD Threshold FB rising 90 92.5 95 % FB falling -- 87.5 -- % PGOOD Fault Delay Special code = 1111001 (default) -- 10 -- s PGOOD Sink Current PGOOD = 0.5V 5 -- -- mA Output Under-Voltage and Over-Voltage Protection OVP Trip Threshold OVP detect 120 125 130 % OVP Prop Delay -- 120 -- s UVP Trip Threshold OVP detect 70 75 80 % UVP Prop Delay -- 250 -- s Thermal Shutdown Thermal Shutdown Threshold TSD Special Code = 1110011 (default) -- 150 -- °C Special Code = 1110100 -- 130 -- Special Code = 1110101 -- 110 --
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Parameter Symbol Test Conditions Min Typ Max Unit Serial Interface (SDA AND SCL pins) Note 5 Low Level Input Voltage Low-Level V IL -- -- 0.9 V High-Level V IH 2.5 -- -- Hysteresis of Schmitt Trigger Inputs VHYS 0.16 -- -- V Low Level SDA Output Voltage (Open drain, 3mA sink current) VOL1 -- -- 0.4 V Pulse Width of Spikes Suppressed by Input Filter tSP 50 -- -- ns SCL Clock Frequency f SCL -- -- 400 kHz Hold Time (repeated) Start Condition tHD;STA 0.6 -- -- μs Low Period of SCL Clock t LOW 1.3 -- -- μs High Period of SCL Clock t HIGH 0.6 -- -- μs Set-Up Time for a Repeated Start Condition tSU;STA 0.6 -- -- μs Data Hold Time t HD;DAT 50 -- 900 ns Data Set-Up Time t SU;DAT 100 -- -- ns Rise Time (SDA or SCL) t R 20 + 0.1C b -- 300 ns Fall time (SDA or SCL) t F 20 + 0.1C b -- 300 ns Set-Up Time for STOP Condition t SU;STO 0.6 -- -- μs Bus Free Time between STOP and START Condition tBUF 1.3 -- -- μs Capacitive Load for Each Bus Line Cb -- -- 400 pF SDA SCL tF tLOW tHD,STA tHD,DAT tHIGH tSU,DAT tSU,STA tHD,STA tSP tBUF tSU,STO PS tR SrS tF tR
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θ JA is measured under natural convection (still air) at T A = 25 °C with the component mounted on a high effective- thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guaranteed by design and characterized.
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Typical Application Circuit PGOOD RT6203B FB VIN 10µF BOOT 1.5µH 100nF 22µF x 2 SW SS CSS VOUT VIN16, 17 13, 14, 15 10k 11, 12, 21 (Exposed Pad) EN19 PGND Enable 100k Power Good 10µF VCC PVCC 1µF SCL SDA AGND VS CFF 10k I2C Control Address Selection
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. I2C Shutdown Current vs. Input Voltage 100 110 120 130 140 150 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) I2C Shutdown Current (μA) 1 Typical Operating Characteristics Efficiency vs. Output Current 100 012345 Output Current (A) Efficiency (%) VOUT = 1.2V, L = 1.5μH VIN = 4.5V VIN = 12V VIN = 18V Output Voltage vs. Temperature 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 -50 -25 0 25 50 75 100 125 Temperature (°C) Output Voltage (V) VOUT = 1.2V, IOUT = 0A VIN = 18V VIN = 12V VIN = 4.5V Output Voltage vs. Output Current 1.190 1.195 1.200 1.205 1.210 012345 Output Current (A) Output Voltage (V) VOUT = 1.2V VIN = 18V VIN = 12V VIN = 4.5V Choke Valley Current Limit vs. Input Voltage 2.50 3.00 3.50 4.00 4.50 5.00 5.50 6.00 6.50 7.00 7.50 8.00 4 6 8 1 01 21 41 61 8 Input Voltage (V) Choke Valley Current Limit (A) 1 OC = 5A OC = 7A OC = 3A VIN = 12V, VOUT = 1.2V Output Voltage vs. Input Voltage 1.190 1.195 1.200 1.205 1.210 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Input Voltage (V) Output Voltage (V) IOUT = 0A IOUT = 1A IOUT = 2A IOUT = 3A IOUT = 4A IOUT = 5A VOUT = 1.2V
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. UVLO Voltage vs. Temperature 3.20 3.40 3.60 3.80 4.00 4.20 4.40 -50 -25 0 25 50 75 100 125 Temperature (°C) UVLO Voltage (V) Falling Rising VOUT = 1.2V, IOUT = 0A EN Pin Threshold vs. Temperature 1.00 1.05 1.10 1.15 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 -50 -25 0 25 50 75 100 125 Temperature (°C) EN Pin Threshold (V ) Falling Rising VIN = 12V, VOUT = 1.2V, IOUT = 0A Time (2 μs/Div) Output Ripple Voltage VOUT (20mV/Div) VSW (5V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 0A, L = 1.5μH, COUT = 22μF x 2 Time (2 μs/Div) Output Ripple Voltage VOUT (20mV/Div) VSW (5V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 5A, L = 1.5μH, COUT = 22μF x 2 Time (2ms/Div) Power On from EN VOUT (400mV/Div) VEN (3V/Div) IOUT (5A/Div) VSW (5V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 5A Time (100 μs/Div) Load Transient Response VOUT (20mV/Div) IOUT (2A/Div) VIN = 12V, VOUT = 1.2V, IOUT = 0A to 5A, L = 1.5μH, COUT = 22μF x 2
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Time (20 μs/Div) VID Falling VOUT (300mV/Div) VSW (5V/Div) VIN = 12V, VID 1.48V to VID 0.72V, VOUT slew rate = 10mV/1 μs, IOUT = 5A Time (20 μs/Div) VID Rising VOUT (300mV/Div) VSW (5V/Div) VIN = 12V, VID 0.72V to VID 1.48V, VOUT slew rate = 10mV/1 μs, IOUT = 5A Time (5ms/Div) Power Off from VIN VOUT (400mV/Div) VIN (10V/Div) IOUT (5A/Div) VSW (5V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 5A Time (2ms/Div) Power Off from EN VOUT (400mV/Div) VEN (3V/Div) IOUT (5A/Div) VSW (5V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 5A Time (5ms/Div) Power On from VIN VOUT (400mV/Div) VIN (10V/Div) IOUT (5A/Div) VSW (5V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 5A
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. I2C Interface Function The 7-bit address of the RT6203B with a WRITE operation bit can become an 8 bits I2C address byte. By using user- selectable A1 and A0 pins, there will be up to 4 the RT6203Bs been controlled on the same serial bus. Table 1 explains how to use A1/A0 and the range of the RT6203B address.
Application Information
(Binary) RT6203 Address (Hex) GND (0) GND (0) 01101000 68h GND (0) Pull high (1) 01101010 6Ah Pull high (1) GND (0) 01101100 6Ch Pull high (1) Pull high (1) 01101110 6Eh Table 1. Selectable RT6203B Address by using A1 and A0 pins Table 2. Structure of RT6203B Data Byte
©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Table 3. VID Function
©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. codes are valid during the soft-start time. can be done by sending the special code. 1110000 to 1110010 : To change the over current limit level.
1111111 Disable VID, return to FB control
1110000 OC = 7A (default)
1110001 OC = 5A
1110010 OC = 3A
1110011 OT = 150 °C (default)
1110100 OT = 130 °C
1110101 OT = 110 °C
1110110 Shutdown code
1110111 Start-up code
1111000 PGOOD fault delay set to 0 s
1111001 PGOOD fault delay set to 10 s (default)
1111010 PGOOD fault delay set to 20 s
1111011 PGOOD fault delay set to 40 s
1100001 V OUT slew rate = 10mV/1s (default)
1100010 V OUT slew rate = 10mV/2s
1100011 V OUT slew rate = 10mV/3s
1100100 V OUT slew rate = 10mV/4s
1100101 V OUT slew rate = 10mV/5s
1100110 V OUT slew rate = 10mV/6s
1100111 V OUT slew rate = 10mV/7s
1101000 V OUT slew rate = 10mV/8s
Table 4. Special Function 1110110 to 1110111 : To shut down and start up IC. it is controlled from low level voltage to high level voltage.
DS6203B-00 September 2016 www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Inductor Selection The consideration of inductor selection includes inductance, RMS current rating and, saturation current rating. The inductance selection is generally flexible and is optimized for the low cost, low physical size, and high system performance. Choosing lower inductance to reduce physical size and cost, and it is useful to improve the transient response. However, it causes the higher inductor peak current and output ripple voltage to decrease system efficiency. Conversely, higher inductance increase system efficiency, but the physical size of inductor will become larger and transient response will be slow because more transient time is required to change current (up or down) by inductor. A good compromise between size, efficiency, and transient response is to set a inductor ripple current ( ΔI L) about 20% to 50% of the desired full output load current. Calculate the approximate inductance by the input voltage, output voltage, switching frequency (fSW), maximum rated output current (IOUT(MAX)) and inductor ripple current (ΔIL). OUT IN OUT IN SW L VV VL = Vf I It will be safe to choose inductor saturation current larger than 8.1A. Input Capacitor Selection The input filter capacitors are needed to smooth out the RMS input ripple current drawn from the input power source and ripple voltage seen at the input of the converter. The voltage rating of the input filter capacitors must be greater than the maximum input voltage. It's also important to consider the ripple current capabilities of cap acitors. The RMS input ripple current (I RMS) is a function of the input voltage (VIN), output voltage (VOUT), and rated output current (IOUT) : Once the inductance is chosen, the inductor ripple current (ΔIL) and peak inductor current can be calculated. OUT IN OUT L IN SW L(PEAK) OUT(MAX) L L(VALLY) OUT(MAX) L VV VI= Vf L 1I = I I 2 1I = I I 2 The typical operating circuit design for the RT6203B, the output voltage is 1.2V, maximum rated output current is 5A, input voltage is 12V, and inductor ripple current is 1A which is 20% of the maximum rated output current, the calculated inductance value is : 1.2 12 1.2L = = 1.53 μH 12 700 10 1 The inductor ripple current can be set larger than 1A and so we select 1.5μH inductance. The actual inductor ripple current and required peak current is shown as below : L 3- 6 1.2 12 1.2I = = 1.02A 12 700 10 1.5 10 L(PEAK) OUT(MAX) L 11I = I I = 5 + = 5.5A 22 Inductor saturation current should be chosen over IC’s current limit. Set valley current limit of the RT6203B is 7A by I 2C. When touching current limit of the RT6203B, the peak inductor current is : L(PEAK) L(VALLEY) LI = I + I = 7 + 1 = 8A OUT INRMS OUT IN OUT V VI = I 1 VV The maximum RMS input ripple current occurs at maximum output load and it needs to be concerned about the ripple current capabilities of capacitors at maximum output load. Ceramic capacitors are most often used because of their low cost, small size, high RMS current ratings, and robust surge current capabilities. It should pay attention that value of capacitors change as temperature, bias voltage, and operating frequency change. For example the capacitance value of a capacitor decreases as the dc bias across the capacitor increases. However, take care when these capacitors are used at the input of circuits supplied by a wall adapter or other supply connected through long and thin wires. Current surges through the inductive wires can induce ringing at the IC's power input which could potentially cause large, damaging voltage spikes at VIN pin. If this phenomenon is observed, some bulk input capacitance may be required. Ceramic capacitors can be placed in parallel with other types such as tantalum, electrolytic, or polymer to
DS6203B-00 September 2016www.richtek.com ©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. reduce voltage ringing and overshoot. Choose capacitors rated at higher temperatures than required. Several ceramic capacitors may be paralleled to meet the RMS current, size, and height requirements of the application. Output Capacitor Selection The RT6203B is optimized for output terminal with ceramic capacitors application and best performance will be obtained using them. The total output capacitance value is usually determined by the desired output ripple voltage level and transient response requirements for sag which is undershoot on positive load steps and soar which is overshoot on negative load steps. Output Ripple Voltage Output ripple voltage at the switching frequency is caused by the inductor current ripple and its effect on the output capacitor's ESR and stored charge. These two ripple components are called ESR ripple and capacitive ripple. Since ceramic capacitors have extremely low ESR and relatively little capacitance, both components are similar in amplitude and both should be considered if ripple is critical. RIPPLE RIPPLE(ESR) RIPPLE(C) RIPPLE(ESR) L ESR LRIPPLE(C) OUT SW V = V V V = I R IV = 8C f Output Transient Undershoot and Overshoot In addition to output ripple voltage at the switching frequency, the output capacitor and its ESR also affect the voltage sag (undershoot) and soar (overshoot) when the load steps up and down abruptly. The AC OTTM transient response is very quick and output transients are usually small. However, the combination of small ceramic output capacitors (with little capacitance), low output voltages (with little stored charge in the output capacitors), and low duty cycle applications (which require high inductance to get reasonable ripple currents with high input voltages) increases the size of voltage variations in response to very quick load changes. Typically, load changes occur slowly with respect to the IC's switching frequency. But some modern digital loads can exhibit nearly instantaneous load changes and the following section shows how to calculate the worst-case voltage swings in response to very fast load steps. The output voltage transient undershoot and overshoot each have two components : the voltage steps caused by the output capacitor's ESR, and the voltage sag and soar due to the finite output capacitance and the inductor current slew rate. Use the following formulas to check if the ESR is low enough (typically not a problem with ceramic capacitors) and the output capacitance is large enough to prevent excessive sag and soar on very fast load step edges, with the chosen inductor value. The amplitude of the ESR step up or down is a function of the load step and the ESR of the output capacitor : ESR_STEP OUT ESRV = I R The amplitude of the capacitive sag is a function of the load step, the output capacitor value, the inductor value, the input-to-output voltage differential, and the maximum duty cycle. The maximum duty cycle during a fast transient is a function of the on-time and the minimum off-time since the ACOT TM control scheme will ramp the current using on-times spaced apart with minimum off-times, which is as fast as allowed. Calculate the approximate on-time (neglecting parasitic) and maximum duty cycle for a given input and output voltage as : OUT ONON MAX IN SW ON OFF(MIN) Vtt = a n d D = V f t + t The actual on-time will be slightly longer as the IC compensates for voltage drops in the circuit, but we can neglect both of these since the on-time increase compensates for the voltage losses. Calculate the output voltage sag as : OUTSAG OUT IN(MIN) MAX OUT L( I )V = 2C V D V The amplitude of the capacitive soar is a function of the load step, the output capacitor value, the inductor value and the output voltage : OUTSOAR OUT OUT L( I )V = 2C V
©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. high by the external pull-up resistor. on speed for any EMI issue consideration. Figure 5. External Bootstrap Diode and BOOT Capacitor on the maximum power dissipation.
©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Ric htek Technology Corporation. Figure 6. Derating Curve of Maximum Power Dissipation
DS6203B-00 September 2016www.richtek.com Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnish ed by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of R ichtek or its subsidiaries. Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.300 0.006 0.012 D 3.900 4.100 0.154 0.161 Option 1 2.650 2.750 0.104 0.108 Option 2 2.100 2.200 0.083 0.087 E 3.900 4.100 0.154 0.161 Option 1 2.650 2.750 0.104 0.108 Option 2 2.100 2.200 0.083 0.087 e 0.500 0.020 L 0.350 0.450 0.014 0.018 W-Type 20L QFN 4x4 Package Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. DETAIL A Pin #1 ID and Tie Bar Mark Options 2 2