DIG-100M1002-PCI

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Ver.1.03 DIG-100M1002-PCI 2 The function of saving/reading configuration file and auto setup for sampling condition The work time of setup can be greatly shortened for that acquisition conditions such as horizontal axis setting, vertical axis setting and trigger setting can be save/read into/from a file. Moreover, it is equipped with the auto setup function that scans input signals of each channel and then performs settings automatically. By configuration software, it is possible to create a configuration file of acquisition conditions or edit an existing file in a wizard form. The created file can be read by front panel software or from the program using API-PAC(W32) cTEST. Windows compatible driver library API-PAC(W32) cTEST is attached. Using the attached driver library makes it possible to create applications of Window. Specification < 1 / 3 > Item Specification Analog input channels specification Isolated specification Non-isolated Type Single-Ended Input Number of input channels 2ch Synchronized Sampling Input impedance *1 You can select 1M Ω±1% // 19pF typ. or 50Ω±2% Input coupling AC, DC, GND (AC coupling can be used only when 1MΩ is set.) Input voltage range < When input impedance 1MΩ is set. > 40mVpk [±20mV], 100mVpk [±50mV], 200mVpk [±100mV], 400mVpk [±200mV], 1Vpk [±500mV], 2Vpk [±1V], 4Vpk [±2V], 10Vpk [±5V], 20Vpk [±10V], 40Vpk [±20V] < When input impedance 50Ω is set. > 40mVpk [±20mV], 100mVpk [±50mV], 200mVpk [±100mV], 400mVpk [±200mV], 1Vpk [±500mV], 2Vpk [±1V], 4Vpk [±2V], 10Vpk [±5V] Offset range setting Input voltage range's ±50% (For 1MΩ:40Vpk, 50Ω:10Vpk: ±0%) Max.input voltage *2 When input impedance 1MΩ is set. ±30VDC (Max.) When input impedance 50Ω is set. ±5.6VDC (Max.) Resolution 10bit Conversion speed *3 100MHz (10nsec) Max. Frequency bandwidth (-3dB) 60MHz typ. Noise filtering bandwidth (-3dB) 20MHz typ. Attenuation property: Low-Pass Filter AC coupling cut off frequency (-3dB) 13Hz typ. On-board memory 32M data *1 : Switch to 1M Ω automatically when power is turned off. *2 : Do not input a voltage over the Max. input voltage. It may cause failure. *3 : When 2ch are used, the Max. conversion speed is 50MHz (when data logger mode is used.). Specification < 2 / 3 > Item Specification Analog input channel measurement precision DC conversion precision *4*5*6 Within ±0.4% (Input voltage range : 400mVpk, 1Vpk, 2Vpk, 4Vpk, 10Vpk, 20Vpk, 40Vpk) Within ±0.6% (Input voltage range : 100mVpk,200mVpk) Within ±1% (Input voltage range : 40mVpk) Non-Linearity error *4*5*6 Within ±0.3% Offset/range setting precision ±0.3% of range Amplitude flatness (based on 1kHz) *7 DC - 10MHz : ±0.3dB typ. 10MHz - 30MHz : ±1dB typ. Cross talk Between analog input channels or Reference clock / trigger I/O → Between analog input channels When input voltage range 40mV is set. : 60dB typ. Input voltage range other than 40mV : 70dB typ. When input impedance 50Ω is set (test signal: 10MHz, -1dBFS) typ. Voltage range SNR THD SFDR SINAD 40mV 53 dB -68 dBc 71 dBc 53 dB 100mV 58 dB -73 dBc 76 dBc 58 dB 200mV 60 dB -72 dBc 74 dBc 60 dB 400mV 59 dB -75 dBc 78 dBc 59 dB 1V 60 dB -72 dBc 76 dBc 60 dB 2V 60 dB -73 dBc 76 dBc 60 dB 4V 60 dB -75 dBc 78 dBc 59 dB 10V 60 dB -72 dBc 76 dBc 60 dB When input impedance 1MΩ is set (test signal: 10MHz, -1dBFS) typ. Voltage range SNR THD SFDR SINAD 40mV 42 dB -50 dBc 51 dBc 42 dB 100mV 50 dB -59 dBc 61 dBc 50 dB 200mV 56 dB -62 dBc 65 dBc 55 dB 400mV 58 dB -67 dBc 68 dBc 58 dB 1V 60 dB -71 dBc 74 dBc 60 dB 2V 53 dB -76 dBc 78 dBc 53 dB 4V 57 dB -74 dBc 75 dBc 57 dB 10V 59 dB -73 dBc 76 dBc 59 dB 20V ‐ ‐ ‐ ‐ 40V ‐ ‐ ‐ ‐ Spectrum property *7 Time based accuracy When on-board crystal oscillator is set (default) ±5ppm (Temperature drift:±2.5ppm(0 - 50°C), Aging:±1ppm/year) When synchronize with external reference clock Depending on the accuracy of external reference clock *4 : The designated precision may not be satisfied because of cable. *5 : Voltage generator R6161 [ADVANTEST] is used in measurement. *6 : It is the value when offset/range is set to 0V. *7 : It is the value when noise filter is set to off. -10 0.001 0.01 0.1 1 10 100 1000 Frequency(MHz) Amplitude(dB relative to 1kHz) Specification -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 Frequency(100MHz) Amplitude(dBFS)

Ver.1.03 DIG-100M1002-PCI 3 Specification < 3 / 3 > Item Specification Reference clock I/O Input frequency 10MHz (Duty cycle is within 50 ±5%) *8 Input impedance 600 Ω Input coupling AC Input voltage 0.2Vpk - 3.3Vpk Max.input voltage ±5V Output frequency 10MHz Output impedance 50 Ω Output coupling DC Output voltage When 50Ω terminal resistance is used : 1V When open : Output frequency accuracy ±5ppm (aging: ±1ppm/year) External trigger I/O Logic type 3.3V LVTTL Output impedance 50 Ω I/O coupling DC I/O signal Trigger, general-purpose digital signal Trigger system source CH0, CH1, software, trigger input, synchronous control connector Conversion start trigger Software, conversion data compare, external trigger, and event controller output. Conversion stop trigger Settings include data save complete, conversion data compare, external trigger, event controller output, and software. External start signal LVTTL level (Rising or falling edge can be selected by software) External stop signal LVTTL level (Rising or falling edge can be selected by software) External status output signal LVTTL level Sampling clock output Bus master section DMA channels 1channel Transfer bus width 32bit Transfer data length 8 PCI data length (Max.) FIFO 1K data Scatter/Gather function 64M-Byte Synchronization bus section Control output signal Selection of output signal with the software when specifying a sync master board. Control input signal Selection of sync factor with the software when specifying sync slave boards. Max. board count for connection 16 boards including the master board Connector PS-10PE-D4LI-B1 (mfd. By JAE) or equivalence to it x 2 Common I/O address 64 ports x 1, 256 ports x 1 region Interrupt level Errors and various factors, One interrupt request line as INTA Connector used BNC (Cha racteristic Impedance 50Ω) Currrent Operating condition 0 - 50 °C, 10 - 90%RH (No condensation) Bus specification PCI (32bit, 33MHz, Universal key shapes supported *9) Dimensions (mm) 176.41(L) x 105.68(H) Weight 400g *8 : If the accuracy for the externally input clock is worse than the accuracy listed in time based accuracy, this product acquires the data 1.3 µs (max) before the external trigger signal was input when external trigger signal input was used for the pre-/post-trigger. *9 : This product requires +5V and +3.3V power supply from expansion slots. Board Dimensions [mm] 176.41(L) 105.68(H) The standard outside dimension (L) is the distance from the end of the board to the outer surface of the slot cover. Windows version of digitizer driver API-DIG(WDM) [Stored on the bundled CD-ROM driver library API-PAC(W32) cTEST] The API-DIG(WDM) is the Windows version driver library software that provides products in the form of Win32 API functions (DLL). Various sample programs such as Visual Basic and Visual C++, etc is provided. Windows version of application software Front panel software [Stored on the bundled CD-ROM driver library API-PAC(W32) cTEST] The front panel software is an application which can be used as an oscilloscope or waveform judgment instrument, it also has the function of diagnosing the state of the board and its driver. Moreover, you may use the “Diagnosis Report” feature reports the driver settings, the presence or absence of the board, I/O status, and interrupt status. Windows version of application software Configuration software [Stored on the bundled CD-ROM driver library API-PAC(W32) cTEST] By configuration software, you may create a configuration file of acquisition conditions for this product in a wizard form. Windows version of application software Mask editor software [Stored on the bundled CD-ROM driver library API-PAC(W32) cTEST] By the mask editor software, you may create a configuration file for waveform judgment with creating the waveform by drawing on screen directly with mouse or drawing with mathematics functions. < Operating environment > OS Windows 7, Vista, XP, Server 2003, 2000 Adaptation language Visual Basic, Visual C++, Visual C# For more details on the supported OS, applicable language and how to download the updated version, please visit the CONTEC’s Web site (http://www.contec.com/apipac/). Cable (Option) BNC Cable : BNC-B100 (1m), BNC-B200 (2m), BNC-B300 (3m) * Check the CONTEC’s Web site for more information on these options. Board [DIG-100M1002-PCI] …1 First step guide …1 CD-ROM *1 [API-PAC(W32) cTEST] …1 Synchronization control cable (10cm) …1 *1 The CD-ROM contains the driver software and User’s Guide. Packing List Support Software Cable & Connector

Ver.1.03 DIG-100M1002-PCI 4 Connector shape To connect an external device to this product, plug the cable from the device into the interface connector (CH0, CH1, CLK, TRG) shown below. This product has the following interface connectors: the (CH0, CH1 connector) for analog inputs, (CLK connector) for reference clock and (TRG connector) for external trigger I/O. - BNC connector [plug type] B6252HB-NPP3G-50 [mfd. by AMPHENOL TAIWAN] or equivalence to it Interface connector (CH0, CH1, CLK, TRG) CH1 CH0 CL K TRG 012 456 ABCDEF CN6 CN7 cTEST Series Digitizer DIG-100M1002-PCI MADE IN JAPAN SW1 CH1 CH0 CL K TRG CH1 CH0 CLK TRG (CH0, CH1, CLK, TRG) * Please refer to page 3 for more information on the supported cable. Option BNC cable BNC-Bxxx * Please refer to page 3 for more information on the supported cable. Connector Pin Assignment Pin Assignment of CH0, CH1, CLK, TRG Analog Input 0 - 1 Analog input signals. The numbers correspond to channel numbers. Analog Ground Analog ground co mmon to analog input signals. Trigger Input (IN) External trigger input signal used for sampling start condition and sampling clock etc. Combined use of the external trigger output and the connector. Can be only used as either external trigger input or external trigger output. Trigger Output (OUT) Outputs internal sampling clock and waveform judgment result as status signal. Combined use of the external trigger input and the connector. Can be only used as either external trigger input or external trigger output. Reference CLK Reference clock I/O signal Can be only used as either input or output. Digital Ground Digital ground common to digital I/O signals. CAUTION Please do not connect the analog ground and the digital ground. The measurement result of the analog signal may be influenced. Connection Example of Single-ended Input The following figure shows an example of shield cable connection. Connect BNC connector of CH0/CH1 for each anlog input channel respectively, the wick line to the signal line and the shield braid to the ground. Connecting the Single-ended Input (shield cable) Shield cable Analog Ground Analog Input 0/1 BOARD CH0/CH1 Signal Source CAUTION Do not touch the external connector (BNC connector) when the power is on. Otherwise this may malfunction, cause a failure due to static electricity. When high frequency more than 1/2 of the sampling frequency is included in the signal source, alias occurs, and the signal might not be acquired normally. If this product and the signal source receive noise or the distance between this product and the signal source is too long, data may not be input properly. The analog signal to be input should not exceed the maximum input voltage (based on this product analog ground). If it exceeds the maximum voltage, this product may be damaged. Input data remains indeterminate when no input pin is connected. The analog input pin for the channel not connected to the signal source must be connected to the analog ground. Please do not connect terminal resistances such as 50Ω and75Ω instead of short circuit. When input impedance is 50Ω, the output current (output voltage/50) from the signal source grows. Please confirm the current value of the connected signal source first. When the ground is set to input coupling type, please Block Diagram CH0 CH1 CLK TRG BNC Impedance 50Ω / 1MΩ Coupling AC / DC / GND Noise Filter ON / OFF GAIN OFFSET AD Converter BNC Impedance 50Ω / 1MΩ Coupling AC / DC / GND Noise Filter ON / OFF GAIN OFFSET AD Converter Controller BNC Timing Controller Oscillator BNC SyncBUS Connector PCI BUS Memory To Other Board How to connect the connectors Connecting the Analog Input Signal

Ver.1.03 DIG-100M1002-PCI 5 disconnect signal source from BNC connector first. If you do not so, signal source may fail. The settings of range setting etc. are unsettled when the PC is started. Please adjust the input impedance to 50Ω when the signal reflection etc. are anxious. However, the effect cannot be achieved except for cases such as setting the output impedance of the signal source to 50Ω, and setting the characteristic impedance of the used connector/cable etc. to 50Ω. This section shows an example of how to connect external trigger I/O signals (post trigger input signals and sampling clock input signal) using BNC cable. User can use an optional BNC cable (BNC-Bxxx) to connect your external devices to BNC connector of TRG. External trigger I/O signal is the positive logical I/O. These external trigger I/O signals are 3.3VLVTTL level not only for the input but also for the output. The external trigger I/O signal also can be used as BNC connector of TRG. Therefore, it can be only used as either the input or the output. Switching I/O can be done by the software. Connecting the External Trigger Input Trigger Input BOARD TRG Target 3.3V 10kΩ Digital Ground 50ΩSN74LVC245A Shield cable Connecting the External Trigger Output BOARD 3.3V 10kΩ 50Ω TRG Shield cable SN74LVC245A Trigger Output Target Digital Ground CAUTION Do not connect any output signal to the analog or digital ground. Do not interconnect outputs. Doing either can cause a malfunction. The signal input of 5VTTL/5VCOMOS is possible. The input is the default at startup. This section shows an example of how to connect reference clock I/O signals using BNC cable. User can use an optional BNC cable (BNC-Bxxx) to connect your external devices to CLK. External trigger I/O signal is the positive logical I/O. All the I/O signals are 3.3VLVTTL level. In addition, the reference clock I/O signal also can be used as BNC connector of CLK. Therefore, it can be only used as either the input or the output. Switching I/O can be done by the software. Connecting the Reference Clock Input BOARD CLK Target Reference CLK (IN) Digital Ground Shield cable 50Ω Connecting the Reference Clock Output BOARD CLK Reference CLK (OUT) Shield cable Target Digital Ground CAUTION Do not connect any output signal to the analog or digital ground. Do not interconnect outputs. Doing either can cause a malfunction. The input is the default at startup. The reference clock is a period signal that becomes the standard of the sampling period. It is possible to expand the number of channels by the synchronization between external instrument or another board with the same type by the reference clock, and measure the mixed signal by the synchronization between other measurement instrument. Moveover, it is also used in the case of performing sampling at a more accurate period supplied by frequency standards etc. Connecting the Reference Clock Input CLK CLK can be selected besides the reference clock from outside. Output CLK SC Connectors Controlling simultaneous operations between boards or controlling in sync with events is in part dependent on software performance. In order to enhance the reliability of the entire system and to solve these problems, the board is equipped with SC (Synchronization Control) connectors (CN6, CN7). Connecting the SC connectors allows boards of the same or different models to operate in sync with one another. From the boards connected with the SC cable, select one master board and use others as slaves. On the master board, set the signal to be supplied to the slave boards with the software. On the slave boards, the signal from the master board can be set to either the pacer clock operation start or stop factor. All board operations can also be stopped with a stop request from the master in case of an error, for example, or when requested from a slave board. A maximum of 16 boards can be connected including the master. For more information on the setup procedure, see the driver software online help. Example 1: When sampling clock start and stop requirements are set the same for multiple boards In order to synchronize master sampling clock start and stop with slave boards you can build a synchronous system which does not depend on software processing capabilities. If the board model is the same, data remains synchronized among boards even when channels are expanded. When board models are different, data still remains compatible since sampling clock start and stop are dependent on the master. (1) Connect the SC cable. (2) Designate master/slave with the software. Connecting the Reference Clock I/O Signal Connecting the External Trigger I/O Signal 600Ω @10MHz Typ Input circuit PLL circuit AD converterConnector Output circuit PLL circuit OscillatorConnector Synchronization Control Connectors

Ver.1.03 DIG-100M1002-PCI 6 (3) Assign to the connectors the sampling clock start and stop signals to be output from the master. (4) Set up slave boards so they can utilize all signals. (5) Start in order of slave to master boards. CAUTION When sampling clock signals are assigned to the synchronization control connector, the maximum clock frequency is restricted to 5MHz. When signals are assigned to the synchronization control connector, a delay of approximately 100nsec occurs at the slave board. Example 2: When controlling slave operations with master's internal events By outputting an internal event (interrupt) occurring on the master board, the slaves can start operating in sync with that signal. (1) Connect the SC cable. (2) Designate master/slave with the software. (3) Assign to the connector the event signal to be output from the master. (4) Set signals from the master to the start requirements on the slave boards. (5) Start in order of slave to master boards. Connecting the SC Connectors (CN6, CN7) This product is equipped with sync signal control connectors (CN3, CN4) for connecting a sync signal cable. When the cable is connected, multiple boards can operate in sync with one another. Connection Procedure Connect the sync signal cable when two or more boards need to operate in sync with one another. Connect CN6 with a smaller ID number to CN7 with a greater ID number with the cable. You should only use t he cable that came with the board. ID = 2 ID = 1 ID = 0