CAT93C46 CATALYST | Alldatasheet
Document overview
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Technical content
1K/2K/2K/4K/16K-Bit Microwire Serial E2PROM
FEATURES
n High Speed Operation: – 93C46/56/57/66: 1MHz – 93C86: 3MHz n Low Power CMOS Technology n 1.8 to 6.0 Volt Operation n Selectable x8 or x16 Memory Organization n Self-Timed Write Cycle with Auto-Clear n Hardware and Software Write Protection n Power-Up Inadvertant Write Protection n 1,000,000 Program/Erase Cycles n 100 Year Data Retention n Commercial, Industrial and Automotive Temperature Ranges n Sequential Read (except 93C46) n Program Enable (PE) Pin (93C86 only) 93C46/56/57/66/86 F02 PIN CONFIGURATION CMOS E 2PROM floating gate technology. The devices are designed to endure 1,000,000 program/erase cycles and have a data retention of 100 years. The devices are available in 8-pin DIP, 8-pin SOIC or 8-pin TSSOP packages.
DESCRIPTION
The CAT93C46/56/57/66/86 are 1K/2K/2K/4K/16K-bit Serial E 2PROM memory devices which are configured as either registers of 16 bits (ORG pin at VCC ) or 8 bits (ORG pin at GND). Each register can be written (or read) serially by using the DI (or DO) pin. The CAT93C46/56/ 57/66/86 are manufactured using Catalyst’s advanced 93C46/56/57/66/86 F01 PIN FUNCTIONS Pin Name Function CS Chip Select SK Clock Input DI Serial Data Input DO Serial Data Output VCC +1.8 to 6.0V Power Supply GND Ground ORG Memory Organization NC No Connection PE* Program Enable BLOCK DIAGRAM Note: When the ORG pin is connected to VCC, the X16 organiza tion is selected. When it is connected to ground, the X8 pin is selected. If the ORG pin is left unconnected, then an internal pullup device will select the X16 organization. © 1998 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice *Only For 93C86 CS SK DI DO VCC NC (PE*) ORG GND CS SK DI DO VCC ORG GND VCC CS SK ORG GND DO DI CS SK DI DO VCC ORG GND NC (PE*) NC (PE*) NC (PE*) VCC ORG GND DI CS SK DO NC (PE*) VCC ADDRESS DECODER MEMORY ARRAY ORGANIZATION DATA REGISTER MODE DECODE LOGIC CLOCK GENERATOR OUTPUT BUFFER DOSK CS DI ORG GND PE* Doc. No. 25056-00 2/98 M-1
Doc. No. 25056-00 2/98 M-1 ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin with Package Power Dissipation *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. RELIABILITY CHARACTERISTICS Symbol Parameter Min. Max. Units Reference Test Method N END (3) Endurance 1,000,000 Cycles/Byte MIL-STD-883, Test Method 1033 TDR (3) Data Retention 100 Years MIL-STD-883, Test Method 1008 VZAP (3) ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015 ILTH (3)(4) Latch-Up 100 mA JEDEC Standard 17 Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to V CC +1V. (5) Standby Current (ISB2)=0µA (<900nA) for 93C46/56/57/66, (ISB2)=2µA for 93C86. D.C. OPERATING CHARACTERISTICS VCC = +1.8V to +6.0V, unless otherwise specified. Limits Symbol Parameter Min. Typ. Max. Units Test Conditions ICC1 Power Supply Current 3 mA f SK = 1MHz (Operating Write) V CC = 5.0V ICC2 Power Supply Current 500 µAf SK = 1MHz (Operating Read) V CC = 5.0V ISB1 Power Supply Current 10 µA CS = 0V (Standby) (x8 Mode) ORG=GND ISB2 (5) Power Supply Current 0 µA CS=0V (Standby) (x16Mode) ORG=Float or V CC ILI Input Leakage Current 1 µAV IN = 0V to VCC ILO Output Leakage Current 1 µAV OUT = 0V to VCC , (Including ORG pin) CS = 0V VIL1 Input Low Voltage -0.1 0.8 4.5V ≤VCC <5.5V VIH1 Input High Voltage 2 V CC +1 VIL2 Input Low Voltage 0 V CC X0.2 1.8V ≤VCC <2.7V VIH2 Input High Voltage V CC X0.7 V CC +1 VOL1 Output Low Voltage 0.4 4.5V ≤VCC <5.5V VOH1 Output High Voltage 2.4 I OL = 2.1mA IOH = -400µA VOL2 Output Low Voltage 0.2 1.8V ≤VCC <2.7V VOH2 Output High Voltage V CC -0.2 I OL = 1mA IOH = -100µA V V V V V V V
Doc. No. 25056-00 2/98 M-1 Note: (1) Address bit A8 for 256x8 ORG and A7 for 128x16 ORG are "Don't Care" bits, but must be kept at either a "1" or "0" for READ, WRITE and ERASE commands. (2) Applicable only to 93C86 (3) This parameter is tested initially and after a design or process change that affects the parameter. PIN CAPACITANCE Symbol Test Max. Units Conditions C OUT (3) OUTPUT CAPACITANCE (DO) 5 pF V OUT =OV C IN(3) INPUT CAPACITANCE (CS, SK, DI, ORG) 5 pF V IN=OV INSTRUCTION SET Instruction Device Start Opcode Address Data Comments PE (2) Type Bit x8 x16 x8 x16 READ 93C46 1 10 A6-A0 A5-A0 Read Address AN–A0 93C56(1) 1 10 A8-A0 A7-A0 93C66 1 10 A8-A0 A7-A0 93C57 1 10 A7-A0 A6-A0 93C86 1 10 A10-A0 A9-A0 X ERASE 93C46 1 11 A6-A0 A5-A0 Clear Address AN–A0 93C56(1) 1 11 A8-A0 A7-A0 93C66 1 11 A8-A0 A7-A0 93C57 1 11 A7-A0 A6-A0 93C86 1 11 A10-A0 A9-A0 I WRITE 93C46 1 01 A6-A0 A5-A0 D7-D0 D15-D0 Write Address AN–A0 93C56(1) 1 01 A8-A0 A7-A0 D7-D0 D15-D0 93C66 1 01 A8-A0 A7-A0 D7-D0 D15-D0 93C57 1 01 A7-A0 A6-A0 D7-D0 D15-D0 93C86 1 01 A10-A0 A9-A0 D7-D0 D15-D0 I EWEN 93C46 1 00 11XXXXX 11XXXX Write Enable 93C56 1 00 11XXXXXXX 11XXXXXX 93C66 1 00 11XXXXXXX 11XXXXXX 93C57 1 00 11XXXXXX 11XXXXX 93C86 1 00 11XXXXXXXXX 11XXXXXXXX X EWDS 93C46 1 00 00XXXXX 00XXXX Write Disable 93C56 1 00 00XXXXXXX 00XXXXXX 93C66 1 00 00XXXXXXX 00XXXXXX 93C57 1 00 00XXXXXX 00XXXXX 93C86 1 00 00XXXXXXXXX 00XXXXXXXX X ERAL 93C46 1 00 10XXXXX 10XXXX Clear All Addresses 93C56 1 00 10XXXXXXX 10XXXXXX 93C66 1 00 10XXXXXXX 10XXXXXX 93C57 1 00 10XXXXXX 10XXXXX 93C86 1 00 10XXXXXXXXX 10XXXXXXXX I WRAL 93C46 1 00 01XXXXX 01XXXX D7-D0 D15-D0 Write All Addresses 93C56 1 00 01XXXXXXX 01XXXXXX D7-D0 D15-D0 93C66 1 00 01XXXXXXX 01XXXXXX D7-D0 D15-D0 93C57 1 00 01XXXXXX 01XXXXX D7-D0 D15-D0 93C86 1 00 01XXXXXXXXX 01XXXXXXXX D7-D0 D15-D0 I
Doc. No. 25056-00 2/98 M-1 Limits VCC =V CC =V CC = 1.8V-6V* 2.5V-6V 4.5V-5.5V Test tCSS CS Setup Time 200 150 50 ns tCSH CS Hold Time 0 0 0 ns V IL = 0.45V tDIS DI Setup Time 400 250 50 ns V IH = 2.4V tDIH DI Hold Time 400 250 50 ns C L = 100pF tPD1 Output Delay to 1 1 0.5 0.1 µsV OL = 0.8V tPD0 Output Delay to 0 1 0.5 0.1 µsV OH = 2.0v tHZ (1) Output Delay to High-Z 400 200 100 ns tEW Program/Erase Pulse Width 5 5 5 ms tCSMIN Minimum CS Low Time 1 0.5 0.1 µs tSKHI Minimum SK High Time 1 0.5 0.1 µs tSKLOW Minimum SK Low Time 1 0.5 0.1 µs tSV Output Delay to Status Valid 1 0.5 0.1 µsC L = 100pF SK MAX Maximum Clock Frequency DC 250 DC 1000 DC 3000 KHZ A.C. CHARACTERISTICS (93C46/56/57/66) Limits VCC =V CC =V CC = 1.8V-6V* 2.5V-6V 4.5V-5.5V Test tCSS CS Setup Time 200 100 50 ns tCSH CS Hold Time 0 0 0 ns V IL = 0.45V tDIS DI Setup Time 400 200 100 ns V IH = 2.4V tDIH DI Hold Time 400 200 100 ns C L = 100pF tPD1 Output Delay to 1 1 0.5 0.25 µsV OL = 0.8V tPD0 Output Delay to 0 1 0.5 0.25 µsV OH = 2.0v tHZ (1) Output Delay to High-Z 400 200 100 ns tEW Program/Erase Pulse Width 10 10 10 ms tCSMIN Minimum CS Low Time 1 0.5 0.25 µs tSKHI Minimum SK High Time 1 0.5 0.25 µs tSKLOW Minimum SK Low Time 1 0.5 0.25 µs tSV Output Delay to Status Valid 1 0.5 0.25 µsC L = 100pF SK MAX Maximum Clock Frequency DC 250 DC 500 DC 1000 KHZ * Preliminary data for 93C56/57/66 C L = 100pF A.C. CHARACTERISTICS (93C86) C L = 100pF NOTE: (1) This parameter is tested initially and after a design or process change that affects the parameter.
regardless of the write enable/disable status. the WRAL command is executed. Figure 4. Erase Instruction Timing
Doc. No. 25056-00 2/98 M-1
ORDERING INFORMATION
Notes: (1) The device used in the above example is a 93C46SI-1.8TE13 (SOIC, Industrial Temperature, 1.8 Volt to 6 Volt Operating Voltage, Tape & Reel) Package P = PDIP S = SOIC (JEDEC) J = SOIC (JEDEC) K = SOIC (EIAJ) U = TSSOP Prefix Device # Suffix 93C46 S I TE13 Product Number 93C46: 1K 93C56: 2K 93C57: 2K 93C66: 4K 93C86: 16K Tape & Reel TE13: 2000/Reel -1.8CAT Temperature Range Blank = Commercial (0˚ - 70˚C) I = Industrial (-40˚ - 85˚C) A = Automotive (-40˚ - 105˚C)* * -40˚ to +125˚C is available upon request Operating Voltage Blank (Vcc=2.5 to 6.0V) 1.8 (Vcc=1.8 to 6.0V) Optional Company ID