CAT1021_0711 CATALYST | Alldatasheet
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CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 1 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM, Manual Reset and Watchdog Timer
FEATURES
Precision Power Supply Voltage Monitor — 5V, 3.3V and 3V systems — Five threshold voltage options Watchdog Timer Active High or Low Reset — Valid reset guaranteed at V CC = 1V 400kHz I2C Bus 2.7V to 5.5V Operation Low power CMOS technology 16-Byte Page Write Buffer Built-in inadvertent write protection — WP pin (CAT1021) 1,000,000 Program/Erase cycles Manual Reset Input 100 year data retention Industrial and extended temperature ranges 8-pin DIP, SOIC, TSSOP, MSOP or TDFN (3 x 3mm foot-print) packages — TDFN max height is 0.8mm For Ordering Information details, see page 19.
DESCRIPTION
The CAT1021, CAT1022 and CAT1023 are complete memory and supervisory solutions for microcontroller- based systems. A 2k-bit serial EEPROM memory and a system power supervisor with brown-out protection are integrated together in low power CMOS technology. Memory interface is via a 400kHz I 2C bus. The CAT1021 and CAT1023 provide a precision V CC sense circuit and two open drain outputs: one (RESET) drives high and the other (RESET¯¯¯¯¯¯) drives low whenever VCC falls below the reset threshold voltage. The CAT1022 has only a RESET¯¯¯¯¯¯ output and does not have a Write Protect input. The CAT1021 also has a Write Protect input (WP). Write operations are disabled if WP is connected to a logic high. All supervisors have a 1.6 second watchdog timer circuit that resets a system to a known state if software or a hardware glitch halts or “hangs” the system. For the CAT1021 and CAT1022, the watchdog timer monitors the SDA signal. The CAT1023 has a separate watchdog timer interrupt input pin, WDI. The power supply monitor and reset circuit protect memory and system controllers during power up/down and against brownout conditions. Five reset threshold voltages support 5V, 3.3V and 3V systems. If power supply voltages are out of tolerance reset signals become active, preventing the system microcontroller, ASIC or peripherals from operating. Reset signals become inactive typically 200 ms after the supply voltage exceeds the reset threshold level. With both active high and low reset signals, interface to microcontrollers and other ICs is simple. In addition, the RESET¯¯¯¯¯¯ pin or a separate input, MR¯¯¯, can be used as an input for push- button manual reset capability. The on-chip, 2k-bit EEPROM memory features a 16-byte page. In addition, hardware data protection is provided by a V CC sense circuit that prevents writes to memory whenever VCC falls below the reset threshold or until VCC reaches the reset threshold during power up. Available packages include an 8-pin DIP and surface mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN and 8-pin MSOP packages. The TDFN package thickness is 0.8mm maximum. TDFN footprint options are 3 x 3mm.
CAT1021, CAT1022, CAT1023 Doc. No. MD-3009 Rev. M 2 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice BLOCK DIAGRAM THRESHOLD VOLTAGE OPTION Part Dash Number Minimum Threshold Maximum Threshold -45 4.50 4.75 -42 4.25 4.50 -30 3.00 3.15 -28 2.85 3.00 -25 2.55 2.70 PIN CONFIGURATION MR¯¯¯ 1 8 V CC WP 3 6 SCL VSS 4 5 SDA CAT1021 MR¯¯¯ 1 8 V CC NC 3 6 SCL VSS 4 5 SDA CAT1022 MR¯¯¯ 1 8 V CC RESET 3 6 SCL VSS 4 5 SDA CAT1023 (Bottom View) 0.8mm maximum height - (ZD4) VCC 8 1 MR¯¯¯ SCL 6 CAT1021 3 WP SDA 5 4 V SS VCC 8 1 MR¯¯¯ SCL 6 CAT1022 3 NC SDA 5 4 V SS VCC 8 1 MR¯¯¯ SCL 6 CAT1023
3 RESET
(CAT1021) (CAT1021/23) WDI (CAT1023)
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 3 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice PIN DESCRIPTION RESET/RESET¯¯¯¯¯¯: RESET OUTPUT (RESET CAT1021/23 Only) These are open drain pins and RESET¯¯¯¯¯¯ can be used as a manual reset trigger input. By forcing a reset condition on the pin the device will initiate and maintain a reset condition. The RESET pin must be connected through a pull-down resistor, and the RESET¯¯¯¯¯¯ pin must be connected through a pull-up resistor. SDA: SERIAL DATA ADDRESS The bidirectional serial data/address pin is used to transfer all data into and out of the device. The SDA pin is an open drain output and can be wire-ORed with other open drain or open collector outputs. SCL: SERIAL CLOCK Serial clock input. MR¯¯¯: MANUAL RESET INPUT Manual Reset input is a debounced input that can be connected to an external source for Manual Reset. Pulling the MR input low will generate a Reset condition. Reset outputs are active while MR input is low and for the reset timeout period after MR returns to high. The input has an internal pull up resistor. WP (CAT1021 Only): WRITE PROTECT INPUT When WP input is tied to V SS or left unconnected write operations to the entire ar ray are allowed. When tied to VCC, the entire array is protected. This input has an internal pull down resistor. WDI (CAT1023 Only): WATCHDOG TIMER INTERRUPT Watchdog Timer Interrupt Input is used to reset the watchdog timer. If a transition from high to low or low to high does not occur every 1.6 seconds, the RESET outputs will be driven active. PIN FUNCTION Pin Name Function NC No Connect RESET¯¯¯¯¯¯ Active Low Reset Input/Output VSS Ground SDA Serial Data/Address SCL Clock Input RESET Active High Reset Output (CAT1021/23) VCC Power Supply WP Write Protect (CAT1021 only) MR¯¯¯ Manual Reset Input WDI Watchdog Timer Interrupt (CAT1023) OPERATING TEMPERATURE RANGE Industrial -40ºC to 85ºC Extended -40ºC to 125ºC CAT102X FAMILY OVERVIEW Device Manual Reset Input Pin Watchdog Watchdog Monitor Pin Write Protection Pin Independent Auxiliary Voltage Sense RESET: Active High and LOW EEPROM CAT1021 9 9 SDA 9 9 2k CAT1022 9 9 SDA 2k CAT1023 9 9 WDI 9 2k CAT1024 9 9 2k CAT1025 9 9 9 2k CAT1026 9 9 2k CAT1027 9 WDI 9 2k For supervisory circuits with embedded 16k EEPROM, please refer to the CAT1161, CAT1162 and CAT1163 data sheets.
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 4 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice ABSOLUTE MAXIMUM RATINGS(1) Parameters Ratings Units Temperature Under Bias –55 to +125 ºC Storage Temperature –65 to +150 ºC Voltage on any Pin with Respect to Ground(2) –2.0 to V CC + 2.0 V VCC with Respect to Ground –2.0 to 7.0 V Package Power Dissipation Capability (TA = 25°C) 1.0 W Lead Soldering Temperature (10 secs) 300 ºC Output Short Circuit Current(3) 100 mA D.C. OPERATING CHARACTERISTICS VCC = 2.7V to 5.5V and over the recommended temperature conditions unless otherwise specified. Symbol Parameter Test Conditions Min Typ Max Units ILI Input Leakage Current V IN = GND to VCC -2 10 µA ILO Output Leakage Current V IN = GND to VCC -10 10 µA ICC1 Power Supply Current (Write) fSCL = 400kHz VCC = 5.5V 3 mA ICC2 Power Supply Current (Read) fSCL = 400kHz VCC = 5.5V 1 mA ISB Standby Current Vcc = 5.5V, VIN = GND or VCC 60 µA VIL (4) Input Low Voltage -0.5 0.3 x V CC V VIH (4) Input High Voltage 0.7 x V CC V CC + 0.5 V VOL Output Low Voltage IOL = 3mA VCC = 2.7V 0.4 V VOH Output High Voltage (RESET) IOH = -0.4mA VCC = 2.7V Vcc - 0.75 V CAT102x-45 (VCC = 5.0V) 4.50 4.75 V CAT102x-42 CC = 5.0V) 4.25 4.50 CAT102x-30 CC = 3.3V) 3.00 3.15 CAT102x-28 CC = 3.3V) 2.85 3.00 VTH Reset Threshold CAT102x-25 VRVALID Reset Output Valid V CC Voltage 1.00 V VRT (5) Reset Threshold Hysteresis 15 mV Notes: (1) Stresses above those listed under “Absolut e Maximum Ratings” may cause permanent dam age to the device. These are stress rat ings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sectio ns of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. (2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. M aximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns. (3) Output shorted for no more than one second. No more than one output shorted at a time. (4) VIL min and VIH max are reference values only and are not tested. (5) This parameter is tested initially and after a design or process change that affects the parameter. Not 100% tested.
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 5 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice CAPACITANCE TA = 25ºC, f = 1.0MHz, VCC = 5V Symbol Test Test Conditions Max Units COUT (1) Output Capacitance V OUT = 0V 8 pF CIN (1) Input Capacitance V IN = 0V 6 pF AC CHARACTERISTICS VCC = 2.7V to 5.5V and over the recommended temperature conditions, unless otherwise specified. Memory Read & Write Cycle(2) Symbol Parameter Min Max Units fSCL Clock Frequency 400 kHz tSP Input Filter Spike Suppression (SDA, SCL) 100 ns tLOW Clock Low Period 1.3 µs tHIGH Clock High Period 0.6 µs tR (1) SDA and SCL Rise Time 300 ns tF (1) SDA and SCL Fall Time 300 ns tHD; STA Start Condition Hold Time 0.6 µs tSU; STA Start Condition Setup Time (for a Repeated Start) 0.6 µs tHD; DAT Data Input Hold Time 0 ns tSU; DAT Data Input Setup Time 100 ns tSU; STO Stop Condition Setup Time 0.6 µs tAA SCL Low to Data Out Valid 900 ns tDH Data Out Hold Time 50 ns tBUF (1) Time the Bus must be Free Before a New Transmission Can Start 1.3 µs tWC (3) Write Cycle Time (Byte or Page) 5 ms Notes: (1) This parameter is characterized init ially and after a design or process change that affects the parameter. Not 100% tested. (2) Test Conditions according to “AC Test Conditions” table. (3) The write cycle time is the time from a valid stop conditi on of a write sequence to the end of the internal program/erase c ycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high and the device does not respond to its slave address.
CAT1021, CAT1022, CAT1023 Doc. No. MD-3009 Rev. M 6 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice RESET CIRCUIT AC CHARACTERISTICS Symbol Parameter Test Conditions Min Typ Max Units tPURST Power-Up Reset Timeout Note 2 130 200 270 ms tRDP V TH to RESET output Delay Note 3 5 µs tGLITCH V CC Glitch Reject Pulse Width Note 4, 5 30 ns MR Glitch Manual Reset Glitch Immunity Note 1 100 ns tMRW MR Pulse Width Note 1 5 µs tMRD MR Input to RESET Output Delay Note 1 1 µs tWD Watchdog Timeout Note 1 1.0 1.6 2.1 sec POWER-UP TIMING (5), (6) Symbol Parameter Test Conditions Min Typ Max Units tPUR Power-Up to Read Operation 270 ms tPUW Power-Up to Write Operation 270 ms AC TEST CONDITIONS Parameter Test Conditions Input Pulse Voltages 0.2V CC to 0.8VCC Input Rise and Fall times 10ns Input Reference Voltages 0.3V CC , 0.7VCC Output Reference Voltages 0.5V CC Output Load Current Source: I OL = 3mA; CL = 100pF RELIABILITY CHARACTERISTICS Symbol Parameter Reference Test Method Min Max Units NEND (5) Endurance MIL-STD-883, Test Method 1033 1,000,000 Cycles/Byte TDR (5) Data Retention MIL-STD-883, Test Method 1008 100 Years VZAP (5) ESD Susceptibility MIL-STD-883, Test Method 3015 2000 Volts ILTH (5)(7) Latch-Up JEDEC Standard 17 100 mA Notes: (1) Test Conditions according to “AC Test Conditions” table. (2) Power-up, Input Reference Voltage V CC = VTH, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table (3) Power-Down, Input Reference Voltage V CC = VTH, Reset Output Reference Voltage and Load according to “AC Test Conditions” Table (4) V CC Glitch Reference Voltage = VTHmin; Based on characterization data (5) This parameter is characterized init ially and after a design or process change that affects the parameter. Not 100% tested. (6) t PUR and tPUW are the delays required from the time VCC is stable until the specified memory operation can be initiated. (7) Latch-up protection is provided for stresses up to 100mA on input and output pins from -1V to VCC + 1V.
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 7 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice DEVICE OPERATION Reset Controller Description The CAT1021/22/23 precision RESET controllers ensure correct system operation during brownout and power up/down conditions. Th ey are configured with open drain RESET outputs. During power-u p, the RESET outputs remain active until VCC reaches the V TH threshold and will continue driving the outputs for approximately 200ms (t PURST) after reaching VTH. After the tPURST timeout interval, the device will cease to drive t he reset outputs. At this point the reset outputs will be pulled up or down by their respective pull up/down resistors. During power-down, the RESET outputs will be active when VCC falls below V TH. The RESET¯¯¯¯¯¯ output will be valid so long as V CC is >1.0V (V RVALID). The device is designed to ignore the fast negative going V CC transient pulses (glitches). Reset output timing is shown in Figure 1. Manual Reset Operation The RESET¯¯¯¯¯¯ pin can operate as reset output and manual reset input. The input is edge triggered; that is, the RESET¯¯¯¯¯¯ input will initiate a reset timeout after detecting a high to low transition. When RESET¯¯¯¯¯¯ I/O is driven to the active state, the 200 msec timer will begin to ti me the reset interval. If external reset is shorter than 200ms, Reset outputs will remain active at least 200ms. The CAT1021/22/23 also have a separate manual reset input. Driving the MR¯¯¯ input low by connecting a pushbutton (normally open) from MR¯¯¯ pin to GND will generate a reset condition. The input has an internal pull up resistor. Reset remains asserted while MR¯¯¯ is low and for the Reset Timeout period after MR¯¯¯ input has gone high. Glitches shorter than 100ns on MR¯¯¯ input will not ge- nerate a reset pulse. No external debouncing circuits are required. Manual reset operation using MR¯¯¯ input is shown in Figure 2. Hardware Data Protection The CAT1021/22/23 supervisors have been designed to solve many of the data corruption issues that have long been associated with serial EEPROMs. Data corruption occurs when incorrect data is stored in a memory location which is assumed to hold correct data. Whenever the device is in a Reset condition, the embedded EEPROM is disabled for all operations, including write operations. If the Reset output(s) are active, in progress communications to the EEPROM are aborted and no new communications are allowed. In this condition an internal write cycle to the memory can not be started, but an in progress internal non- volatile memory write cycle can not be aborted. An internal write cycle initiated before the Reset condition can be successfully finished if there is enough time (5ms) before V CC reaches the minimum value of 2V. In addition, the CAT1021 includes a Write Protection Input which when tied to V CC will disable any write operations to the device. Watchdog Timer The Watchdog Timer provides an independent protection for microcontrollers. During a system failure, CAT1021/22/23 devices will provide a reset signal after a time-out interval of 1.6 seconds for a lack of activity. The CAT1023 is designed with the Watchdog timer feature on the WDI pin. The CAT1021 and CAT1022 monitor the SDA line. If WDI or SDA does not toggle within a 1.6 second interval, the reset condition will be generated on the reset outputs. The watchdog timer is cleared by any transition on a monitored line. As long as reset signal is asserted, the watchdog timer will not count and will stay cleared.
Doc. No. MD-3009 Rev. M 12 © Catalyst Semiconductor, Inc. then proceed with the next read or write operation. memory array is protected and becomes read only. acknowledge after the first byte of data is received. READ, Selective/Random READ and Sequential READ. Figure 10. Immediate Address Read Timing
CAT1021, CAT1022, CAT1023 Doc. No. MD-3009 Rev. M 14 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice PACKAGE OUTLINE DRAWINGS PDIP 8-Lead 300mils (L)(1)(2) Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. D A L eb E eB c TOP VIEW SIDE VIEW END VIEW PIN # 1 IDENTIFICATION SYMBOL MIN NOM MAX A5 . 3 3 A1 0.38 A2 2.92 3.30 4.95 b 0.36 0.46 0.56 b2 1.14 1.52 1.78 c 0.20 0.25 0.36 D 9.02 9.27 10.16 E 7.62 7.87 8.25 e 2.54 BSC E1 6.10 6.35 7.11 eB 7.87 10.92 L 2.92 3.30 3.80
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 15 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice SOIC 8-Lead 150mils (W) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW A1 . 3 5 1 . 7 5 A1 0.10 0.25 b0 . 3 3 0 . 5 1 c0 . 1 9 0 . 2 5 D4 . 8 0 5 . 0 0 E5 . 8 0 6 . 2 0 E1 3.80 4.00 e 1.27 BSC h0 . 2 5 0 . 5 0 L0 . 4 0 1 . 2 7 θ 0º 8º SYMBOL MIN NOM MAX
CAT1021, CAT1022, CAT1023 Doc. No. MD-3009 Rev. M 16 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice TSSOP 8-Lead (V) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153 E1 E e b D cA TOP VIEW SIDE VIEW END VIEW L1 L SYMBOL MIN NOM MAX A1 . 2 0 A1 0.05 0.15 A2 0.80 0.90 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 3.00 3.10 E 6.30 6.40 6.50 E1 4.30 4.40 4.50 e0 . 6 5 B S C L1 . 0 0 R E F L1 0.50 0.60 0.75 θ10 ° 8 ° For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf.
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 17 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice MSOP 8-Lead (Z) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-187. θ E1E A1 e b D c A TOP VIEW SIDE VIEW END VIEW L DETAIL A DETAIL A SYMBOL MIN NOM MAX A1 . 1 0 A1 0.05 0.10 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 c 0.13 0.23 D 2.90 3.00 3.10 E 4.80 4.90 5.00 E1 2.90 3.00 3.10 e 0.65 BSC L 0.40 0.60 0.80 L1 0.95 REF L2 0.25 BSC θ 0º 6º For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf.
CAT1021, CAT1022, CAT1023 Doc. No. MD-3009 Rev. M 18 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice TDFN 8-Pad 3 x 3mm (ZD4) (1)(2) Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MO-229. For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. eb A SIDE VIEW BOTTOM VIEW E D TOP VIEW PIN#1 INDEX AREA PIN#1 ID FRONT VIEW A L SYMBOL MIN NOM MAX A 0.70 0.75 0.80 A1 0.00 0.02 0.05 A3 0.20 REF b 0.23 0.30 0.37 D 2.90 3.00 3.10 D2 2.20 — 2.50 E 2.90 3.00 3.10 E2 1.40 — 1.80 e0 . 6 5 T Y P L 0.20 0.30 0.40
CAT1021, CAT1022, CAT1023 © Catalyst Semiconductor, Inc. 19 Doc. No. MD-3009 Rev. M Characteristics subject to change without notice EXAMPLE OF ORDERING INFORMATION(1) CAT1021LI-45-G CAT1021ZI-45-GT3 CAT1021LI-42-G CAT1021ZI-42-GT3 CAT1021LI-30-G CAT1021ZI-30-GT3 CAT1021LI-28-G CAT1021ZI-28-GT3 CAT1021LI-25-G CAT1021ZI-25-GT3 CAT1021WI-45-GT3 CAT1021ZD4I-45-T2 CAT1021WI-42-GT3 CAT1021ZD4I-42-T2 CAT1021WI-30-GT3 CAT1021ZD4I-30-T2 CAT1021WI-28-GT3 CAT1021ZD4I-28-T2 CAT1021WI-25-GT3 CAT1021ZD4I-25-T2 CAT1021YI-45-GT3 CAT1021YI-42-GT3 CAT1021YI-30-GT3 CAT1021YI-28-GT3 CAT1021YI-25-GT3 CAT1022xx and Cat1023xx Ordering Part Numbers are located on page 20. Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is NiPdAu. (3) The device used in the above example is a CAT1021WI-30-GT3 (SOIC, Industrial Temperature, 3.0 - 3.15V, NiPdAu, Tape & Reel, 3,000/Reel). (4) For additional package and temperature options, please contact your nearest Catalyst Semiconductor Sales office. (5) TDFN not available in NiPdAu (–G) version. Prefix Device # Suffix CAT 1021 W I -30 – G T3 Company ID Package L: PDIP W: SOIC Y: TSSOP Z: MSOP ZD4: TDFN 3x3mm (5) Temperature Range I = Industrial (-40ºC to 85ºC) Reset Threshold Voltage -45: 4.50V – 4.75V -42: 4.25V – 4.50V -30: 3.00V – 3.15V -28: 2.85V – 3.00V -25: 2.55V – 2.70V Product Number 1021: 2K 1022: 2K 1023: 2K Tape & Reel T: Tape & Reel 2: 2000/Reel (only TDFN) 3: 3,000/Reel Lead Finish Blank: Matte-Tin G: NiPdAu For Product Top Mark Codes, click here: http://www.catsemi.com/techsupport/producttopmark.asp
CAT1021, CAT1022, CAT1023 Doc. No. MD-3009 Rev. M 20 © Catalyst Semiconductor, Inc. Characteristics subject to change without notice CAT1022LI-45-G CAT1022ZI-45-GT3 CAT1022LI-42-G CAT1022ZI-42-GT3 CAT1022LI-30-G CAT1022ZI-30-GT3 CAT1022LI-28-G CAT1022ZI-28-GT3 CAT1022LI-25-G CAT1022ZI-25-GT3 CAT1022WI-45-GT3 CAT1022ZD4I-45-T2 CAT1022WI-42-GT3 CAT1022ZD4I-42-T2 CAT1022WI-30-GT3 CAT1022ZD4I-30-T2 CAT1022WI-28-GT3 CAT1022ZD4I-28-T2 CAT1022WI-25-GT3 CAT1022ZD4I-25-T2 CAT1022YI-45-GT3 CAT1022YI-42-GT3 CAT1022YI-30-GT3 CAT1022YI-28-GT3 CAT1022YI-25-GT3 CAT1023LI-45-G CAT1023ZI-45-GT3 CAT1023LI-42-G CAT1023ZI-42-GT3 CAT1023LI-30-G CAT1023ZI-30-GT3 CAT1023LI-28-G CAT1023ZI-28-GT3 CAT1023LI-25-G CAT1023ZI-25-GT3 CAT1023WI-45-GT3 CAT1023ZD4I-45-T2 CAT1023WI-42-GT3 CAT1023ZD4I-42-T2 CAT1023WI-30-GT3 CAT1023ZD4I-30-T2 CAT1023WI-28-GT3 CAT1023ZD4I-28-T2 CAT1023WI-25-GT3 CAT1023ZD4I-25-T2 CAT1023YI-45-GT3 CAT1023YI-42-GT3 CAT1023YI-30-GT3 CAT1023YI-28-GT3 CAT1023YI-25-GT3
REVISION HISTORY
Date Rev. Reason 9/25/2003 F Added Green Package logo Updated DC Operating Characteristic notes Updated Reliability Characteristics notes 11/7/2003 G Eliminated Automotive temperature range Updated Ordering Information with “Green” package codes Updated Reset Circuit AC Characteristics 4/12/2004 H Eliminated data sheet designation Updated Reel Ordering Information 11/1/2004 I Eliminated 8-pad TDFN package (3 x 4.9mm) Changed SOIC package designators Added package outlines 11/04/2004 J Update Pin Configuration 11/11/2004 K Update Feature Update Description Update DC Operating Characteristic Update AC Characteristics 02/02/2007 L Update Example of Ordering Information 11/28/2007 Update Package Outline Drawings Update Example of Ordering Information Add “MD-“ to document number Catalyst Semiconductor, Inc. Corporate Headquarters
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Santa Clara, CA 95054 Phone: 408.542.1000 Document No: MD-3009 Fax: 408.542.1200 Revision: M www.catsemi.com Issue date: 11/28/07 Copyrights, Trademarks and Patents © Catalyst Semiconductor, Inc. Trademarks and registered trademarks of Catalyst Semiconductor include each of the following: Adaptive Analog™, Beyond Memory™, DPP™, EZDim™, LDD™, MiniPot™, Quad-Mode™ and Quant um Charge Programmable™ Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUAR ANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRO DUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARIS ING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES. Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgica l implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconduct or product could create a situation where personal injury or death may occur. Catalyst Semiconductor reserves the right to make changes to or discontinue any produ ct or service descr ibed herein without not ice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale. Catalyst Semiconductor advises customers to obtain the current version of the rele vant product informati on before placing order s. Circuit diagrams illustrate typical semiconductor applications and may not be complete.