AT480S58

AT480 POSEICO | Alldatasheet

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PHASE CONTROL THYRISTOR AT480 Repetitive voltage up to 5800 V Mean forward current 527 A Surge current 4,5 kA FINAL SPECIFICATION Feb. 17 - Issue: 5 Symbol Characteristic Conditions Tj [°C] Value Unit BLOCKING V RRM Repetitive peak reverse voltage 125 5800 V V RSM Non-repetitive peak reverse voltage 125 5900 V V DRM Repetitive peak off-state voltage 125 5800 V I RRM Repetitive peak reverse current V=VRRM 125 70 mA I DRM Repetitive peak off-state current V=VDRM 125 70 mA CONDUCTING I T (AV) Mean forward current 180° sin, 50 Hz, Th=55°C, double side cooled 527 A I T (AV) Mean forward current 180° sin, 50 Hz, Tc=85°C, double side cooled 424 A I TSM Surge forward current Sine wave, 10 ms 125 4,5 kA I² t I² t without reverse voltage 101 x 103 A²s V T On-state voltage On-state current = 1000 A 25 2,70 V V T(TO) Threshold voltage 125 1,30 V r T On-state slope resistance 125 1,760 mohm SWITCHING di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 620 A; gate 10V, 5W 125 200 A/µs dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM 125 500 V/µs t d Gate controlled delay time, typical VD=100V; gate source 25V, 10W , tr=.5 µs 25 1,6 µs t q Circuit commutated turn-off time, typical dv/dt = 20 V/µs linear up to 75% VDRM 500 µs Q rr Reverse recovery charge di/dt = -20 A/µs, I= 410 A 125 µC I rr Peak reverse recovery current VR= 50 V A I H Holding current, typical VD=5V, gate open circuit 25 300 mA I L Latching current, typical VD=5V, tp=30µs 25 700 mA GATE V GT Gate trigger voltage VD=5V 25 2,50 V I GT Gate trigger current VD=5V 25 250 mA V GD Non-trigger gate voltage, min. VD=VDRM 125 0,25 V V FGM Peak gate voltage (forward) 30 V I FGM Peak gate current 10 A V RGM Peak gate voltage (reverse) 5 V P GM Peak gate power dissipation Pulse width 100 µs 150 W P G Average gate power dissipation 2 W MOUNTING R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 37,0 °C/kW R th(c-h) Thermal impedance Case to heatsink, double side cooled 7,0 °C/kW T j Operating junction temperature -30 / 125 °C F Mounting force 11.8 / 13.2 kN Mass 300 g ORDERING INFORMATION : AT480 S 58 standard specification VRRM/100 POSEICO SPA Via Pillea 42-44, 16153 Genova - ITALY Tel. + 39 010 8599400 - Fax + 39 010 8682006 Sales Office: Tel. + 39 010 8599400 - sales@poseico.com

AT480 PHASE CONTROL THYRISTOR FINAL SPECIFICATION Feb. 17 - Issue: 5 DISSIPATION CHARACTERISTICS SQUARE WAVE 100 110 120 130 0 100 200 300 400 500 600 700 800 Th [°C] IF(AV) [A] DC 180° 120° 90° 60° 30° 200 400 600 800 1000 1200 1400 1600 1800 2000 0 100 200 300 400 500 600 700 800 PF(AV) [W] IF(AV) [A]

AT480 PHASE CONTROL THYRISTOR FINAL SPECIFICATION Feb. 17 - Issue: 5 DISSIPATION CHARACTERISTICS SINE WAVE 180°120°90°60°30° 100 110 120 130 0 100 200 300 400 500 600 Th [°C] IF(AV) [A] 180° 120° 90° 60° 30° 200 400 600 800 1000 1200 1400 1600 1800 2000 0 100 200 300 400 500 600 PF(AV) [W] IF(AV) [A]

AT480 PHASE CONTROL THYRISTOR FINAL SPECIFICATION Feb. 17 - Issue: 5 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by 200 400 600 800 1000 1200 1400 1600 1800 0 1 2 3 4 5 On-State Current [A] On-State Voltage [V] ON-STATE CHARACTERISTIC Tj = 125 °C 0,001 0,01 0,1 1 10 100 Zth j-h [°C/kW] t[s] TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 0,5 1,5 2,5 3,5 4,5 1 10 100 ITSM [kA] n° cycles SURGE CHARACTERISTIC Tj = 125 °C All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm. In the interest of product improvement POSEICO SpA reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported.