ASM0402C APLUS | Alldatasheet

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APLUS MAKE YOUR PRODUCTION A-PLUS ASM0402C DATA SHEET APLUS INTEGRATED CIRCUITS INC. Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115)台北市南港區成功路㆒段32 號 3 樓之 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw Sales E-mail: Mr. Jason sales@aplusinc.com.tw Technology E-mail: Mr. George service@aplusinc.com.tw

Rev 1.0 1 ASM0402C – VERY LOW-COST VOICE SYNTHESIZER WITH 4-BIT MICROPROCESSOR

1.0 General Description

The ASM0402C is very low cost voice synthesizer with 4-bit microprocessor. It has various features including 4-bit ALU, ROM, RAM, I/O ports, time rs, clock generator, watchdog timer(WDT), voice synthesizer, etc. It consists of 22 instructions in the device. With CMOS technology and halt function can minimize power dissipation. Its ar chitecture is similar to RISC, w ith two stages of instruction pipeline. It allows all instructions to be execute d in a single cycle, except for program branches and data table read instructions (which need two instruction cycles).

1.1 Feature

‹ Single power supply can operate from 2.4V through 5V ‹ Internal Program ROM: 2K x 10-bit ‹ 1 sets of 14-bit DPR can access up to 16K x 10 bits data memory space ‹ Data Registers:

  • 48 x 4-bit data RAM (00-1Fh plus 40h-4Fh)
  • Unbanked special function registers (SFR) range: 20h-3Fh ‹ I/O Ports:
  • PRA: 2-bit I/O Port A (2Bh) ‹ On-chip clock generator: Resistive Clock Drive (RM) ‹ Timer: 1
  • Timer0: a 9-bit auto-reload timer/counter ‹ Stack: 2-level subroutine nesting ‹ HALT and Release from HALT function to reduce power consumption ‹ Watch Dog Timer (WDT) ‹ Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles ‹ Number of instruction: 22 ‹ The Voice function can be implemented by microprocessor instruction
  • One 8-bit COUT output for ASMxxxxx

Rev 1.0 2 FIGURE 1.1 : Block Diagram of ASM0402C COUT OSC VDD/GND ROM PC[11:0] ROM Latch Instruction Latch Instruction Decoder PCH(8) PCL(4) PCLA TCH(8) DPR3,2,1 Program DLATCH(10) Clock Generator Power on Reset Test select P1,P2,P3,P4 enter test mode Timer0(9) Reset Chip Stack(12) Data Bus[3:0 ] Instruction Bus [9:0] ROM_ADDR[13:0] ROM_Data[9:0] Data Bus[3:0] Control Signal ADDR[13:0]=00b (ADDR[13:12]) PRASL(2) weak or strong pull-low for PRA (Data) Instruction Bus [9:0] Instruction Bus [9:0] ( V oice synthesizer ) One-Channel SRAM (48 x 4) 40h-4Fh (2-Level) ALU(4) Register(4) Accumlator (4) Immediate (4) DPR[13:0] RESET pin Reset Chip PRA0 00h-1Fh PRA(2) COUT

Rev 1.0 3 FIGURE 1.2 : External ROM Map of ASM0402C Data ROM 12bit x 2 STACK Reset Vector 03FFFh(16Kx10-bits) 007FFh(2K) 00000h-007FFh Program and data ROM 14-bit Data Pointer PC[11:0] 00000h-03FFFh Reserved for Testing 00080h-003FFh 00400h 00000h 00080h

Rev 1.0 4

1.2 Pin-Out

VDD I - Power supply during operation PRA1 I/O STI Std./O.D. I/O port with programmable strong pull-low or weak pull-low or fix-input- floating capability Output type with standard or Open-Drain output PRA0/RESET I/O STI Std./O.D. I/O port with programmable strong pull-low or weak pull-low or fix-input- floating capability Output type with standard or Open-Drain output Mask option selected as an external RESET pin with weak pull-low capability OSC I - RM mode Oscillator input COUT O - Current Output of Audio GND I - Circuit Ground Potential TEST O - Enter Test Mode. ( TEST = High )

1.3 Application circuit

Rev 1.0 5

1.4 Bonding Diagram

ASM0402C Pad Location Chip Size: X=1560+100 (um), Y=1030+100 (um) PAD # PAD Name X Y PAD # PAD Name X Y 1C O U T -509.92 -430.32 6 TEST_PAD 507.6 -430.32 2R A _ P A D [ 1 ] -203.2 -430.32 7V D D 677.52 -430.32 3R A _ P A D [ 0 ] / R E S E T -9.04 -430.32 4O S C _ P A D 117.25 -430.32 5G N D -347.6 -430.32 ASM0402C CHIP SIZE: X= 1560+100(um) , Y= 1030+100(um) 16K x 10 bit ROM 4 5 6 7 3 2 1

Rev 1.0 6

1.5 DC Characteristics for ASMxxxxx

SYMBOL PARAMETER VDD MIN. TYP. MAX. UNIT CONDITION VDD OPERATING VOLTAGE 2.4 3 5 V depending on Freq. 31Isb STANDBY 51 uA 4MHz, RM in HALT Mode 32Iop SUPPLY CURREN T OPERATING 57 mA 4MHz, RM IO Floating Iih INPUT CURRENT /Internal pull low 5 -5.2 uA 4MHz, RM in HALT Mode (IO Ports with weak pull-high pull-low) 3- 3Ioh OUTPUT HIGH CURRENT 5- 8 37Iol OUTPUT LOW CURRENT 52 0 mA 4MHz, RM (IO ports) dF/F FREQUENCY STABILITY -10 10 % Fosc(3v)- Fosc(2.4v) Fosc (3v) dF/F Fosc VARIATION -20 20 % VDD=3V, Rosc=910k, 4MHz FIGURE 1.3 : Frequency Range for Rosc in RM mode Resistor(k ohm) 1200 1000 820 470 Rosc & Freq. 3.1253.7854.445 7.2 0 200 400 600 800 1000 1200 1400 Rosc k ohm Freq. MHz