PR33A3

PR33A3 APLUS | Alldatasheet

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Integrated Circuits Inc. aPR33A3 Ver. E 1/27 JAN 06 2014 aPR33A3 Tape Mode (C3.1) Datasheet Recording voice IC APLUS INTEGRATED CIRCUITS INC. Address: TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http://www.aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw Sales E-mail: sales@aplusinc.com.tw

Integrated Circuits Inc. aPR33A3 Ver. E 2/27 JAN 06 2014 /square6 FEATURES /circle6 Operating Voltage Range: 3V ~ 6.5V /circle6 Single Chip, High Quality Audio/Voice Recording & Playback Solution /rhombus6 No External ICs Required /rhombus6 Minimum External Components /circle6 User Friendly, Easy to Use Operation /rhombus6 Programming & Development Systems Not Required /circle6 680 sec. Voice Recording Length in aPR33A3 /circle6 Powerful 16-Bits Digital Audio Processor. /circle6 Nonvolatile Flash Memory Technology /rhombus6 No Battery Backup Required /circle6 External Reset pin. /circle6 Powerful Power Management Unit /rhombus6 Very Low Standby Current: 1uA /rhombus6 Low Power-Down Current: 15uA /rhombus6 Supports Power-Down Mode for Power Saving /circle6 Built-in Audio-Recording Microphone Amplifier /rhombus6 No External OPAMP or BJT Required /rhombus6 Easy to PCB layout /circle6 Configurable analog interface /rhombus6 Differential-ended MIC pre-amp for Low Noise /rhombus6 High Quality Line Receiver /circle6 High Quality Analog to Digital, DAC and PWM module /rhombus6 Resolution up to 16-bits /circle6 Simple And Direct User Interface /circle6 Tape mode manages messages

Integrated Circuits Inc. aPR33A3 Ver. E 3/27 JAN 06 2014 /square6 DESCRIPTION Today’s consumers demand the best in audio/voice. They want crystal-clear sound wherever they are in whatever format they want to use. APLUS delivers the technology to enhance a listener’s audio/voice experience. The aPR33A series are powerful audio processor along with high performance audio analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). The aPR33A series are a fully integrated solution offering high performance and unparalleled integration with analog input, digital processing and analog output functionality. The aPR33A series incorporates all the functionality required to perform demanding audio/voice applications. High quality audio/voice systems with lower bill-of-material costs can be implemented with the aPR33A series because of its integrated analog data converters and full suite of quality-enhancing features such as sample-rate convertor. The aPR33A series C3.1 is Tape mode manages messages sequentially much like traditional cassette tape recorders. Within tape mode two options exist, auto rewind and non-auto rewind. Auto rewind mode configures the device to automatically rewind to the beginning of the message immediately following recording or playback of the message. In tape mode, using either option, messages must be recorded or played back sequentially, much like a traditional cassette tape recorder specially designed for simple key trigger, user can record and playback the message. Meanwhile, this mode provides the power-management system. Users can let the chip enter power-down mode when unused. It can effectively reduce electric current consuming to 15uA and increase the using time in any projects powered by batteries.

Integrated Circuits Inc. aPR33A3 Ver. E 4/27 JAN 06 2014 /square6 PIN CONFIGURATION DIP / SOP Package

Integrated Circuits Inc. aPR33A3 Ver. E 5/27 JAN 06 2014 /square6 PIN DESCRIPTION Pin Names Pin No TYPE Description VDDP VDD VDDA VDDL Positive power supply. VSSP VSSL VSSA Power ground. VLDO 25 Internal LDO output. VCORE 16 Positive power supply for core. VREF 19 Reference voltage. VCM 20 Common mode voltage. Rosc 26 INPUT Oscillator resistor input. /RSTB 27 INPUT Reset. (Low active) SRSTB 28 INPUT System reset, pull-down a resistor t o the VSSL. MIC+ MIC- INPUT Microphone differential input. MICG 23 OUTPUT Microphone ground. VOUT1 7 INPUT PWM output to drive speaker directly. DAC option. VOUT2 6 INPUT PWM output to drive speaker directly. DAC output. /REC 12 INPUT Record Mode. (Low active) /M0_Tg 13 INPUT Play/Record trigger. (Low active) /M1_Next 14 INPUT This pin forces a jump to next message for either recording or playback. (Low active) /M2_/CE 15 INPUT Reset message management features. (Low active) /M6_BE 1 INPUT Beep enable/disable. (Low active) /M7_Option 2 INPUT Auto Rewind / Non-Auto Rewind (Low active) mode select.

Integrated Circuits Inc. aPR33A3 Ver. E 6/27 JAN 06 2014 /square6 TYPICAL APPLICATION

Integrated Circuits Inc. aPR33A3 Ver. E 7/27 JAN 06 2014 /square6 MESSAGE MODE In tape message mode (C3.1), users can divide the memory sequentially much like traditional cassette tape recorders. Within tape mode, there are two options - auto rewind and non-auto rewind which will be applied by the /M7_Option pin. /circle6 Tape Mode using the Auto Rewind Option of record The following fig. showed a typical record circuit for auto rewind mode. We add a slide-switch between /REC pin and VSS, and add 2 tact-switches /M0_Tg, /M2_CE pin and VSS. When the slide-switch fixed in VSS side and press /M0_TG tact switch, chip will start message record and until the users release the tact-switch. Note: After reset, /REC and /M0_Tg, /M2_/CE and /M7_Option pin will be pull-up to VDD by internal resistor. On power-up, the device is ready to record or playback from the first address of the memory array. Send a falling edge to the /M0_Tg pin the device will beep once and start recording. A subsequent rising edge to the /M0_Tg pin will stop recording & beep once. If the M0_Tg pin is kept in low potential to the end of the memory, the recording will stop automatically & beep once regardless of the state of the /M0_Tg pin. The device returns to the standby mode and the /M0_Tg pin is returned to high. Please note the next recording operation will totally cover all your previous messages. Your new recorded message will be your first message and your original messages will be lost.

Integrated Circuits Inc. aPR33A3 Ver. E 8/27 JAN 06 2014 /circle6 Tape Mode using the Auto Rewind Option of playback The following fig. showed a typical playback circuit for auto rewind mode. We add a slide-switch between /REC pin and VSS, and add 2 tact-switches /M0_Tg, /M2_CE pin and VSS. When the slide-switch fixed in float side and press /M0_Tg pin, chip will start message playback. Note: After reset, /REC and /M0_Tg, /M2_/CE and /M7_Option pin will be pull-up to VDD by internal resistor. On power-up, beep twice and the device will be ready to playback from the first address of memory array. Send a falling edge to the /M0_Tg pin to play the present message. During the playback, send a falling edge to/M0_Tg pin then it will stop playing & beep once. After stop playing, sending a falling edge to /M0_Tg pin again, it will start to play the next message. After playing the last message, send a falling edge to /M0_Tg pin, and it will beep once to remind you & auto-rewind to the first message. If /M0_Tg pin is kept in low potential continually, the messages will be played to the last one & beep twice repeatedly. When /M0_Tg pin is back to high potential, the beep voices stop and the message will be auto-rewind to the first message.

Integrated Circuits Inc. aPR33A3 Ver. E 9/27 JAN 06 2014 /circle6 Tape Mode using the Non-Auto Rewind Option of record The following fig. showed a typical record circuit for non-auto rewind mode. We add a slide-switch between /REC pin and VSS, and add 3 tact-switches /M0_Tg, /M1_Next, /M2_CE pin and VSS. When the slide-switch fixed in Vss side and press /M0_Tg tact-switch , chip will start message record and until the users release the tact-switch. If you want to record a new message, please press /M1_Next switch to go to the next section. Note: After reset, /REC and /M0_Tg, /M1_Next, /M2_/CE and /M7_Option pin will be pull-up to VDD by internal resistor. On power-up, beep twice and the device is ready to record from the first address of memory array. Send a falling edge to /M0_Tg pin and it will start recording & beep once. It must be kept in low potential when recording. Send a rising edge to /M0_Tg pin and it will stop recording & beep once. If /M0_Tg is kept in low potential and over the acceptable memory, it will stop recording automatically & beep once. When /M0_Tg pin is rising in high potential, the device will auto-rewind to the beginning place of the message & keep in standby mode to wait for a new command. Please note the next recording operation will cover your original message so the users have to send a falling edge to /M1_Next pin to let the device goes to the next message to protect your original data. This mode allows the users easily record a new message to cover the original message unnecessarily triggering /M1_Tg pin. If you need to cover the other messages, send a falling edge to /M2_CE pin to back to the beginning of the memory then send falling edges to /M1_Next pin to the message that you want to be covered. When you cover this message, it will be the last message. The original ones behind this message will be totally lost.

Integrated Circuits Inc. aPR33A3 Ver. E 10/27 JAN 06 2014 /circle6 Tape Mode using the Non-Auto Rewind Option of playback The following fig. showed a typical playback circuit for non-auto rewind mode. We add a slide-switch between /REC pin and VSS, and add 3 tact-switches /M0_Tg, /M1_Next, /M2_CE pin and VSS. When the slide-switch fixed in float side and press /M0_Tg tact-switch , chip will start message playback. Note: After reset, /REC and /M0_Tg, /M1_Next, /M2_/CE and /M7_Option pin will be pull-up to VDD by internal resistor. On power-up, beep twice and the device will be ready to play from the first address of memory array. Send a falling edge to /M0_Tg pin then it will play from the first message & beep once. During the playback, if /M0_Tg pin receive the falling edge then it will stop playback immediately. After stop playing, send a falling edge to /M0_Tg pin and it will play the message from the beginning. If you keep /M0_Tg pin in low potential, this message will loop playing. Send a falling edge to /M2_CE pin, beep once & go back to the first message to wait for the next command. Please note the mode only can play the present message. If you want to hear the next message, you have to send a falling edge to /M1_Next pin to complete ( beep once ). When arrive to the end of memory, sending a falling edge to /M0_Tg pin again, the device will beep twice and go back to the first message to wait for a new command.

Integrated Circuits Inc. aPR33A3 Ver. E 11/27 JAN 06 2014 /square6 VOICE INPUT The aPR33A series supported single channel voice input by microphone or line-in. The following fig. showed circuit for different input methods: microphone, line-in and mixture of both. (A) Microphone

Integrated Circuits Inc. aPR33A3 Ver. E 12/27 JAN 06 2014 Note: The 10K resistor used for input signal adjust, and the value just for reference. (B) Line-In Note: The 10K resistor used for input signal adjust, and the value just for reference. (C) Microphone + Line-In

Integrated Circuits Inc. aPR33A3 Ver. E 13/27 JAN 06 2014 /square6 VOICE OUTPUT The aPR33A series support 2 voice output mode, PWM and DAC. The PWM mode use VOUT1 and VOUT2 pin to drive speaker directly without external components to save cost. The DAC mode use VOUT2 pin to output current signal. User can use the signal to drive audio amplifier or mix with other components in their applications to provide larger voice volume. The following fig. show circuit for different output methods: PWM, DAC, DAC with transistor, DAC with audio amplifier AP4890B. (A) PWM

Integrated Circuits Inc. aPR33A3 Ver. E 14/27 JAN 06 2014 (B) DAC (C) DAC with transistor

Integrated Circuits Inc. aPR33A3 Ver. E 15/27 JAN 06 2014 (D) DAC with audio amplifier AP4890B

Integrated Circuits Inc. aPR33A3 Ver. E 16/27 JAN 06 2014 /square6 BUSY The MICG pin will be drove to low during the message record or playback, and drove to high during idle or standby, user can detect MICG status to know chip is busy or not. Please note it is limited for MICG pin driving current. Reference to IOH and IOL in section “ DC CHARACTERISTICS” . If MICG pin is over loading from external circuit, it will cause noise in microphone circuit.

Integrated Circuits Inc. aPR33A3 Ver. E 17/27 JAN 06 2014 Below is a typical application. We add one LED to indicate IC record and playback status. We use one Resistor to limit current. And suggest R> 470 Ω

Integrated Circuits Inc. aPR33A3 Ver. E 18/27 JAN 06 2014 Below Transistor circuit is to get higher current, larger than IOH or IOL .

Integrated Circuits Inc. aPR33A3 Ver. E 19/27 JAN 06 2014 To get best sound quality, we can use buffer or inverter to isolate MICG to avoid noise from external circuit. Driving current is provided by buffer(inverter) only.

Integrated Circuits Inc. aPR33A3 Ver. E 20/27 JAN 06 2014 /square6 RESET aPR33AX series can enter standby mode when RSTB pin drive to low. During chip in the standby mode, the current consumption is reduced to I SB and any operation will be stopped, user also can not execute any new operate in this mode. The standby mode will continue until RSTB pin goes to high, chip will be started to initial, and playback “beep” tone to indicate enter idle mode. User can get less current consumption by control RSTB pin specially in some application which concern standby current.

Integrated Circuits Inc. aPR33A3 Ver. E 21/27 JAN 06 2014 /square6 EXAMPLE The aPR33DB is one of the simplest solutions for achieve tape mode demo. The circuit board already includes the peripheral circuit which containing microphone. Developers only need to notice how to connect with their development environment. It can effectively decrease the time of circuit connecting & any possible mistakes. Below figure shows how to connect aPR33DB with external key in tape mode: ◎ Auto Rewind option & Beep is ON. ◎ Auto Rewind option & Beep is OFF. ◎ Non-Auto Rewind option & Beep is ON. ◎ Non-Auto Rewind option & Beep is OFF.

Figure 1. Block Diagram

Integrated Circuits Inc. aPR33A3 Ver. E 23/27 JAN 06 2014 /square6 DC CHARACTERISTICS Symbol Parameter Min. Typ. Max. Unit Conditions VDD Operating Voltage 3.0 6.5 V ISB Standby Current 1 µA IPDN Power-Down Current 15 20 µA IOP(IDLE) Operating Current (Idle) 20 mA VDD = 5V IOP(REC) Operating Current (Record) 35 mA VDD = 5V IOP(PLAY) Operating Current (Playback) 25 mA VDD = 5V VIH "H" Input Voltage 2.5 V VIL "L" Input Voltage 0.6 V IVOUT VOUT Current 185 mA IOH O/P High Current 8 mA VDD = 5V / VOH=4.5V IOL O/P Low Current 14 mA VDD = 5V / VOH=0.5V R NPIO Input pin pull-down resistance 300 K Ω External floating or drive low. 1 M Ω External drive high. R UPIO Input pin pull-up resistance 4.7 K Ω Fs/Fs△ Frequency stability 5 % VDD = 5V ± 1.0V Fc/Fc△ Chip to chip Frequency Variation 5 % Also apply to lot to lot variation.

Integrated Circuits Inc. aPR33A3 Ver. E 24/27 JAN 06 2014 /square6 AC CHARACTERISTICS Symbol Parameter Min. Typ. Max. Unit Conditions T1 /CS Setup Time 100 -- -- mS VDD=5.0V T2 Trigger Setup Time 16 -- -- mS VDD=5.0V T3 Trigger Hold Time 16 -- -- mS VDD=5.0V T4 /CS Hold Time 100 -- -- uS VDD=5.0V

Integrated Circuits Inc. aPR33A3 Ver. E 25/27 JAN 06 2014 /square6 PACKAGE INFORMATION 28Pin 300mil SOP Package

Integrated Circuits Inc. aPR33A3 Ver. E 26/27 JAN 06 2014 28Pin 600mil DIP Package

Integrated Circuits Inc. aPR33A3 Ver. E 27/27 JAN 06 2014 /square6 HISTORY Ver. E Delete aPR33A1 data. Ver. D Modify Page. 11 -12 line in circuit Ver. C Modify PAGE. 7 - 10 “connect” /barb2right add Add DIP Package and outline Delete data of aPR33A2 - Original version data sheet for aPR33Ax -C3.1.