APU1206 A-POWER | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 9
Technical content
APU1206/APU1207/APU1208/APU1209 200706062-1/9Data and specifications subject to change without notice. TYPICAL APPLICATION
DESCRIPTION
The APU1206 family of devices are ultra low dropout 1A regulators using PNP transistor as the pass element. These products are ideal when a single input supply is only available and the dropout voltage is less than 1V, exceeding the minimum dropout characteristics of NPN/ PNP hybrid regulators. One common application of these regulators is where input is 3.3V and a 2.5V output is needed. Besides the low dropout of less than 0.5V, other fea- tures of the family of the parts are: micro-power shut- down capability and output UVLO detection where Flag pin is switched low when output is below 5% of its nomi- nal point. 1A VERY LOW DROPOUT POSITIVE FIXED AND ADJUSTABLE REGULATORS Technology Licensed from International Rectifier Figure 1 - Typical application of the 1206-XX in a 3-Pin SOT-223 package. Low Dropout Voltage (500mV at 1A) 1% Voltage Reference Accuracy Low Ground Current 1µA Maximum Quiescent Current in Shutdown (APU1207, APU1208) Fast Transient Response Current Limit and Thermal Shutdown Error Flag Signal for Output out of Regulation (APU1207, APU1208) RoHS Compliant
FEATURES
2.5V Supply from 3.3V Input for the new generation of Logic ICs Computer Mother Board, Add-On Cards High Efficiency Post Regulator in Switch Mode Power Supply (SMPS)
APPLICATIONS
APU1206/APU1207/APU1208/APU1209 PACKAGE ORDER INFORMATION TJ (°C) 2-PIN 3-PIN 8-PIN PLASTIC VOLTAGE PIN FUNCTIONS TO-252(H) SOT-223(K) SOIC(M) 0 To 125 APU1206H-18 APU1206K-18 NA 1.8V VIN, VOUT, Gnd 0 To 125 APU1206H-25 APU1206K-25 NA 2.5V VIN, VOUT, Gnd 0 To 125 APU1206H-33 APU1206K-33 NA 3.3V VIN, VOUT, Gnd 0 To 125 NA NA APU1207M-18 1.8V V IN, VOUT, Gnd, Enable, Flag 0 To 125 NA NA APU1207M-25 2.5V V IN, VOUT, Gnd, Enable, Flag 0 To 125 NA NA APU1207M-33 3.3V V IN, VOUT, Gnd, Enable, Flag
0 To 125 NA NA APU1208M Adj V IN, VOUT, Gnd, Flag, Adj
0 To 125 NA NA APU1209M Adj V IN, VOUT, Gnd, Enable, Adj
APU1206/APU1207/APU1208/APU1209 ABSOLUTE MAXIMUM RATINGS
PACKAGE INFORMATION
θJA=55°C/W for 1" Sq pad 2-PIN PLASTIC TO-252 (D-Pak) 3-PIN PLASTIC SOT-223 (K) APU1206 APU1206 θJA=70°C/W for 0.5" Sq pad θJA=90°C/W for 0.4" Sq pad 8-PIN PLASTIC SOIC (M) APU1207 APU1208 APU1209 θJA=55°C/W for 1" Sq pad θJA=55°C/W for 1" Sq pad ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over CIN=COUT=10µF, VIN=Vo+1V, VOUT=VFB (For adjustable version only), and TA=25°C. Typical values refer to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. VIN VOUT Tab is Gnd FRONT VIEW VIN Gnd VOUT Tab is Gnd TOP VIEW GndFlag VOUT VIN Enable Gnd Gnd Gnd TOP VIEW GndAdj VOUT VIN Flag Gnd Gnd Gnd TOP VIEW GndAdj VOUT VIN Enable Gnd Gnd Gnd TOP VIEW Initial Voltage Accuracy (see Table 1 for nominal values) Line Regulation Load Regulation (Note 1) Output Voltage Temp Coef. Dropout Voltage (Note 2) Ground Current (Note 3) Current Limit Minimum Input Voltage APU1208, APU1209 Adjust Pin Current Minimum Load Current PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS Vo ∆ V I ∆VL ∆ VO(T) ∆VI(O) IQ ICL VIN(min) IADJ IO(min) Io=10mA, TA=25℃ (Note 4) Vo + 1V<VIN<10 10mA<Io<1A 1mA<Io<150mA Io=100mA (Note 4) Io=500mA (Note 4) Io=1000mA (Note 4) V IN=Vo + 1 for all conditions: Io=100mA (Note 4) Io=500mA (Note 4) Io=1000mA (Note 4) Vo=5% Below Regulation Point V IN=2.5V, Vo=VADJ (Note 4) -1.3 1.1 0.5 0.5 100 300 500 1.4 2.1 1.3 0.7 0.5 100 200 400 650 2.3 0.1 ppm/℃ mV mA A V µ A mA
APU1206/APU1207/APU1208/APU1209 PIN DESCRIPTIONS The input pin of the regulator. Typically a large storage capacitor is connected from this pin to ground to insure that the input voltage does not sag below the minimum drop out voltage during the load transient response. This pin must always be 0.6V higher than V OUT in order for the device to regulate properly. The output of the regulator. A minimum of 2.2µF capacitor must be connected from this pin to ground. Ground pin. This pin must be connected to the lowest potential in the system and all other pins must be at higher potential with respect to this pin. Enable pin. A low signal or left open on this pin shuts down the output. This pin must be tied HI or to V IN for normal operation. An open collector output that switches low when the output voltage drops about 4% below its expected regulated voltage. A resistor divider from this pin to the V OUT pin and ground sets the output voltage.
APPLICATION INFORMATION
The APU120X series of regulators require the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. A minimum of 2.2µF capacitance and the ESR in the range of 0.5 to 2Ω in- sures the stability of the system. Part Number Output Voltage APU1206-18 1.8V APU1206-25 2.5V APU1206-33 3.3V APU1207-18 1.8V APU1207-25 2.5V APU1207-33 3.3V APU1208 1.24V APU1209 1.24V Note 1: Low duty cycle pulse testing with Kelvin con- nections is required in order to maintain accurate data. Note 2: Dropout voltage is defined as the minimum dif- ferential voltage between VIN and VOUT required to main- tain regulation at VOUT. It is measured when the output voltage drops 1% below its nominal value. APU1207, APU1209 Ground Current - SD Activated Enable Pin Input LO Voltage Enable Pin Input HI Voltage Enable Pin Input LO Current Enable Pin Input HI Current APU1207, APU1208 Flag Output Threshold Voltage Flag Output Hysteresis Voltage Flag Output Saturation Voltage Note 3: Ground current is the regulator quiescent cur- rent plus the pass transistor current. The total current from the supply is the sum of the load current plus the ground pin current. Note 4: The specification applies for the junction tem- perature of 0 to +125℃. V IN (All devices) VOUT (All devices) Gnd (All devices) Enable (APU1207, APU1209) Flag (APU1207, APU1208) Adj (APU1208, APU1209) Table 1 - Output voltage vs. part number. PIN SYMBOL PIN DESCRIPTION IQ(SD) VEN(L) VEN(L) VTH(FG) VHYS VF(SAT) Enable=Open Regulator OFF (Note 4) Regulator ON (Note 4) V EN(L)=0V to 0.8V (Note 4) VEN(L)=2V to Vin (Note 4) Output Ramping Up Io=5mA Io=500µA PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS 0.01 0.1 100 0.8 400 230 0.8 600 µ A V V µ A µ A O %VO mV
APU1206/APU1207/APU1208/APU1209 TYPICAL APPLICATION Figure 4 - Typical application of APU1208 in 3.3V to 2.5V regulator. Ref Desig Description Qty Part # Manuf C1 Capacitor 1 10 µF, Tantalum A VX C2 Capacitor 1 10 µF, Tantalum A VX R1 Resistor 1 127Ω, 1% R2 Resistor 1 124Ω, 1% R3 Resistor 1 10KΩ, 5% VIN VOUT APU1208 Error Flag Flag VIN Gnd VOUT Adj Gnd Gnd Gnd Vo = 1.24 X 1 +R1 R2( )
APU1206/APU1207/APU1208/APU1209 TYPICAL APPLICATION Figure 5 - Typical application of APU1209 in 3.3V to 2.5V regulator. Ref Desig Description Qty Part # Manuf C1 Capacitor 1 10 µF, Tantalum AVX C2 Capacitor 1 10 µF, Tantalum AVX R1 Resistor 1 127Ω, 1% R2 Resistor 1 124Ω, 1% VIN VOUT APU1209 SD Enable Enable VIN Gnd VOUT Adj Gnd Gnd Gnd Vo = 1.24 X 1 + R1 R2( )
APU1206/APU1207/APU1208/APU1209 APU1209 Line Regulation @ 5mA to 100mA 1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24 1.245 1.25 Input Voltage Vout 0.00% 0.50% 1.00% 1.50% 2.00% 2.50% 3.00% 3.50% 4.00% 4.50% 5.00% % Error Vout Percent Error CHARACTERISTICS
5 Sep 2001
15:15:05 APU1209 Maximum Output Current ~ 1.25A while in the current limit mode. APU1209 Output Voltage in Yellow. A DC offset equal to the output voltage is applied to improve resolution. The output is regulating current in this mode. Figure 6 Figure 7