APU1150

APU1150 A-POWER | Alldatasheet

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Technical content

1Data and specifications subject to change without notice. 4A ULTRA LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR The APU1150 is a 4A regulator with extremely low drop- out voltage using a proprietary bipolar process that achieves comparable equivalent on-resistance to that of discrete MOSFETs. This product is specifically designed to provide well regulated supply for applications requir- ing 2.8V or lower voltages from 3.3V ATX power supplies where high efficiency of a switcher can be achieved with- out the cost and complexity associated with switching regulators. One such application is the new graphic chip sets that require anywhere from 2.4V to 2.7V supply such as the Intel I740 chip set.

DESCRIPTION

0.7V Dropout at 4A Fast Transient Response 1% Voltage Reference Initial Accuracy Built-In Thermal Shutdown

APPLICATIONS

FEATURES

3.3V to 2.7V Intel I740 Chip Set TYPICAL APPLICATION Technology Licensed from International Rectifier Figure 1 - Typical application of APU1150 in a 3.3V to 2.7V for I740 chip. 3.3V APU1150 2.7V 100uF 100uF 100uF 102 118 VSENSE Adj VOUT VCTRL VIN PACKAGE/ORDER INFORMATION TJ (°C) 5-PIN PLASTIC 8-PIN PLASTIC TO-263 (S) SOIC (M)

0 To 125 APU1150S-HF APU1150M-HF

Electronics Corp. RoHS Compliant & Halogen Free 200908201

PACKAGE INFORMATION

5-PIN PLASTIC TO-263 (S) 8-PIN PLASTIC SOIC (M) θJA=35°C/W for 0.5" square pad θJA=55°C/W for 1" Sq pad area ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over CIN=1µF, COUT=10µF, and TJ=0 to 125C. Typical values refer to TJ=25C. VOUT=VSENSE. PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS VSENSE Adj VIN VCTRL VOUT TOP VIEW VOUT VOUT VOUT VSENSE Adj VOUT VCTRL VIN FRONT VIEW Tab is VOUT Reference Voltage Line Regulation Load Regulation (Note 1) Dropout Voltage (Note 2) CTRL - VOUT) Dropout Voltage (Note 2) IN - VOUT) Current Limit Minimum Load Current (Note 3) Thermal Regulation Ripple Rejection Control Pin Current Adjust Pin Current VCTRL=2.7 to 12V, VIN=2.05V to 5.5V, Io=10mA to 4A, VADJ=0V VCTRL=2.5V to 7V, VIN=1.75V to 5.5V, Io=10mA, VADJ=0V VCTRL=2.75V, VIN=2.1V, Io=10mA to 4A, VADJ=0V VADJ=0V for all conditions below: VIN=2.05V, Io=1.5A VIN=2.05V, Io=3A VIN=2.05V, Io=4A VADJ=0V for all conditions below: VCTRL=2.75V, Io=1.5A VCTRL=2.75V, Io=3A VCTRL=2.75V, Io=4A VCTRL=2.75V, VIN=2.05V, ∆Vo=100mV, VADJ=0V VCTRL=5V, VIN=3.3V, VADJ=0V 30ms Pulse VCTRL=5V, VIN=5V, Io=4A, VADJ=0V, TJ=25C, VRIPPLE=1VPP at 120Hz VADJ=0V for all below conditions: VCTRL=2.75V, VIN=2.05V, Io=1.5A VCTRL=2.75V, VIN=2.05V, Io=3A VCTRL=2.75V, VIN=2.05V, Io=4A VCTRL=2.75V, VIN=2.05V, VADJ=0V 1.225 4.2 1.250 -0.2 1.00 1.05 1.13 0.26 0.50 0.70 4.65 0.01 1.275 1.15 1.15 1.20 0.38 0.60 1.15 V mV mV V V A mA %/W dB mA µA V REF IADJ Advanced Power Electronics Corp.

This pin is the positive side of the reference which allows remote load sensing to achieve excellent load regulation. A resistor divider from this pin to the VOUT pin and ground sets the output voltage. The output of the regulator. A minimum of 10µF capacitor must be connected from this pin to ground to insure stability. This pin is the supply pin for the internal control circuitry as well as the base drive for the pass transistor. This pin must always be higher than the V OUT pin in order for the device to regulate. (See specifications) The input pin of the regulator. Typically a large storage capacitor is connected from this pin to ground to insure that the input voltage does not sag below the minimum drop out voltage during the load transient response. This pin must always be higher than V OUT in order for the device to regulate. (See specifications) Note 1: Low duty cycle pulse testing with Kelvin con- nections is required in order to maintain accurate data. Note 2: Dropout voltage is defined as the minimum dif- ferential between VIN and VOUT required to maintain regu- lation at VOUT. It is measured when the output voltage drops 1% below its nominal value. Note 3: Minimum load current is defined as the mini- mum current required at the output in order for the out- put voltage to maintain regulation. Typically the resistor dividers are selected such that it automatically main- tains this current. PIN # PIN SYMBOL PIN DESCRIPTION PIN DESCRIPTIONS VSENSE Adj VOUT VCTRL VIN BLOCK DIAGRAM Figure 2 - Simplified block diagram of the APU1150. VCTRL VIN VSENSE Adj VOUT THERMAL SHUTDOWN CURRENT LIMIT 1.25V + Advanced Power Electronics Corp.

VOUT = 2.7V VIN = 3.3V VCTRL = 5V IOUT = 2A (DC Avg) Assuming, the following conditions: Calculate the maximum power dissipation using the fol- lowing equation: Using table below select the proper package and the amount of copper board needed. Pkg Copper θJA(°C/W) Max Pd Max Pd Area ( TA=25°C) (TA=45°C) TO-263 1.4"X1.4" 25 4.4W 3.6W TO-263 1.0"X1.0" 30 3.7W 3.0W TO-263 0.7"X0.7" 35 3.1W 2.6W TO-263 Pad Size 45 2.4W 2.0W SO-8 1.0"X1.0" 55 2.0W 1.63W Note: Above table is based on the maximum junction temperature of 135C. As shown in the above table, any of the two packages will do the job. For low cost applications the SOIC 8-pin package is recommended. P PD = IOUT×(VIN - VOUT)+ ×(VCTRL - VOUT) 60( ) IOUT 60( ) Stability The APU1150 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for the microprocessor applications use standard electrolytic capacitors with typical ESR in the range of 50 to 100mΩ and an output capacitance of 500 to 1000 µF. Fortunately as the ca- pacitance increases, the ESR decreases resulting in a fixed RC time constant. The APU1150 takes advantage of this phenomena in making the overall regulator loop stable. For most applications a minimum of 100µF aluminum electrolytic capacitor such as Sanyo, MVGX series, Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. Thermal Design The APU1150 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the allowable maximum junction temperature. Although this device can operate with junction tempera- tures in the range of 150C, it is recommended that the selected heat sink be chosen such that during maxi- mum continuous load operation the junction tempera- ture is kept below this number. The example below shows the steps in selecting the proper surface mount package. Advanced Power Electronics Corp.

Package Outline : SO-8 MIN NOM MAX 1.35 1.55 1.75 0.10 0.18 0.25 0.33 0.41 0.51 0.19 0.22 0.25 4.80 4.90 5.00 5.80 6.15 6.50 3.80 3.90 4.00 0.38 － 0.90 0.00 4.00 8.00 1.All Dimension Are In Millimeters. 2.Dimension Does Not Include Mold Protrusions. Part Marking Information & Packing : SO-8 Laser Marking Draw No. M1-M-8-G-v01

1.27 TYP

0.254 TYP

ADVANCED POWER ELECTRONICS CORP. SYMBOLS Millimeters A B c G L α D E e e B 5678 D A G Part Number U1150M YWWSSS Package Code Date Code (YWWSSS) Y：Last Digit Of The Year WW：Week SSS：Sequence E

Package Outline : TO-263-5L Millimeters MIN NOM MAX A 4.40 4.60 4.80 b 0.66 0.79 0.91 L4 0.00 0.15 0.30 c 0.36 0.43 0.50 L1 2.29 2.54 2.79 E 9.80 10.10 10.40 c2 1.25 1.35 1.45 D 8.60 8.80 9.00 e L 14.60 15.20 15.80 0° 4° 8° 1.All Dimensions Are in Millimeters. 2.Dimension Does Not Include Mold Protrusions. Part Marking Information & Packing : TO-263-5L θ 7.60 1.27 5.90 1.70 SYMBOLS ADVANCED POWER ELECTRONICS CORP. U1150S Package Code Part Number YWWSSS LOGO Date Code (YWWSSS) Y：Last Digit Of The Year WW：Week SSS：Sequence