APS8922A

APS8922A A-POWER | Alldatasheet

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A E U FEATUR ▓ Integrate ▓ Input Volt ▓ Ultra-low Channel ▓ 6A Maxim ▓ Low Thre ▓ Adjustabl ▓ Quick Ou ▓ RoHS Co APPLIC ▓ Telecom ▓ Industrial ▓ Set-Top-B ▓ Consume ▓ Notebook TYPICA ecifications su Advanc Electron ULTRA- RES d Dual Chan tage Range: ON-Resista mum Continu eshold Contro le Rise Time utput Dischar ompliant and ATIONS Systems l Systems Box er Electronics ks / Netbook AL APPLI C C VIN1 VIN2 ubject to chang ced Pow nics Co - LOW O nnel Load Sw 0.8V to 5.5V ance, RON = 2 uous Current ol Input e rge Transisto Halogen Fre s s CATION CIN1 uF CIN2 uF ge without not wer orp. ON RES witch V 20mΩ per t per Channe or ee Product O V V O tice SISTANC WI el DES The A switch N-cha voltag contin is c o capab contro Addit resist turned time i on the The A savin pad. ON1 VIN1 APS89 VIN2 ON2 CT1 CT VBIAS +5V CT1 CE, 6-A TH CON SCRIPTIO APS8922A is h with con t annel MOSF ge range of 0 nuous curren ontrolled by ble of inte r ol signals. ional featur e tor for outp u d off, in ord e is adjustable e CTx pin. APS8922A is g 3mmx2mm GND VOUT2 22A VOUT1 S CT2 DUAL L NTROLL ON s a small, u trolled turn ETs that can 0.8V to 5.5V nt up to 6A e an on/off rfacing dire es include ut quick dis c er to avoid i e by an ext e s available in m 14-pin DFN C C APS LOAD S LED TU ultra-low R ON on. It co n n operate ove and support each. Each lo input (ON), ectly with l o a 250 Ω on charge whe n nrush curren ernal ceramic n an ultra-sm N package w OUT1 1uF OUT2 1uF VOUT2 VOUT1 20160315V3 S8922A SWITCH URN-ON dual load ntains two er an input t maximum oad switch which is ow-voltage -chip load n switch is nt, the rise c capacitor mall, space with thermal

A E ORDER APS8922 ABSOLU VIN1, VIN2 VOUT1, VO VON1, VON VBIAS IMAX Storage Te Junction Te Lead Temp Thermal Re ESD Electro Human Bod Machine Mo Charged De RECOM V I N 1 , 2 VBIAS VON1,2 VOUT1,2 CIN1,2 Junction Te Operating T Power Diss Advanc Electron ING / PA Packa GN3B AX UTE MAX OU T 2 mperature R emperature ( perature (Sol esistance fro ostatic Disch dy Model, MIL odel, JESD 22 evice Model, MMENDED emperature ( Temperature sipation (PD) ced Pow nics Co ACKAGE ge Type : DFN 3x2-14 XIMUM R Range (TST) TJ) dering, 10se m Junction t DFN-14L ( 3 harge Capab L-STD-883G Me , JESD 22 D OPERA TJ) e Range @TA=25oC wer orp. INFORM RATINGS ec . ) to Ambient (R 3mmX2mm) bility ethod 3015.7 ATING C MATION V S (at TA=25°C V RθJA) CONDITIO V T DF E VIN1 VIN1 ON1 VBIAS 5ON2 6VIN2 7VIN2 0.3V to 6V VIN+0.3V 0.3V to 6V 0.3+6V 65 to +150°C 50°C 260°C 65°C/W 2KV 200V KV ONS 0.8V to 5.5V 2.5V to 5.5V 0V to 5.5V VIN1,2 ≧0.1uF 25°C 40°C to 85°C .53W Top View N 3x2-14L Exposed Pad 11 GND C (VBIAS ≧ V C APS GND CT 1 VOUT1 VOUT1 CT 2 VOUT2 VOUT2 VIN) S8922A

A E ELECTR (VIN1, 2=0. PA Quiescent C Shutdown C ON Resista Output Pull ONx Input L ONx Logic H ONx Logic L Advanc Electron RICAL SP 8 to 5.5V, VB ARAMETER Current Current nce (each sw Down Resis Leakage Cur High Low ced Pow nics Co PECIFICA BIAS=5V, TA SY IB IS witch) R stance R O rrent I O V V wer orp. ATIONS =25°C, unle YM IAS VIN1=V IOUT1= SD VON1= VOUT1 RON VINx=5 IOUTx= VINx=3 IOUTx VINx=1 IOUTx VINx=1 IOUTx VINx=1 IOUTx VINx=0 IOUTx OPD VBIAS = ON VONx= 5 VIH VBIAS = VIL VBIAS = ess otherwise TEST CON VIN2=VON1= =IOUT2=0A VON2=GND =VOUT2=0 V, VBIAS=5V =-200mA, TA= .3V, VBIAS= =-200mA, TA= .8V, VBIAS= =-200mA, TA= .5V, VBIAS= =-200mA, TA= .2V, VBIAS= =-200mA, TA= .8V, VBIAS= =-200mA, TA= =5V, VONx=0 5V or GND = 2.5V to 5.5V = 2.5V to 5.5V e specified) NDITION =VON2=5V =25oC =5V, =25oC =5V, =25oC =5V, =25oC =5V, =25oC =5V, =25oC V V MIN APS TYP M A 130 1 20 2 20 2 20 2 20 2 20 2 20 2 250 3 S8922A AX UNIT 70 uA 1 uA 25 m Ω 25 m Ω 25 m Ω 25 m Ω 25 m Ω 25 m Ω 50 Ω 1 uA V 0.4 V

A E SWITCH PA VIN=VON=VB Turn on Tim Turn off Tim VOUT Rise T VOUT Fall Tim ON Delay T VIN=0.8V, V Turn on Tim Turn off Tim VOUT Rise T VOUT Fall Tim ON Delay T VIN=VBIAS=3 Turn on Tim Turn off Tim VOUT Rise T VOUT Fall Tim ON Delay T VIN=0.8V, V Turn on Tim Turn off Tim VOUT Rise T VOUT Fall Tim ON Delay T Advanc Electron HING CHA ARAMETER BIAS=5V, TA=2 me me Time me Time VON=VBIAS=5V me me Time me Time 3.3V, VON =5V me me Time me Time VBIAS=3.3V, VO me me Time me Time ced Pow nics Co ARACTE SY 25oC (unless tO tO t t t V, TA=25oC (u tO tO t t t V, TA=25oC ( tO tO t t t ON =5V, TA=2 tO tO t t t wer orp. ERISTICS YM otherwise n ON RL=10Ω OFF RL=10Ω tR RL=10Ω tF RL=10Ω tD RL=10Ω unless otherw ON RL=10Ω OFF RL=10Ω tR RL=10Ω tF RL=10Ω tD RL=10Ω unless other ON RL=10Ω OFF RL=10Ω tR RL=10Ω tF RL=10Ω tD RL=10Ω 25oC (unless ON RL=10Ω OFF RL=10Ω tR RL=10Ω tF RL=10Ω tD RL=10Ω S TEST CON oted) Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, wise noted) Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, rwise noted) Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, otherwise n Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, Ω, CL=0.1uF, NDITION CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF oted) CT=1000pF CT=1000pF CT=1000pF CT=1000pF CT=1000pF MIN APS TYP M A 1400 1700 1.7 300 500 320 1.5 250 1200 1.3 1330 1.8 300 600 1.4 360 1.6 330 S8922A AX UNIT us us us us us us us us us us us us us us us us us us us us

A E PIN DES PIN No. 1, 2 6,7 8,9 13,14 BLOCK ON1 GND VBIAS ON2 Advanc Electron SCRIPTIO PIN S V O VB O V VO C G C VO DIAGRA ced Pow nics Co ONS YMBOL VIN1 C ON1 C BIAS 5 ON2 C VIN2 C OUT2 C CT2 A GND G CT1 A OUT1 C AM Oscillator Charge Pump wer orp. Channel 1 in Channel 1 en 5V bias volta Channel 2 en Channel 2 in Channel 2 ou A capacitor t Ground. A capacitor t Channel 1 ou CT nput, bypass nable contro age. nable contro nput, bypass utput. to ground set to ground set utput. T1 CT2 Control Logic PIN DESC this input wi ol input, active ol input, active this input wi t the rise tim t the rise tim Output1 D Output2 D CRIPTION th a ceramic e high. Do no e high. Do no th a ceramic e of VOUT2 e of VOUT1 Discharge Discharge APS c capacitor to ot leave float ot leave float c capacitor to S8922A o ground. ting. ting. o ground. VIN1 VOUT 1 VIN2 VOUT 2

A E TYPICA VBIAS=5V, ch1:ONx, ch Fig.1 Fig.3 Fig.5 Advanc Electron AL PERFO VIN1=VIN2, h2:VOUT1, c

1 Turn-on R

3 Turn-on R

5 Turn-on R

, ON1=ON2, ch3: VOUT2 Response, V Response, V Response, V wer orp. CE CHAR IOUTX=0A, C VINx=0.8V VINx=1.8V VINx=3.3V RACTER CTx=1nF, CINX ISTICS X=1µF, COUT Fig.2 T u Fig.4 T Fig.6 T X=0.1µF, urn-on Respo Turn-on Resp Turn-on Resp APS onse, VINx= ponse, VINx= ponse, VINx= S8922A 1.05V =2.5V =5.0V

A E TYPICA VBIAS=5V, ch1:ONx, ch Fig. Fig.9 Fig.1 Advanc Electron AL PERFO VIN1=VIN2, h2:VOUT1, c

7 Turn-off R

9 Turn-off R

11 Turn-off

, ON1=ON2, ch3: VOUT2 Response, V Response, V Response, V wer orp. CE CHAR IOUTX=0A, C VIN=0.8V VIN=1.8V VIN=3.3V RACTER CTx=1nF, CINX ISTICS (C X=1µF, COUT Fig.8 T Fig.10 Fig.12 Continued X=0.1µF, Turn-off Resp Turn-off Res Turn-off Res APS ponse, VIN=1 sponse, VIN= sponse, VIN= S8922A 1.05V =2.5V =5.0V

A E TYPICA 200 400 600 800 0.8 Turn-on Delay Time (us) 0.8 1 Turn-off Time (us) -40 -2 RON (mΩ) Advanc Electron AL PERFO Fig.13 Fig.15 Fig.17 R ON 1.4 2 1.4 2 002 0 Tem ced Pow nics Co ORMANC tD-ON vs. VIN tOFF vs. VIN N vs. Tempera 2.6 3.2 VIN (V) VBIAS=5V, Co 2.6 3.2 VIN (V) VBIAS=5V, Co 40 60 mperature (℃) VBIA VBIA wer orp. CE CHAR N N ature 3.8 4.4 CT=0.22n CT=0.47n CT=1nF out=0.1uF, Io=0A 3.8 4.4 CT=10n CT=1nF CT=0nF out=0.1uF, Io=0A 80 100 AS=VIN =VON =5V AS=VIN =VON =3.3V RACTER F F A VOUT Rise Time (us) nF F F A VOUT Fall Time (us) 120 VON (V) ISTICS (C Fig.18 O 400 800 1200 1600 2000 0.8 1.4 0.8 1.4 0.2 0.4 0.6 0.8 -40 -20 Continued Fig.14 t R Fig.16 t F ON Threshol 22 . 6 VI VB 22 . 6 VIN VB 02 0 4 Temper APS vs. VIN vs. VIN d vs. Tempe 3.2 3.8 IN (V) CT=0 CT=0 CT=1 BIAS=5V, Cout=0 3.2 3.8 N (V) IAS=5V, Cout=0 406 08 0 rature (℃) S8922A rature 4.4 5 0.22nF 0.47nF nF 0.1uF, Io=0A 4.4 5 CT=10nF CT=1nF CT=0nF 0.1uF, Io=0A 100 120 VON -H VON -L

A E TYPICA Fig.19 Qu 120 160 -40 - IBIAS (uA) Advanc Electron AL PERFO iescent Curr -20 0 20 Te ced Pow nics Co ORMANC rent (VBIAS) 40 60 emperature (℃) VB VB wer orp. CE CHAR vs. Tempera 80 100 BIAS=VIN =VON =5V BIAS=VIN =VON =3.3 RACTER ature Fi g 120 IIN (uA) ISTICS (C g.20 Quie s -40 -20 Continued scent Current 02 0 4 Tempera APS t (VIN) vs. Te 406 08 0 ature (℃) VBIAS=VI VBIAS=VI S8922A emperature 100 120 IN=V ON=5V IN=V ON=3.3V

A E APPLIC On/Off Con The load s w capable of 3.3V GPIO The Figure t D: VOUT Tu ton: VOUT T tR: VOUT R tOFF: VOUT tF: VOUT Fa Output Ris The rise tim below Table CT (nF) V 0.22 0.47 2.2 4.7 Advanc Electron ATION IN ntrol witch is con t interfacing w logic thresho 21 show the urn On Delay Turn On Tim ise Time Turn Off Tim all Time e Time Con me of each V e 1 are typica VIN=0.8V V 128 262 561 1257 2562 ced Pow nics Co NFORMA trolled by th e with low volta old. Do not le e VOUTx turn y Time e me trol VOUTx is adj al measured R VIN=1.05V 173 344 734 1607 3372 wer orp. ATION e ON pin. T h age signals. eave the ONx n-on/off wave Fig.21 ustable by a value. Pleas Rise Time, tR VIN=1.2V 114 193 398 831 1773 3692 he ONx pin i The ONx pin x pin float. eform. ON/OFF W an external c se refer it for (µs),10%~90 VIN=1.5V 140 240 492 1084 2252 4672 <Table 1> is active hig h n can be us e Waveform apacitor on t determined 0%, COUT=0. VIN=1.8V 165 285 584 1246 2719 5669 h and has a ed with stan the CTx pin. rise time. 1µF,CIN=1uF VIN=2.5V 225 390 811 1757 3828 8045 APS a low thresh o dard 1.2V, 1 The rise tim F VIN=3.3V 300 515 1104 2403 5217 10971 S8922A old making i t .8V, 2.5V or me shows on VIN=5V 445 776 1657 3631 7912 16612 t r n

A E APPLIC Input Capa An input cap supply durin Output Cap Setting a C switch, this removed. Layout Con The Figure 1. The cu r 2. Keep t h 3. The in p inducta 4. Place t h away fro Advanc Electron ATION IN acitor pacitor is rec ng high curre pacitor CIN greater t h prevents the nsiderations 22 shows th rrent loop of he high curre put and outpu nces. he thermal v om the devic ced Pow nics Co NFORMA commended ent applicatio han the C OUT e current flow s e reference two load swi ent paths (VIN ut capacitors ias under the ce. F wer orp. ATION (C to be placed on. T is highly r e ws through th layout for AP itch should b N, VOUT and s should be c e exposed pa Fig.22 AP S ontinued) d between VI ecommended he body diode PS8922A. Be be separated d GND; blue close to the d ad of the dev S8922A Refe Nx and GND d. Since the e from VOUT elow lists hel and symme circle) wide device as po vice (green c erence Layou D to limit the v internal bod Tx to VINx w p start layou etrized to eac and short to ossible to min circle). This h ut APS voltage drop dy diode is i n hen the syste ch other. o obtain the b nimize the pa help for therm S8922A on the input n the NMO S em supply is best effect. arasitic trace mal diffusion t S s e n

A E MARKIN DFN 3x2-14 S89 YWW Advanc Electron NG INFO 922A WSSS ced Pow nics Co RMATIO wer orp. N Part Numb Date Code Y : Year WW : Wee k SSS : Sequ ber (YWWSSS) k uence APS S8922A