APEXX04 APLUS | Alldatasheet

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Technical content

APLUS MAKE YOUR PRODUCTION A-PLUS APExx04 Series DATA SHEET APLUS INTEGRATED CIRCUITS INC. Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115)台北市南港區成功路㆒段32 號 3 樓之 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw Sales E-mail: sales@aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw

Rev 1.3 2003/8/18 1

1.0 General Description

The APExx04 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody synthesizer, and PWM (Direct drive) output, etc. The audio synthesizer contains one voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices. With CMOS technology and halt function can minimize power dissipation. Their architectures are similar to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single cycle, except for program branches and data table read instructions (which need two instruction cycles).

2.0 Features

(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz. (2) Program ROM: 8k x 10 bits (3) 1 set of 15-bits DPR can access up to 32k x 10 bits melody data memory space, and 1 set of 15-bits VPR can access up to 32k x 10 bits voice data memory space. Product Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit) APE0504 5 14-bits 16k APE1004 10 15-bits 32k (4) Data Registers: a). 96 x 4-bits data RAM (00-5Fh) b). Unbanked special function registers (SFR) range: 00h-2Fh (5) I/O Ports: a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control) (6) On-chip clock generator: Resistive Clock Drive (RM) (7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter). (8) Stack: 2-level subroutine nesting. (9) Built-in 4 Level Volume Control can be programmed. (10) Built-in IR Carry Output: Port A[1] can be configured as IR pin by 38k / 56kHz. (Mask option) (11) External Reset: Port A[3] can be configured as reset pin. (Mask opton) (12) HALT and Release from HALT function to reduce power consumption (13) Watch Dog Timer ( WDT) (14) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles (15) Number of instruction: 27 (16) DAC: 1 channel voice and dual tone melody synthesizer (One 8-bits PWM output).

Rev 1.3 2003/8/18 2 FIGURE 1 : ROM Map of APExx04 Series 13-bit x 2 STACK Reset Vector 00000h-01FFFh 15-bit Data Pointer 15-bit Voice Pointer PC[12:0] Reserved for Testing 000FFh-00400h 00401h 00000h 000FEh Program ROM 00000h-07FFFh Data ROM for Voice & Melody

Rev 1.3 2003/8/18 3

3.0 Pin Description

Pad Name Pin Attr. Description PWM2 O PWM2 output. PWM1 O PWM1 output. Vdd1~2 Power Power supply during operation. PRA0, PRA2 I/O I/O port can be programmed to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. PRA1 / IR I/O I/O port can be programmed to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. Mask option selected as an IR Carrier Output with 38k / 56kHz PRA3 / Reset I/O I/O port can be programmed to input/output individually. Input type with weak pull-low or fix-input-floating capability. Buffer Output type. Mask option selected as an external RESET pin with weak pull-low capability. OSC I RM mode Oscillator input GND1~2 Power Ground Potential

4.0 DC Characteristics

Symbol Parameter Vdd Min. Typ. Max. Unit Condition Vdd Operating voltage 2.4 3 5.5 V depending on Freq. 3 1 Isb Standby 4.5 1 uA 4MHz, RM, in HALT Mode 3 2 Iop Supply current Operating 4.5 7 mA 4MHz, RM, IO Floating 3 4 Iih Input current (Internal pull low) 4.5 10 uA Input ports with weak pull-low 3 -4 Ioh Output-high current 4.5 -10 3 8.5 Iol Output-low current 4.5 17.5 mA 4MHz, RM (IO ports) 3 0.8 ~ 4.8 Cout DAC output current (8-level option) 4.5 0.9 ~ 6.5 mA 4MHz, RM (Full scale) dF/F Frequency stability -5 5 % Fosc(3v- 2.4v) Fosc (3v) dF/F Fosc lot variation -10 10 % Vdd=3V, Rosc=430k, 4MHz

Rev 1.3 2003/8/18 4 FIGURE 2 : Frequency vs. Rosc (at 3V) Resistor (Rosc ohms) 110k 200k 300k 430k Frequency (MHz) 14.84 8.25 5.54 3.92

5.0 Application Circuit

Rosc vs Freq. 5.54 3.92 8.25 14.84 0 100 200 300 400 500 Rosc (k ohm) Freq. (MHz) xxxx

Rev 1.3 2003/8/18 5

6.0 Bonding Diagram

Pad # Pad Name X Y Pad # Pad Name X Y

1 PWM2 57 253 7 PRA0 785 87

2 Vdd1 58 58 8 PRA1 895 87

3 PWM1 253 57 9 PRA2 1005 87

4 GND1 404 58 10 GND2 995 231

5 Vdd2 565 87 11 PRA3 995 341

6 OSC 675 87

Chip Size : APE0504 : 1166 um x 1094 um APE1004 : 1166 um x 1206 um ROM PRA3 2 3 4 5 6 7 8 9 GND2 PRA2 PRA1 PRA0 OSC Vdd2 GND1 PWM1 PWM2/Cout Vdd1 (0, 0) Pad Size: 80 um x 80 um * The IC substrate must be connected to GND.