AMTP32M APLUS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 30
Technical content
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 1/30 12/16/2014 aMTPxxM Datasheet Multi-time program voice IC A PLUS INTEGRATED CIRCUITS INC. Address: TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http://www.aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw Sales E-mail: sales@aplusinc.com.tw
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 2/30 12/16/2014 /square6 FEATURES /circle6 Standard CMOS process. /circle6 8-bit PCM voice quality. /circle6 Support 6KHz to 20KHz sampling. /circle6 Support multi-sampling voice in one chip. /circle6 660 sec voice length at 6KHz sampling or 200 sec voice length at 20KHz sampling. /circle6 Up to 100,000 time for ROM program/erase cycles. /circle6 Combination of voice building blocks to extend playback duration. /circle6 Table entries are available for voice slice combinations. /circle6 Five standard triggering modes are available (controlled by software): /rhombus6 Key Trigger /rhombus6 Sequential /rhombus6 CPU Parallel /rhombus6 CPU Serial /rhombus6 MP3 /circle6 Voice section trigger options: Edge / Level; Hold / Un-hold; Retrigger / Non-retrigger. /circle6 Built-in oscillator with fixed Rosc, software control sampling frequency /circle6 2.7V ~ 3.6V single power supply and < 15uA stand-by current. /circle6 PWM Vout1 and Vout2 drive speaker directly. /circle6 D/A COUT with ramp-up ramp-down option to drive speaker through external BJT or amplifier. /circle6 RSTB provides external controlled reset to the chip. /square6 DESCRIPTION Aplus’ aMTPxxM series is multi-time program voice IC. It is fabricated with Standard CMOS process with voice storage flash memory. Offer five trigger modes: Key trigger mode, sequential mode, CPU parallel mode, CPU serial mode and MP3 mode, facilitate different user interface. User selectable triggering and output signal options provide maximum flexibility to various applications. External resistor ROSC control oscillator, 8-bit resolution current mode D/A output and PWM direct speaker driving minimize the number of external components.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 3/30 12/16/2014 /square6 PIN CONFIGURATION /square6 PIN CONFIGURATION Pin Names Description VOUT1 PWM output to drive speaker directly VOUT2 PWM output to drive speaker directly D/A current output VSS VSSA VSSB Ground OSC Oscillator input VDD VDDA VDDB Supply voltage VPP Supply voltage for firmware programming /HOLD Data memory hold /WP Data memory write protect CE-A, CE-B Data memory enable SCK-A, SCK-B Data memory serial data clock SO-A, SO-B Data memory serial data output SI-A, SI-B Data memory serial data input PB0~PB3 I/O Port-B PD0~PD2 I/O Port-D RSTB Low active reset pin Pins for data memory programming are: VDDB, VSSB, WP, HOLD, CE-B, SCK-B, SI-B, SO-B and RSTB.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 4/30 12/16/2014 /square6 TRIGGER MODES There are five trigger modes available for aMTP32M series: /circle6 Key Trigger /circle6 Sequential /circle6 CPU Parallel /circle6 CPU Serial /circle6 MP3 Below lists the how many I/Os will be use and simple description for every modes: Input Pin Maximum Section Busy Output Random Section Trigger Section Option Support Mode Key Trigger 6 31 Yes Yes Yes Sequential 1 256 Yes No Yes CPU Parallel Trigger 6 32 Yes Yes Yes CPU Serial Command 2 256 Yes Yes No MP3 5 256 Yes No No
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 5/30 12/16/2014 /circle6 Key Trigger Mode Support simple random voice trigger. Can play up to 31 voice section by key combination. It also provides a BUSY output, the BUSY pin will output VIH when voice playing . When Section Option pin is VIL , up to 31 V oice Sections can be triggered by 6 TG pins showing at Table 1 . Section Option pin default is VIL. /rhombus6 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description TG TG TG TG Pin Name PD0 PD1 PD2 Description BUSY TG TG
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 6/30 12/16/2014 /rhombus6 Example /rhombus6 Trigger Table TG Pin Voice Section PB0 PB1 PB2 PB3 PD1 PD2
0 HIGH NC NC NC NC NC
1 NC HIGH NC NC NC NC
2 NC NC HIGH NC NC NC
3 NC NC NC HIGH NC NC
4 NC NC NC NC HIGH NC
5 NC NC NC NC NC HIGH
6 HIGH HIGH NC NC NC NC
7 NC HIGH HIGH NC NC NC
8 NC NC HIGH HIGH NC NC
9 NC NC NC HIGH HIGH NC
10 NC NC NC NC HIGH HIGH
11 HIGH NC NC NC NC HIGH
12 HIGH HIGH HIGH NC NC NC
13 NC HIGH HIGH HIGH NC NC
14 NC NC HIGH HIGH HIGH NC
15 NC NC NC HIGH HIGH HIGH
16 HIGH NC NC NC HIGH HIGH
17 HIGH HIGH NC NC NC HIGH
18 HIGH HIGH HIGH HIGH NC NC
19 NC HIGH HIGH HIGH HIGH NC
20 NC NC HIGH HIGH HIGH HIGH
21 HIGH NC NC HIGH HIGH HIGH
22 HIGH HIGH NC NC HIGH HIGH
23 HIGH HIGH HIGH NC NC HIGH
24 HIGH HIGH HIGH HIGH HIGH NC
25 NC HIGH HIGH HIGH HIGH HIGH
26 HIGH NC HIGH HIGH HIGH HIGH
27 HIGH HIGH NC HIGH HIGH HIGH
28 HIGH HIGH HIGH NC HIGH HIGH
29 HIGH HIGH HIGH HIGH NC HIGH
30 HIGH HIGH HIGH HIGH HIGH HIGH
Table 1. Trigger Table When Section Option Is VIL
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 8/30 12/16/2014 /circle6 Sequential Mode Support play up to 256 voice section sequentially by 1 TG pin. It also provides a BUSY output, the BUSY pin will output VIH when voice playing . When TG pin rising edge, chip will play voice. Rising edge again, then play next voice section. When last voice section is played, chip will return to voice section 0. /rhombus6 Pin Defined Pin Name PB0 PB1 PB2 PB3 Pin Name PD0 PD1 PD2 Description BUSY N.C. N.C. /rhombus6 Example
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 9/30 12/16/2014 /circle6 CPU Parallel Mode /rhombus6 Summary Support up to 32 voice section random play by 5 Addr pins and a TG pin. User assign voice section by Addr pins, and voice will play when TG pin rising edge. It also provides a BUSY output, the BUSY pin will output VIH when voice playing . /rhombus6 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description Addr[0] Addr[1] Addr[2] Addr[3] Pin Name PD0 PD1 PD2 Description BUSY Addr[4] Trigger P.S. 1. Addr[0] ~ Addr[4] are Section number in binary digit. 2. Addr[0] is the LSB (least signification bit), Addr[4] is the MSB (most signification bit).
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 10/30 12/16/2014 /rhombus6 Example Addr[4] ~ Addr[0] = 00000 => Play Section #0 Addr[4] ~ Addr[0] = 00001 => Play Section #1 Addr[4] ~ Addr[0]= 11110 => Play Section #30 Addr[4] ~ Addr[0]= 11111 => Play Section #31
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 11/30 12/16/2014 /circle6 CPU Serial Mode The CPU serial mode is designed for CPU interface. The host CPU can send data to control aMTPxxM. Serial Clock and Serial Data are used to input section number. BUSY is output from the chip to the host CPU for feedback response. Maximum 256 voice section are available. /rhombus6 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description Serial Clock Serial Data N.C. N.C. Pin Name PD0 PD1 PD2 Description BUSY N.C. N.C. /rhombus6 Example
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 12/30 12/16/2014 /circle6 MP3 Mode User can start to play the voice or pause current voice by Play/Pause pin, and forward or backward play by Forward pin or Backward pin, up to 256 V oice Sections. User can enable repeat function by Repeat Enable pin. When repeat enable, it will loop play the current voice section by Repeat Ranges pin is VIL; It will loop play all the voice section sequentially by Repeat Range pin is VIH. Repeat Enable pin and Repeat Range pin default is VIL. /rhombus6 Pin Defined Pin Name PB0 PB1 PB2 PB3 Description Forward Play Pause Backward N.C. Pin Name PD0 PD1 PD2 Description BUSY Repeat Enable Repeat Range
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 13/30 12/16/2014 /rhombus6 Example
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 14/30 12/16/2014 /square6 RAMP UP / RAPM DOWN When playback in DAC, Ramp Up /Ramp Down will enabled. This function eliminates the ‘POP’ noise at the begin and end of voice playback. Fig. 1 Ramp-up-down Enable /square6 VOICE TABLE One voice section can include many voice slices. User can use voice slices to save memory usage. For example, we have 3 voice file store in the memory: File 1: “How are You?” File 2: Sound Effect File 3: Music Voice slices are grouped together using Voice Table to form Voice Section for playback: Voice Section No. Voice Group Contents Voice Table Entries Section 0 “How are You? File 1. Section 1 Sound Effect + “How are You?” File 2, Fil e 1. Section 2 “How are You?” + Music File 1, File 3. Section 3 Music File 3.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 15/30 12/16/2014 /square6 SECTION OPIONS In Key, Sequential and CPU parallel mode, the software provide selectable options that affect each individual group are called “Section Options”. They are: /circle6 Edge or Level trigger /circle6 Unholdable or Holdable trigger /circle6 Re-triggerable or non-retriggerable Fig. 2 to Fig. 7 show the voice playback with different combination of triggering mode and the relationship between outputs and voice playback. Fig. 2 Level, Unholdable, Non-retriggerable Fig. 3 Level Holdable Fig. 4 SBT sequential trigger with Level Holdable and Unholdable
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 16/30 12/16/2014 Fig. 5 Edge, Unholdable, Non-retrigger Fig. 6 Edge, Holdable Fig. 7 SBT sequential trigger with Edge Holdable and Unholdable
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 17/30 12/16/2014 /square6 TRIGGER TIMING Key Trigger, Sequential, CPU Parallel and MP3 Mode Symbol Parameter Min. Typ. Max Unit tKD Trigger debounce time 20 ─ ─ mS tKDD Trigger delay after ramp down ─ 0 ─ mS tUP Ramp up time 0 32 ─ mS tDN Ramp down time 0 ─ 64 mS tBS BUSY output set up time 0 ─ 1 mS tBH BUSY output set down time 0 ─ 1 mS tASH Address set-up / hold time 1 ─ ─ mS
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 18/30 12/16/2014 CPU Serial Mode Symbol Parameter Min. Typ. Max Unit TSD Serial data stay / hold time 1 ─ ─ us TRAMPH Ramp up time ─ ─ 64 ms TRAMPL Ramp down time ─ ─ 64 ms TBUSYH BUSY output set up time ─ ─ 1 ms TBUSYL BUSY output set down time ─ ─ 1 ms
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 19/30 12/16/2014 /square6 BLOCK DIAGRAM /square6 ABSOLUTE MAXIMUM RATINGS Symbol Rating Unit V DD - VSS -0.5 ~ +4.0 V V IN V SS - 0.3<V IN <V DD + 0.3 V V OUT V SS <V OUT <V DD V T (Operating): 0 ~ +85 ℃ T (Junction) -40 ~ +125 ℃ T (Storage) -55 ~ +125 ℃
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 20/30 12/16/2014 /square6 DC CHARACTERISTICS ( TA = 0 to 70 ℃, VDD = 3.0V , VSS = 0V . ) Symbol Parameter Min. Typ. Max. Unit Conditions V DD Operating V oltage 2.7 3.0 3.6 V ISB Standby current 10 15 µA I/O properly terminated IOP Operating current 17 22 mA I/O properly terminated V IH "H" Input V oltage 2.7 3.0 3.5 V V DD =3.0V V IL "L" Input V oltage -0.5 0 0.3 V V DD =3.0V IVOUTL_ N V OUT low O/P Current (Normal V olume) 130 mA V out=1.0V IVOUTL_ H V OUT low O/P Current (High V olume) 200 mA V out=1.0V IVOUTH_ N V OUT high O/P Current (Normal V olume) -130 mA V out=2.0V IVOUTH_ H V OUT high O/P Current (High V olume) -200 mA V out=2.0V ICO C OUT O/P Current -2 mA Data = 80h IOH O/P High Current -10 mA V OH =2.5V IOL O/P Low Current 17 mA V OL =0.3V R OSC Oscillator resistance 200K 240K Ω Built-in oscillator adjust RN VOUT VOUT pull-down resistance 100K Ω VOUT pin set to internal pull-down
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 21/30 12/16/2014 Symbol Parameter Min. Typ. Max. Unit Conditions RN PIO Programmable IO pin pull-down resistance 1M Ω PBx, PDx set to internal pull-down RU PIO Programmable IO pin pull-up resistance 3.3K 4.7K Ω PBx, PDx set to internal pull-up ΔFs/Fs Frequency stability -3 +3 % V DD = 3V +/- 0.4V ΔFc/Fc Chip to chip Frequency Variation -5 +5 % Also apply to lot to lot variation
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 22/30 12/16/2014 /square6 TYPICAL APPLICATIONS /circle6 Key Trigger Mode Using 3.0V Battery And Key Trigger With PWM Driver Speaker
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 23/30 12/16/2014 Using 4.5V Battery And Key Trigger With DAC Driver Speaker Note 1. PB0, PB1, PB2, PB3, PD1, PD2 are trigger pins (input). 2. PD0 is busy pin (output). 3. C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. 4. R1 is optional for fast discharge of C1, C2, C3 and Crst when power off.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 24/30 12/16/2014 /circle6 Sequential Mode Using 4.5V Battery And Sequential Trigger With DAC Driver Speaker Note 1. PB0 is trigger input pin (input). 2. PD0 is busy pin (output). 3. C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. 4. R1 is optional for fast discharge of C1, C2, C3 and Crst when power off.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 25/30 12/16/2014 /circle6 CPU Parallel Mode Using 3.3V Supply And CPU Parallel Trigger With DAC Driver Speaker Note 1. PB0, PB1, PB2, PB3, PD1 are address pins (input). 2. PD2 is trigger pin (input). 3. PD0 is busy pin (output). 4. C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 26/30 12/16/2014 /circle6 CPU Serial Mode Using 3.3V Supply And CPU Serial Trigger With DAC Driver Speaker Note 1. PB0 is serial clock pin (input). 2. PB1 is serial data pin (input). 3. PD0 is busy pin (output). 4. C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 27/30 12/16/2014 /circle6 MP3 Mode Using 4.5V Battery And MP3 Mode Trigger With DAC Driver Speaker Note 1. PB0 is forward pin (input). 2. PB1 is play / pause pin (input). 3. PB2 is backward pin (input). 4. PD1 is repeat enable option pin (input). 5. PD2 is repeat mode select pin (input). 6. PD0 is busy pin (output). 7. C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. 8. R1 is optional for fast discharge of C1, C2, C3 and Crst when power off.
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 28/30 12/16/2014 /square6 Package Information /circle6 DIP 28-PIN
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 29/30 12/16/2014 /square6 Package Information /circle6 SOP 28-PIN
Integrated Circuits Inc. aM TPxxM Series Ver 1.1 30/30 12/16/2014 /square6 HISTORY Ver 1.0 2011/12/07 The 1 St version datasheet for aMTPxxM. Ver 1.1 2014/12/16 Remove LQFP data