AM9128 AMD | Alldatasheet

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DISTINCTIVE CHARACTERISTICS © Logic voltage levels compatible with TTL ®@ taa/tacs as low as 70 ns © Three-state output buffers and common 1/0 © Power-Down mode (Isa as low as 15 mA) © Ioc Max., as low as 100 mA ee ee GENERAL DESCRIPTION The Am9128 is a 16,384-bit Static Random = Access designs. Common data I/O pins using three-state outputs Read-write Memory organized as 2048 words of 8 bits. It are provided. The Am9128 is available in an industry- uses fully static circuitry, requiring no clocks or refresh to standard 24-pin DIP package with 0.6-inch pin row spacing. operate. Directly TTL-compatible inputs and outputs and ‘The Am9128 uses the JEDEC standard pinout for byte-wide operation from a single +5 V supply simplify system memories (compatible to 16K EPROMs). _operation fom @ sae + A> EO EATO———er BLOCK DIAGRAM rs x s “ oecoven he de A ‘coun 2 os [1] oe re & s coum c 7 yOcRCUTS Yee ——~ a ‘Yes (0) ——— ad Lal oa ve ‘80000281 a PRODUCT SELECTOR GUIDE [Part Number Amoiz6-70 | Amo12e-00 | Amo120-10 | Amo1ze-12 | Amo128-16 | Amo12®-20 | [Maximum Access Time (ne) | 70 | 90 *[ too [120 [so [200 Maximum Operat- [oto 7G | 140 [NA [tao [wa [00 [140 tng Current (ma) [“s5° to vc | N/A [10 | WA | t60 [50150 [owe [a | NA | [wa [is [30 | [eset vac] wa [30 TNA [30 fo To wo Isove bae 1000

a CONNECTION DIAGRAMS Top View DiPs e C2 afr As (_]> af) As a4 nO w 4(Cjs 20 [7] S& aCyje 19 [_] Aw aC? w(t ae w [i]s (je 16 [-) ©, Cj 18 [] Ws wy (Jn 14 [7] ©s coo00r21 Note: Pin 1 is marked for orientation. Nm Pi ie mario for ovortnfons METALLIZATION AND PAD LAYOUT 4 [External [Internal _| Pee agi uss ee a |! Jal [oa [| rer] a Jo DIE SIZE: 0.162" x 0.240" we Am9128 4681

a

ORDERING INFORMATION

AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: a. Device Number b. Speed Option (if applicable) ¢. Package Type d. Temperature Range @. Optional Processing Lene nom grmonas rnocesng ec aoe 4. renpanarvea sas C= Commercial (0 to +70°C) Sr RETO Ie w oe8 < aomsse Te P= 24-Pin Plastic DIP (PO 024) D = 24-Pin Ceramic DIP (CD 024) 'b. SPEED OPTION rere, Buss 9 paves munerpescnTiOn pers SS mae mu [vara Combirations | vale Combinations Valid Combinations list configurations planned to be ‘supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid Pea DCB, DE, ‘eentte to on ‘ and to obtain additional data on AMD's standard military grade products a 4-82 Am9128

a [AMD products for Aerospace and Detense applications are available in several packages and operating ranges. APL (Approved Products List) products are fully compliant with MIL-STD-883C requirements. The order number (Valid Combination) for APL products is formed by @ combination of: a. Device Number 'b. Speed Option (if applicable) ©. Device Class d. Package Type @. Lead Finish | FINISH ‘A= Hol Solder Dip C=Gord - d. PACKAGE TYPE ‘J= 24-Pin Ceramic DIP (CD 024) .¢. DEVICE CLASS. 78 = Cass B b. SPEED OPTION =90= 90 ns 212 120 ns 716 = 150 18 =20 = 200 ns &. DEVICE NUMBER/DESCRIPTION ‘Ano128 2048 x8 Static RAM Valid Combinations Valid Combinations list configurations planned to be [amorze90 | supported in volume for this device. Consult the local AMD Taneizer2 | sales office to confirm availability of specific valid [ameter | fO1A 1B combinations or to check for newly released valid Laworze20 combinations. Group A Tests Group A tests consist of Subgroups ee PIN DESCRIPTION Ap-Ato Addresses (Input) TE Chip Enable (input, Active LOW) “The 10-bit field presented at the address inputs selects one Read and Write cycles can be executed only when CE is of the 2048 memory locations to be read from — or writton Low. into — via the data lines. WE Write Enable (Input, Active LOW) W01-VOg Data In/Out Port (Input/Output) Data is written into the memory if WE is LOW and read from it WE is LOW, the data represented on the I/O lines can be the memory it WE is HIGH. written into the selected memory location. if WE is HIGH, the 1/0 lines represent the data read from the selected OE Output Enable (Input, Active LOW) memory location. Read cycles can be executed only when OE is LOW. a Am9128 4-83

ABSOLUTE MAXIMUM RATINGS (Note 11) OPERATING RANGES (Note 3) Storage Temperature ..c.sccseestissnese=65 10 +150%C Commercial (C) Devices ‘Ambiont Temperature with ‘Ambient Temperature (TA) ..sscsesseescesses 10 +70°C Supply Voltage ....-cscesseensennseneeen=O5 V tO +70 V — yiitary* (M) and Extended Commercial (E) Devices Spe og 30 V0 +70V ‘Case Temperature (TA) ..-sccsesseeeeess+ 55 10 +125°C. Respect sssernceneereeeene ; Supply Voltage (Voc) «succes 44.5 V to +55 V DC Output Curent sv ssscssesseseeeeseereneee 40 MA ; ; ‘oh the *Maximum ratings are to be for system design reference, functionality of the device is guaranteed. parameters given may not be 100% tested by AMD. Stresses above those listed under ABSOLUTE MAXIMUM at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability DC CHARACTERISTICS over operating ranges unless otherwise specified (for APL Products, Group A, Subgroups 1, 2, 3 are tested unless otherwise noted) (Note 3) am9128-70 Am9128-90 ‘Am0126-12 Am9128-10 ‘Am9128-20 Parameter Description Teer conattions ___[ win. [wax | win. [sax | win | was. | ox Toe a omens —"Troimaev _Tconasy fet —f 2 ff 2 Ft [ton | Outost LOW Curent | Vou=oa vy | [at ae pa Tm | ¥ ¥ % [vm frm omer [Te ee | oe [Mee | oe [8] [vu | wou tow voiae i | SC 0s | os [os | 08 [os | oe [Vv | [ix | tout toad Curent | Ves<vixvoo | TT 0 To [Po fn) Outout Leakage Ves <Vo <Voe [= [amine aces TT Pet fel [el | input Capactiance meipervow | Pope | A= loo Bua coer | Moe ao Pet te] fey ee a Vor Operating Supply Max. Voc. CE <Vi. =~ oes Gorwrtre ewe | [| [mf] [oom [as Js 0 ‘tomatic CE Power ell ooo | Down Curent Beak Power On Curent | Yoo ~GND Wo Voc Max [oor fs Ts To TT ra same fee ttt tl |_| Tiotes: 1 Tho Fiornel wile imo ofthe memory defined by he overap of CE LOW and WE LOW. Both signals must be LOW to ini a write and Uther Signal can torminats & wite By going HIGH, The data input setup end how ming should be roerenced 10 tho ring edge ofthe signal {hat terminates tho wrt 2. Rpulup resistor to Voc on the CE inp is requred during power upto keep the device deselected, otherwise po wil exceed values gen. 5. For toat and coreleson purposes, ambient terpereture i defined as the "Inetant-on" case lomporaiue. & Attany gven temperature end votage condition, Wz 18 less Tan tz 5. WE fe HIGH for road cyclo. & Dawei contol soeced, TE = Vie 7. gros va po 10. concent wi TE waation LOW. =Mu 2G =30 18, Trananon measured om 1.5 Von the input o Vox 500 mi and Vo.+500 mi onthe cups ung the lad shown n Switching Test Grote, Co='8 11. The produ doberbod by this specication ince intemal crculty designed 1 protect put devices from damaging accumulations of ‘hate charge. tvs suggested, nevertheless, that conventional precauone be abearved during storage, handing, and use to Bvok! exposure {0 excesswe voltages 12, The parameter is guerantoed by characterzaton, but is not tested. 4-84 Am9128

a SWITCHING CHARACTERISTICS over operating ranges unless otherwise specified (for APL Products, Group A, Subgroups 9, 10, 11 are tested unless otherwise noted.) ee ee A a a [3 [thes [Gin Seiect Accaas Time woe | | of to fe | {ree © [we id wa [se wa | a [ce] oz Ont in LowZ vom OF Wows iaa | s | | s {| { s | {| [ie Onna nz om CE (ones 4101 TT os we Po To | [oe] tous Onin tow z tom OE Woe 4] fs | Te ffs Tf | [oe] ome | Onpurin Hz torn OE Wows 410.1) | | © | fs J Ts | ne | [io] wu [ip Seacion-w Powarup Time Wow 1 fo | { e {fo | [m= | Eto Shp Desetacton 10 PowerDown Time ote @ | | © | s [ [so [ne | a KS Sip Seecton [owrwo [| » | [wal [wo | | (ote 1) [ssw-vsre [wa | o [Twa [| a a [is [we] wie Pave wan foe i Ts [oo Pe [ie [awn [wite Recovery Time dT 8 | dT Pe TT | [or [os Yona Setp Time Te A [is] mz Loupe n tow 2 on WE oie vats | Te fs [| [a0 [ne] Ontoar nH tom WE Motes 410.1 | | me ff Ts fe | [al taw [Aeeress to End otwete i 8 en Notes: See notes following DC Characteristics table. 40 Oe ‘Am9128 485

a SWITCHING CHARACTERISTICS (Cont'd.) [TT wc [Reed Ometme CC mT To TT [2 [woo | Address Access Time (ote) TT to [te 200 fe [8 | twos | Chip Select Access Timo Wow | tao [seo 200 fw | (Note 9) eS NS A OO [S| torr | Cutout Hod Time rom Adsrose Change Ts TPs Ps Te [e_ | teaz _[Ouput in LowzZ trom CE owe 4.10.12) | 6 | fs ffs [| | [7_|_tonz | Output in HZ trom CE (Notes 4, 10. 12) a [8 [tz | Oput in Low.Z tom OE Wows 4101) | sf Ts ne | [2 [torr [Ova in HZ trom OE Woten 4 ota Tas ee soe [70 [teu __| Chip Selection to Power-Up Time (Note 12) [oe [fe Te Te [11 [top | Chip Deselection to Power-Down Time (Note 12) [| ss ff eo J Teo | ne [2 Two [wie Geietime Ct eo To TT howe 1) [we | tos Poo TT eo [ve | us | Atirees Soup Time | tf ae [15 | we | wite Puce wiam wow) To es oo Pe [16 | wa | wrte Recovery Time TT se [~W7_| “tos [oumSeup tine a go Po ne [18 [tow [Oeatoatme Es se [19 [wz | Oupt in tow zZ trom WE (Nowe 4t012) [8 fs Ts re [20 [twuz | Ouput in HZ trom WE (Motes 410,12 | [so Tf oe [so re Notes: See notes following DC Characteristics table, ‘SWITCHING TEST CONDITIONS SWITCHING TEST CIRCUIT an Pour ‘input Timing Reference on a Leveta (rctuding ‘Output Timing Reference Sope Sr Levels. ” wmv ‘7¢008700 . a

486 Am9128

a SWITCHING WAVEFORMS KEY TO SWITCHING WAVEFORMS are coeenor time staan ee soos oad Te. om a omne rn Read Cycle No. 1 (Notes 5, 6) ram oyte tos tote a te tou 60: am Read Cycle No. 2 (Notes 5, 7, 8) Notes: See notes following DC Characteristics table. a Am9128 4-87

SWITCHING WAVEFORMS (Cont'd.) tS a | Als es es Write Cycle No. 1 : ; Write Cycle No. 2 (Notes 7, 8) =

a TYPICAL PERFORMANCE CURVES ‘Supply Current ‘Supply Current Normaiized Access Time Versus Ambient Temperature Versus Supply Voltage Versus Supply Voltage -. as uw To ZT Ld CONT Seer SC . tii: . P| ae | ‘ Tae "Tee tty) 82 r) f. Tae tee t-* Yeo -¥ “ec -¥ OP000640 OP000650, OP000660 Normalized Access Time Access Time Change Output Source Current Versus Ambient Temperature Versus Output Loading Versus Output Voltage sy ete sled TTT oye ret] #4 : woot «6M ITIL Co 6a OL ws 0P000670 an ‘0P000680 Non-¥ ‘0P000800 Output Sink Current ‘Typical Power-On Current ‘Access Time Change 4 | Versus Output Voltage Versus Power Supply Versus Input Voltage - . . Hee] |S] eho PH EAR o ex] PUTT 3 aaa ‘Zee LAT CO we . we ore oroure — ce Am9128 489