AM7204A AMD | Alldatasheet
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High Density First-In First-Out (FIFO) paicre 4096 x 9-Bit CMOS Memory DISTINCTIVE CHARACTERISTICS RAM based FIFO Status flags—full, half-full, empty 4096 x 9 organization ™ Retransmit capability Cycle times of 25/35/45/65 ns for standard Expandable In both width and depth products Increased noise Immunity for X-CMOS Cycle times of 40/65 ns for APL products threshold ™ Asynchronous and simultaneous writes @ Functional and pin compatible with industry and reads standard devices ™@ Low power consumption GENERAL DESCRIPTION ‘The Am7204A is a RAM-basedCMOSFIFOthatis 4096 full conditions. The capability also exists to retransmit words deep with 9-bit wide words. It is expandable to _ data fromthe FIFO. any width and/or depth to create much larger FIFOs. High-density FIFOs such as the Am7204A are useful in This FIFO can input and output data asynchronously a wide range of applications. The ability to buffer large and simultaneously at data rates from 0 to 40 MHz for _transfersof data andthe rate adaption capabilities make Standard Products and 0 to 25 MHz for APL products. _the Am7204A useful in communication, image process- Status flags are provided to signify empty, full and half-_ing, mass storage, DSP, and printing systems. BLOCK DIAGRAM De—Ds [ cone] me Read | at Outputs S Ee Logic ca Logic XOnF 14430C-1 Figure 1. PRODUCT SELECTOR GUIDE [Part Number | Am7204A-15 | Am7204A-25 | Am7204A-35 | Am7204A-50 | Am7204A-20 | Am7204A-50 | [Access Time | 15ns__ [| 25ns_ | 35ns_ | sons | a0ns_ | 50ns Maximum Power [Supply Current 90 mA 70 mA 60 mA 60 mA 100 mA 90 mA Operating Frequency 28.5 MHz 25 MHz 15.3 MHz [Operating Range] comt | comt [Com [| Com | _wi_| Mi Issv0 Date: September 1992 2-75
DIPs* PLCC* wie 2 2 = wo 28 Veo esee3as De 2 2 po maaan Ds 3 26 f] ps othe a oh a ho. Das — 25 fds offs 28 flo; os ad DoL] 7 27 [Nc Do Gs 23 1] FURT xq 8 26 []FURT x7 220) RS FFE] 9 2s TRS FF 21D er Qo] 10 24 DEF aoe 201) XOnF ag. 23 []XOMF a, 10 19f}a, NC[] 12 22T]aQ, ae M11 18 [] Qs Qf] 13 2111 Q5 Qs [13 16 |] Qs seeogkt ges exo = sR ° 444300-2 14430C-3 Notes: Pin 1 is marked for orientation for plastic packages. *Pinout identical for both plastic and ceramic DIPs. a LOGIC SYMBOL 9 9 Do-s Qos FURT xi EF | w XOnF R RS FF 144300-4 | 2-76 Am7204A
ORDERING INFORMATION
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: ‘AM7204A 315 Pp c L_ OPTIONAL PROCESSING Blank = Standard processing TEMPERATURE RANGE © = Commercial (0°C to +70°C) PACKAGE TYPE P = Plastic DIP (600 mil) (PD 028) J = Plastic Leaded Chip Carrier (PL 032) R = Plastic DIP (300 mil) (PDW028) SPEED OPTION “15 = 15nsta 25 = 25nsta -35 = 35nsta “50 = 50nsta DEVICE NUMBERVDESCRIPTION Am7204A, High Density First-In First-Out (FIFO) 4096 x 9-Bit CMOS Memory Valid Combinations Valid Combinations 'AM7204A-15 RC, JC Valid Combinations list configurations plannedto be ‘supported in volume for this device. Consult the lo- AM7204A-25 cal AMD sales office to confirm availability of specific AM7204A-.35 | PC, RC, JC valid combinations, and to check on newly released valid combinations. ‘AM7204A-50 Am7204A 277
MILITARY ORDERING INFORMATION APL Products AMD prodvets for Aerospace and Defense appicatons are avalabl in sovoral packages and operating ranges. APL (Approved Products List) products are fully compliant with MIL-STD-883C requirements. The order number (Valid Combination) is formed by a combination of: ‘AM7204A 30 B xX A L_ LEAD FINISH A= Hot Solder Dip PACKAGE TYPE X = 28-Pin Ceramic DIP (CD 028) U = 32-Pin LCC (CLRO32) DEVICE CLASS 1B = Class B SPEED OPTION -30 = 30nsta 50 = 50nsta DEVICE NUMBER/DESCRIPTION Am7204A High Density First-In First-Out (FIFO) 4096 x 9-Bit CMOS Memory Vi tio alld Combinations Valid Combinations list configurations planned to AM72044°30 | ayn BUA be supported in volume for this device. Consult ‘AM7204A-50 7 the local AMD sales office to confirm availability of specitic valid combinations, or to check on newly Military Burn-in released combinations. Military burn-in is in accordance with the current revision of MIL-STD-889, Test Method 1016, Group A Tests Conditions A through E. Test conditions are i Group A tests consist of Subgroups selected at AMD's option. 1237881011 2-78 Am7204A
a PIN DESCRIPTION Do-s Qo-8 Data In (Inputs (9) Data Out (Outputs (9), Three State) ‘These nine pins are the data inputs to the FIFO. These nine pins are the data outputs for the FIFO. = These pins are in a high impedance state whenever EF Read (A) is HIGH. Empty Flag (Output; Active LOW) R The HIGH state of the Empty Flag (EF) indicatesthatthe = = . FIFO contains data to be read. The EF goes LOW when _FRead (Input; Active LOW) the read pointer is equal to the write pointer, indicating The falling edge of Read (R) initiates a read cycle, ex- that the device is empty. EF LOW inhibits further Read cept when the device is empty, as indicated by the operations. Empty Flag (EF) being LOW. Valid data appears: hon the , = outputs (Qo-8) after the falling edge of R. After Ri goes The EF goes HIGH after the rising edge of Write (W)dur- HGH, the Data Outputs (0-8) will return to a high im- ing the first write cycle for an emply FIFO (See Figure 4). edance condition ‘The EF goes LOW after the falling edge of Read (R) dur- e ing the read cycle which creates the empty condition. RS During a Reset cycle, the EF is driven LOW (active). Feset (Input; Active LOW) FF The falling edge of Reset (RS) is used to reset the FIFO. During Reset, both the read and write pointers are set to Full Flag (Output; Active LOW) the first location in the FIFO. Since the reset cycle initial ‘The HIGH state of the Full Flag (FF) indicates that the _zesthe FIFO to anemply condition, the Emply Flag (EF) FIFO is capable of accepting data. The FF goes LOW is driven LOW (gstve). and both the Half-Full Flag (HF) when the write pointer is one location less than the read and Full Flag (FF) are driven HIGH (inactive). pointer, indicating that the device is full. FFLOWinhibits —y further Write operations. ce . = Power Supply The FF goes HIGH atter the rising edge of Read (R) dur- aan ing the first read cycle following a full condition (See ‘This pinis the +5 V power supply for the FIFO. Figure 6). The FF goes LOW after the falling edge of Wy Write (W) during the write cycle which creates the full condition. Write (Input; Active LOW) A FEis ari The falling edge of Write (WW) initiates a write cycle, ex- During a Reset cycle, he FFis driven HIGH (Inactive). copy wher the device is ful, asindicatedby the Full Flag FURT (FF) being LOW. Data is latched into the FIFO on the Firat LoadiRetranamit (Input; Active LOW) fising edge of W. This is a dual purpose input, dependent upon whether Xt the FIFO is in Single Device Mode or Depth-Expansion Expansion n (Input; Active LOW) Mode. an Zh i a a a _ Expansion in (XI) is grounded to indicate operation in This pin acts as a FIRST LOAD (FL) pin when in the the Single Device or Width-Expansion Modes. In Depth Depth-Expansion Mode. The device receiving datatirst. Expansion Mode, the XI pin is connected to the Expan- willhave the FL input tied LOW, while the remaining de- _sion Out (XO) pin of the previous device, except for the Vices willhave the FL pintied HIGH. The statesofthe FL _X/pinof the first device whichis connected to the XO pin and Expansion In (Xl) pins are used to determine the _of the last FIFO. FIFO's mode of operation, as shown in Tables 1 aNd 2.11. Hin operates at CMOS logic levels, thus providing This pin is used as the Retransmit (AT) input during Sin-__ noise immunity between cascaded devices. gle Device Mode. The device can be instructed to ya ae retransmit the previously written datawhen ATispulsed XO/HF LOW. Expansion Out/Halt-Full Flag (Output; Active LOW) GND This is a dual purpose output, dependent upon whether the device is in Single Device Mode or Depth Expansion Power Supply, Ground Mode. This pin is the 0 V power supply for the FIFO. This pin operates as an Expansion Out (XO) signa! dur- NC ing Depth Expansion Mode. In this mode, the XO pin is No Connect connected to the Expansion Input (XI) pin of the follow- " ing device, except forthe XO pin of the last device which These pins are not connected. is connected to the XI pin of the first device. a Am7204A 2-79
When in Single Device Mode (Expansion In (XI)_pin HIGH after the rising edge of Rduring the read operation grounded) this output operates as a Halt-Full Flag (HF). which eliminates the halt-full condition (See Figure 5) After half the FIFO has been filled, the HF will be set , — inacti LOW at the falling edge of the next Write (W) operation. Ouring a Reset cycle, the HF is driven HIGH (inactive) The HF will remain LOW untilthe difference betweenthe This pin operates at CMOS logic levels, thus providing write pointer and read pointer is less than or equal to one noise immunity between cascaded devices. half of the total memory of the FIFO. The HF will go 2-80 Am7204A
address pointes. The flag logic prevents ilogical vetios ing edge of W will be stored sequentially in the FIFO. depth greater than that of the Am7204A. Thewrite, read, _ overflow situations. data-in and data-out lines of the Am7204A are con- —_A special case of write occurs when a write operation is. automatically enabled and disabled through the hand- FIFO twer after the “sing econ of FF (see Figure 9). mode of operation, as shown in Tables 1 and 2. For a sion Mode but is not active. fising edge of Reset (IS). The Feset cycle intializes the ©! Fduring the frst read cycle following a full condition. Full Flag (FF) being HIGH, inactive. which eliminates the half-full condition. (See Figure 5). ze YQ venting a data undertiow situation. FF til tape after the rising edge of EF (see Figure 8). Figure 2. Reset Timing 144306-6
Table 1. Reset and Retransmit Truth Table
- Flags will change to show correct state according to write pointer.
- Pointers will increment only if corresponding flag is HIGH at the beginning of the cycle.
Table 2. Reset and First Load Truth Table 1, Xlis connected to XO of previous device. See Figure 12.
- Same as during Reset Cycle.
- Pointers will increment only if corresponding flag is HIGH at the beginning of the cycle.
Figure 3. Asynchronous Write and Read Timing
ABSOLUTE MAXIMUM RATINGS OPERATING RANGES upply Voltage, (Veo) woes $4.5 Vit0 45. Ambient Temperature with ply Voltaa! ) * DC Output Current. 50 mA Stresses above those listed under Absolute Maximum Rat- ings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maxi- ‘mum ratings for extended periods may affect device reliabilly. DC CHARACTERISTICS over COMMERCIAL operating range unless otherwise specified |Am7204A-15)Am7204A-25) |Am7204A-50 Parameter ta=15ns | t= 25ns ta=50ns Symbot | Parameter Description [win ax. | Win. [ wa in] ax Win] Max Input Leakage Current (any input) (Note )[ -1 [4 [a [+ [at + [a1 [aa] Output Leakage Current (data outputs) 10 10 10 | nA (Note 2) Vin | Input High Vottage (all inputs except Xi) | 2.0 2.0 2.0 v (Note 3) Vin Input Low Voltage (all inputs except Xl) Vv (Note 3) Input High Voltage, XI (Note 3) [es] |os{ [asf [ssf Tv Input Low Voltage, XI (Note 3) [ [rst [rst [ast [ist vy Output Logic “1” vottagelou=-ema_[aal [eal [eal feat Tv] Ouiput Logio"o"Votageian=sma [| foal [oa] [oa [oat v | lec: | Average Vec Power Supply Current 70 mA (Note 4) Iece | Average Standby Current 15 15 | mA (R= W= RS = FURT = 2.4 V) (Note 4) Iccs | Power Down Current 2 2 mA (all inputs = Vec - 0.2 V) (Note 4) Notes: 1. Measurements with GND < Vin < Vcc. 2, R2 Vin, GND < Vour s Vec. 3. ViL and Vin are input conditions of output tests and are not themselves directly tested. Vi and Vi are absolute voltages with respect to device ground and include all overshoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. 4, loc measurements are made with outputs open. oe . 2-88 Am7204A
SWITCHING CHARACTERISTICS over COMMERCIAL operating range unless otherwise speci Params] ameter Description —_| Pantaosa-i[amranancastamrzeeasamTaneA So] Parameter Description risus max [ox [in] ax | Wax. [we [WiteCycietime +. 3 = [aT [st To] [os] [Ciwew [wetePusowian | 3 | is{ [est [ast [so] [ns] [twa JwiteRecovey time | 2 [of [rof [rot [as] ns} [tos fDatasewptime | oe [zi [wef [ret [ool [ns] [ie [patahodtime [ae fof fol fol |s[ {rs| [Cer [weteowioruiFiaatow [ss [| eaf [ast [oo] | 48 [ns [cir [Write towionarrurrlagtow]s | [sof [as fet | 5 [ns] [cine Wie HiGHto Empty Fiagich [ae | | ae{ [es [oo] | 4 [ns | Pe feemeper Tr er Ter ee [I at LOW Z (Note 1) [ie ]wete Puss wien anertPrign |e fs] [est fes[ [so [ Tos] [tne [Read Gycietime | s [2] [ast [asf Test {ns} [om Taccesstime ——iaasal | as{ [ast [as] | 50 | ns| [ise [Read Recoveytime | 3 | ol [aol [rol [asf [os | [ciwew [Read Pusewan | 3 | 5s] | es[ [as[ [so] [ns] Pe irenemcrmmm TT Te TT at LOW Z (Note 1 [er [oatavaidtommreadrusenica| s fs} fs] [st {s{ [rs Lm (omer Ts T Tet Tey fet fei at HIGH Z (Note 1 [cis [Readnichtoruirighigh | 6a | | e{ [as| [aol | 45 [ns] [tw [ReadricHiorar-rurriag wich! 6 [| so [| ss{ 7 [as { | 6s [ns [ime ]Reastowte Emory Fagiow [ae | [2 |e] [| [4s [rs [twee [Read Pulse wiainafierernin |e | we] [as| fas] [so] [ns| [tase [ReseiGycetime | 2 | sl [est [ast Tes] [as] [ins [Reset Pusewian | 2 | s| [asf fas{ Tso] [ns | [inss[ResetSeuptime | 2 | | [as{ [as{ [sof [ns | [tse [ResetRecovey time |e | | | ro[ {rol [rs] [ns [tex |Resettoempryrigtow | 2 | [ast [ost [| [es [ns | [wen [Resettonattruiriagtion | 2 | | es{ [as [as] | 6 | ns] [ten [Resettorutriagnich | 2 | | est [ast [as] [es [ns | [tare [Revansmmoyetine | 7 | Ss] [ast [at fos] fins] [ter [RetransmtPulsewian | 7 | asf [ss{ [asf [sot [as | [tars [Retransmi Seup Time Note) | 7 | ie [ast [as[ [so] [ns | [tna [RetransmtRecovey time | 7 [sof [of [rot [s[ [os] Notes: 1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where these parameters may be affected. 2. Values are guaranteed by design and are not currently tested. oy Am7204A 2-89
SWITCHING CHARACTERISTICS (continued) Parameter| |_tro.__[ReadiwritetoxoLow 10 TT as TT ast Tas. 7 50 [ns | [tor |Reedrie ox nIGH [10 [| 5 | | J] a5} | 50 | [ws [Putse wath Wore) J ee pes] [_tun [Xi Recovery Time (Note 2) Prof Po fof oT Irs | L_tws_[Xisetwptime Tt oT oT too Ts | Notes: 1, These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where these parameters may be affected. 2. Values are guaranteed by design and are not currently tested. ee 2-90 Am72048
ABSOLUTE MAXIMUM RATINGS OPERATING RANGES oltage, voceeees 10 +5: ‘Ambient Temperature with upply Voltage, (Vee) * * Power Dissipation . . 1.0W Military product is manufactured in compliance with the latest Stresses above those listed under Absolute Maximum Rat- ings may cause permanent device failure. Functionally at or above these limits is not implied. Exposure to absolute maxi- mum ratings for extended periods may affect device reliability. DC CHARACTERISTICS over MILITARY operating range unless otherwise specified. ‘Am7204A-30 Am7204A-50 Parameter! ta = 30 ns ta= 50 ns. [te [aput teakage Curent(anymparworey [10 | wo | -10 [1 [wa | ‘Output Leakage Current (data outputs) 10 pA (Note 2) Vin Input High Voltage (all inputs except Xi) 2.2 22 v (Note 3) Vie Input Low Voltage (alll inputs except XI) v (Note 3) Input High Voltage, XI (Note 3) [as {| | ss [ot v | Input Low Voltage, XI (Note 3) CPs | as Tov Output Logic “1” Voltage lon = ~2 mA [ea [| | 2a [oT v | [ve Jouputtose oVotagein=ema | | oa [ [oa [ov | ‘Average Voc Power Supply Current 100 mA (Note 4) Toce | Average Standby Current 15 15 mA (R= W-= RS = FURT = Vn) (Note 4) lees | Power Down Current (all inputs = mA Voc 0.2 V) (Note 4) Notes: 4, Measurements with GND < Vin < Voc. 2. Re Vin, GND < Vour < Vee. 3. Vic and Vin are input conditions of output tests and are not themselves directly tested, Vit and Vin are absolute voltages with respect to device ground and include all overshoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. 4. loc measurements are made with outputs open. a Am7204A 291
SWITCHING CHARACTERISTICS over MILITARY operating range unless otherwise specifier "sem | pammawrcecion Lrg [Pe P| [me —[ Wite cyceting Sd os | [wou [weie Pusewan | 3 Po | fa | [tw [We Recoven Time Ps | | [tes | Bata Setptime |e Pao | [tn | daiatotine 8 fo [fs | de | [torr [Weis Lowe Fulagtow ———~[~ss J —_Pae fas Te J [wae | Wete Cowie HatFul Fag COW [8 [| a0 [a] ne | [ver [Wits HIGH io Empiy Fag HGH [a6 [a0 [fn | Write Pulse HIGH to Data Bus at pm [iansncmeonres Te er Te [wer | Wie Pulse wiahater FPG |_| se | se | Tre J [ike [Read Gyo Ting 2 es] [ix [access Tine Be a a Ts | [Tie [Read RecoweyTine Pe | | tiow | Read Pusewan df ao | po fo | Po former LOW Z (Note 1) [ “tae | ata Vats om Read PueGH [3] 3 ae J | we [Reimaccgeomers Ts Tey ey HIGH Z (Note 1 [Tier | eas HiGHe Fulraghign | 6a} |» | | Te] [tne | Read HIGH io Hat FulFaghiGh [| s_[ | 0 | | es [ns] [tree [Read Low io Empiy Fagtow [a6 | 20 |] a8] ns | [twee [ead Pulse Wish ater HIGH [6 [ee |_| | Tre] [tise | Reset Geis SSCs [ts | ResetPuso wath ST 2 | a0 | if so | | [ “tess [Reset Setup Tine Sif a0] p50 | [ese | Reset RecoveryTine i Po] fas Ts J [ter [Reset to Emp Fag OW |e | ®t} Tos] [ter | Resettovat-rul fagrign |e _| } a | |e [ns | [rn [Reset to Fut Fig niGH | 2 [ao os Tae J [tie] novansmt Gydetme re] [sr | Retransmit Pose wei 7 oo | | 50 | fo | | “ters_[ Retransmit Setup Time (sle@) |? [ea | | 0 | Tre J [Tae [ Rettansmt Recoven Time [7] 0 |} 15 | Tre | Notes: 1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where these parameters may be affected. 2. Values are guaranteed by design and are not currently tested, 2-92 Am7204A
amo £4 SWITCHING CHARACTERISTICS (continued) Parameter | rmnteroescnpion | [amreaiaco Lamransaso] | Symbo! | Parameter Description Figures [ Min. | Max. | Min. | Max. | Se | Resins SOLOW eo | is [ Resse oXOnGH of a | [en Litre wean oe ee | [Tu XRecoven Time ioe) iT | oT oT [ns | a Notes: 4. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where these parameters may be affected. 2. Values are guaranteed by design and are not currently tested. a Am7204A 2.93
- Includes jig and scope capacitances.
Figure 17. AC Test Load Symbol [Parameter Description (Note1) Test Conditions Typ.
- These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is
moditied where capacitance may be affected.