ALC850 REALTEK | Alldatasheet
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EIGHT CHANNEL AC’97 2.3 AUDIO CODEC DATASHEET Rev. 1.4
02 December 2005
Track ID: JATR-1076-21 Realtek Semiconductor Corp. No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan www.realtek.com.tw ALC850
Eight Channel AC’97 2.3 Audio Codec ii Track ID: JATR-1076-21 Rev. 1.4 COPYRIGHT ©2005 Realtek Semiconductor Corp. A ll rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp. DISCLAIMER Realtek provides this document “as is”, without wa rranty of any kind, neither expressed nor implied, including, but not limited t o, the particular pu rpose. Realtek may make impr ovements and/or changes in this document or in the product described in this document at any time. This document could include technical inaccuracies or typographical errors. TRADEMARKS Realtek is a trademark of Realtek Semiconductor Co rporation. Other names mentioned in this document are trademarks/registered trademarks of their respective owners. USING THIS DOCUMENT This document is intended for the hardware and soft ware engineer’s general information on the Realtek ALC850 Audio codec chip. Though every effort has been made to ensure that this document is current and accurate, more information may have become available subsequent to the producti on of this guide. In that event, please contact your Realtek representative for additional information that may help in the development process.
REVISION HISTORY
Revision Release Date Summary 0.40 2003/08/03 Preliminary version. 1.00 2003/11/6 Second preliminary version. 1.10 2004/04/05 The LQFP-48 ‘e’ dimension is typical 0.0196inch. 1.11 2004/09/19 Corrected typing error in S/PDIF output feature. 1.2 2004/11/15 First official release. 1.3 2005/03/11 Add lead (Pb)-free and version package identification information on page 4 and in Table 64, on page 48. 1.4 2005/12/02 Update section 7.1.11 MX1A Record Select, page 14. Update section 13 Ordering Information, page 48.
Eight Channel AC’97 2.3 Audio Codec iii Track ID: JATR-1076-21 Rev. 1.4 Table of Contents
Eight Channel AC’97 2.3 Audio Codec iv Track ID: JATR-1076-21 Rev. 1.4
Eight Channel AC’97 2.3 Audio Codec v Track ID: JATR-1076-21 Rev. 1.4
Eight Channel AC’97 2.3 Audio Codec 1 Track ID: JATR-1076-21 Rev. 1.4 1. General Description Featuring four 16-bit two-channe l DACs and a stereo 16-bit ADC, the ALC850 is an AC’97 Rev 2.3 compatible eight-channel audio codec designed for PC multimedia systems. The ALC850 incorporates proprietary converter technology and fully meets performance requirements for PC99/2001 systems. Four pairs of stereo outputs, with 5-bit volume c ontrol and multiple stereo and mono inputs, along with flexible mixing, and gain and mute functions, provide a complete integr ated audio solution for PCs. The digital interface circuitry of the ALC850 operates from a low-power-consumption 3.3V power supply. Two integrated 50mW/20ohm headphone audio amplifie rs provide high-quality personal audio listening. Utilizing Universal Audio Jack® technology, Line-In and Mic-In can also serve as an amplified stereo Headphone-Out. In addition, the ALC850 is embedded w ith an impedance sensing capability to detect when a device has been connected to input or output jacks. The ALC850 integrates an on-board dual-PLL cl ock generator (14.318MHz and 24.576MHz), saving the cost of a 24.576MHz crystal. A PCBEEP generator is built-in and can be programmed by the BIOS to generate POST beeps without a buz zer. S/PDIF input and output func tions are also supported, offering easy connection of PCs to consumer electronic products such as AC3 decoders/s peakers, and mini disk devices. The ALC850 supports host/soft audio from Intel IC Hx chipsets, as well as audio controller-based VIA/SiS/ALi/AMD/nVIDIA/ATI chipsets. Bundled Windows series (98/ME/NT/2000/XP) and Linux drivers, EAX/Direct Sound 3D/I3DL2/A3D compa tible sound effect util ities (supporting Karaoke, 26 types of environment sound emulation, 10-band e qualizer), and HRTF 3D positional audio, providing an excellent entertainment package and game experience for PC users.
Eight Channel AC’97 2.3 Audio Codec 2 Track ID: JATR-1076-21 Rev. 1.4 2. Features Meets performance requirements for audio on PC99/2001 systems Complies with AC'97 Rev 2.3 specifications: Jack sensing on Front-Out, Surround-Out, Cen/LFE-Out, Surround-Back-Out, Mic-In, Line-In, and Front-Mic-In Clock input support options: 14.318MHz PLL (may be set to 24.576MHz) to eliminate crystal 12.288MHz BITCLK input Integrated PCBEEP generator Interrupt capability Page and analog Plug & Play registers Meets Microsoft WHQL/WLP 2.0 audio requirements Eight-channel DA converter (48kHz) Stereo AD converter (48kHz) Three analog line-level stereo inputs with 5-bit volume control: Line-In, CD, Aux High-quality differential CD input Two analog line-level mono inputs: PCBEEP, Phone-In Dedicated stereo Front-Mic input for front panel applications Line-In, Aux, and Mic-In can be shared with Surround-Out, Surround-Back-Out, and Cen/LFE-Out (FlexJack +20dB boost preamplifier for Mic input Both Front-Out and Surround-Out integrate 50mW/20ohm amplifiers External Amplifier Power Down (EAPD) Power management and enhanced power saving features Stereo Mic record for AEC/BF application Supports Power-Off CD operation Adjustable VREFOUT control Supports 48kHz S/PDIF output Supports 32/44.1/48kHz S/PDIF input Three Universal Audio Jacks (UAJ®): Front-Out, Line-In, and Mic-In Six Jack Detect pins for automatic jack sensing Power support: Digital: 3.3V Analog: 3.3V/5V Standard 48-pin LQFP package EAX™ 1.0 & 2.0 compatible Direct Sound 3D™ compatible A3D™ compatible I3DL2 compatible HRTF 3D positional audio 10-band Software Equalizer Voice cancellation and key shifting in Karaoke mode AVRack® Media Player Configuration Panel for enhanced user experience 3. System Applications Multimedia PCs PC games Information appliances (IA) Voice recognition Audio conferencing
Figure 1. Analog Mixer
Figure 2. Pin Assignments is shown in the location marked ‘V’.
Table 1. Digital I/O Pins
Table 2. Analog I/O Pins
Table 3. Filter/Reference Pins Table 4. Power/Ground Pins
Accessing odd numbered registers, or reading unimplemented registers, will return a 0. Table 5. Mixer Registers *: MX36 is the master volume control of CENTER/LFE output. MX38 is the master volume control of surround output.
default values. Reading this register returns the ID code of the specific part. Table 6. MX00 Reset
15 R Read as 0
9 R Read as 0 (Not 20-bit ADC)
8 R Read as 0 (Not 18-bit ADC)
7 R Read as 0 (Not 20-bit DAC)
6 R Read as 0 (Not 18-bit DAC)
5 R Read as 0 (No Loudness)
4 R Read as 0 (No True Line Level output)
3 R Read as 0 (No simulated stereo for analog 3D block use)
2 R Read as 0 (No Bass & Treble Control)
1 R Read as 0 (No Modem Line support)
Note: Writing any data into this register will reset all mixer registers to their default value. The written data is ignored. corresponds to a 1.5dB increase/decrease in volume. Table 7. MX02 (Front) Master Volume
15 R/W Mute Control
corresponds to a 1.5dB increase/decrease in volume. Table 8. MX06 Mono-Out Volume increase/decrease in volume. Sixteen levels of volume are available, from 0000 to 1111. that the POST codes can be heard during reset. Table 9. MX0A PC BEEP Volume The lowest tone is 48kHz/(255*4)=47Hz. The highest tone is 48kHz/(1*4)=12kHz.
0 Reserved
Table 10. MX0C PHONE Volume corresponds to a 20dB increase in volume. Table 11. MX0E MIC Volume
6 R/W 20dB Boost Control
increase/decrease in volume for the right channe l, allowing 32 levels of volume, from 00000 to 11111. 32 levels of volume, from 00000 to 11111. Table 12. MX10 LINE_IN Volume increase/decrease in volume for the right channe l, allowing 32 levels of volume, from 00000 to 11111. 32 levels of volume, from 00000 to 11111. Table 13. MX12 CD Volume
left channel, allowing 32 levels of volume, from 00000 to 11111. Table 14. MX16 AUX Input /Back-Surround Output Volume
- Each step in bits 12:8 corres ponds to a 1.5dB increase/decrease in volume for the left channel,
allowing 32 levels of volume, from 00000 to 11111. Table 15. MX18 PCM_OUT Volume
channel. Each bit in bits 10:8 selects a recording source for the left channel. Table 16. MX1A Record Select
Table 17. MX1C Record Gain DA input without involving the AC-Link, allowing for full system performance measurements. Table 18. MX20 General Purpose Register
8 R/W MIC Select
7 R/W AD to DA Loop-Back Control
Note: Bit 7 enables ADC to front DAC loop-back.
Table 19. MX24 Audio Interrupt and Paging
15 Interrupt Status, I4
14 R Interrupt Cause, I3
13 R Interrupt Cause, I2
12 R/W Sense Cycle, I1
11 R/W Interrupt Enable, I0
to determine exactly which subsections, if any, are ready. Table 20. MX26 Power Down Control/Status
15 R/W PR7 External Amplifier Power Down (EAPD)
13 R/W PR5
12 R/W PR4
11 R/W PR3
10 R/W PR2
9 R/W PR1
8 R/W PR0
3 R Vref Status
2 R Analog Mixer Status
1 R DAC Status
0 R ADC Status
Table 21. MX28 Extended Audio ID that are used to power down the Center, Surround, and LFE DACs respectively. Table 22. MX2A Extended Audio Status and Control Register
15 R/W Validity Configuration of S/PDIF Output (VCFG)
13 R/W Power Down LFE DAC (PRK)
12 R/W Power Down Surround DAC (PRJ)
11 R/W Power Down Center DAC (PRI)
10 R SPCV (S/PDIF Configuration Valid)
8 R LFE DAC Status (LDAC)
7 R Surround DAC Status (SDAC)
6 R Center DAC Status (CDAC)
2 R/W S/PDIF Enable
1 R/W DRA Enable
0 R/W VRA Enable
& SP ACV=1, otherwise S/PDIF output will be all zeros when MX2A.2=1 and SP ACV=0 (invalid). Table 23. MX2C PCM Front/Center Output Sample Rate
Table 24. MX2E PCM Surround Output Sample Rate Table 25. MX30 PCM LFE Output Sample Rate Table 26. MX32 PCM Input Sample Rate Table 27. MX36 LFE/Center Master Volume
15 R/W LFE Mute Control
7 R/W Center Mute Control
Table 28. MX38 Surround Master Volume
15 R/W Left Mute Control
7 R/W Right Mute Control
Table 29. MX3A S/PDIF Output Channel Status and Control
15 R/W Validity Control (control V bit in Sub-Frame)
14 Reserved
11 R/W Generation Level (LEVEL)
3 R/W Pre-Emphasis (PRE)
2 R/W Copyright (COPY)
1 R/W Non-Audio Data type (/AUDIO)
0 R Professional or Consumer format (PRO)
compatibility with mini discs. Table 30. S/PDIF Channel Status Table 31. S/PDIF Validity Control
These registers are available to Realtek customers for specialized functions. The data in MX60 are captured from the channel status [15:0] of the S/PDIF-IN signal. Table 32. MX60 S/PDIF Input Channel Status [15:0]
15 R Generation Level (LEVEL)
2 R Copyright (COPY)
1 R Non-Audio Data type (/AUDIO)
The data in MX62 are captured from the channel status [29:16] of the S/PDIF-IN signal. Table 33. MX62 S/PDIF Input Channel Status [29:15]
15 R ‘V’ bit in sub-frame of S/PDIFI, S/PDIFI_V
14 R S/PDIF-IN Input Signal Locked by hardware, S/PDIFI_LOCK
the S/PDIF input signal is unlocked. Software must check this ‘LOCK’ bit before dealing with S/PDIF input operations.
Table 34. MX64 Surround DAC Volume Table 35. MX66 Center/LFE DAC Volume
This register is used to control various parts of the ALC850 multi-channel functions. Table 36. MX6A Data Flow Control
15 RW SPDIF Input Enable
14 R/W SPDIF-In Monitoring Control
11 R/W PCM Data to AC-LINK
10 R/W AUX IN/Back Surround Output Control
9 R/W Analog Input Pass to Back Surround Control
8 R/W Front-MIC/Mono-Out Control
5 R/W Analog Input Pass to Center/LFE Control
4 R/W Analog Input Pass to Surround Control
0 R/W Surround Output Source
These registers are defined in AC’97 2.3 for sensing and analog plug and play functions. Table 37. MX62 PCI Sub System ID This register can be written once only after power on, and is not affected by an AC’97 cold reset. Table 38. MX64 PCI Sub Vendor ID This register can be written once only after power on, and is not affected by an AC’97 cold reset. Table 39. MX66 Sense Function Select These bits specify the type of audio function described in page ID 01h MX66, MX68, and MX6A.
0 R/W Tip or Ring Selection (T/R)
Table 40. MX68 Sense Function Information
4 R/W Information Valid bit, IV
0 R Function Information Present (FIP)
Table 41. MX6A Sense Detail
Table 42. MX76 GPIO & Interrupt Control
15 R/W Mute Control of Front-MIC1/2
11 R/W Vrefout3 Disable
7 R/W Vrefout2 Disable
Table 43. MX78 GPIO & Interrupt Status
12 R JD5 Input Status
11 R JD4 Input Status
9 R/W GPIO1 Primitiveness Control
8 R/W GPIO0 Primitiveness Control
7 R/W Pin 13 Function Selection
3 R/W Pin 47 Function Selection
2 R JD2 Input Status
1 R/W GPIO1(JD1) Input/Output Status
0 R/W GPIO0(JD0) Input/Output Status
Table 44. MX7A Miscellaneous Control
15 Reserved
14 R/W MIX Control
13 R/W CEN/LFE-OUT 1KΩ Control (C/LF-Control)
12 R/W Vrefout Disable
7 R/W
6 R/W
5 R/W
4 R/W
1 R/W SURR-OUT control
value 4790h, which is the third character of the Microsoft ID code. Table 45. MX7C Vendor ID1 Table 46. MX7E Vendor ID2
- Electrical Characteristics
Table 47. Absolute Maximum Ratings DVDD= 3.3V±5%, Tambient=25 oC, with 50pF external load. Table 48. Threshold Voltage
Table 49. Digital Filter Characteristics Dvdd= 3.3V, Tambient=250C, with 75Ω external load. Table 50. S/PDIF Output Characteristics Table 51. Cold Reset Figure 3. Cold Reset Timing
Table 52. Warm Reset Figure 4. Warm Reset Timing Table 53. AC-Link Clocks
Table 54. Data Output and Input Timing Note 1: Timing is for SDATA and SYNC outputs with respect to BIT_CLK at the device driving the output. Note: Timing is for SDATA and SYNC outputs with respect to BIT_CLK at the device driving the output. Note: Combined rise or fall plus flight times are provided for worst case scenario modeling purposes. Figure 5. Data Output and Input Timing
Table 55. Signal Rise and Fall Timing Figure 6. Signal Rise and Fall Timing
Table 56. AC-Link Low Power Mode Timing Figure 7. AC-Link Low Power Mode Timing
Table 57. ATE Test Mode Figure 8. ATE Test Mode Timing Table 58. AC-Link IO Pin Capacitance and Loading
Table 59. S/PDIF Output Figure 9. S/PDIF Output
- Analog Performance Characteristics
Table 60. Analog Performance Characteristics
Eight Channel AC’97 2.3 Audio Codec 41 Track ID: JATR-1076-21 Rev. 1.4 Parameter Minimum Typical Maximum Units Record Gain. 16 step: Step Size Gain Control Range 1.5 +22.5 dB dB Input Impedance (gain=0dB, mixer=off): LINE-IN, CD-IN, AUX-IN, MIC1/MIC2 PCBEEP, PHONE KΩ KΩ Output Impedance: Amplifier Outputs Outputs Without Amplifier 200 1000 Ω Ω Amplifier Maximum Output Power: @20Ω load mW Power Supply Current: VA = 5 . 0 V VA = 3 . 3 V VD=3.3V mA mA mA Power Down Current: V A=5.0V/3.3V VD=3.3V 7.8/5.3 mA mA Vrefout/Vrefout2/Vrefout3 - 2.50 4.0 V Vrefout Drive Current - 5 - mA
Table 61. Clocking *Pin-46 is internally pulled high by a weak resistor. **Low: Pulled low by a 0 ohm resistor. NC: Not Connected or pulled high. SDATA_IN on the rising edge of BIT_CLK. stuffs the unimplemented slot or bit with 0’s in SDATA_IN. Note that AC-LINK is MSB-justified. Refer to the AC’97 Component Specification, Revision 2.3, for details. Default ALC850 Slot Arrangement – Codec ID = 00 (the ALC850 supports primary mode only).
There are three types of reset operations: Cold, Register, and Warm. Table 62. Reset to guarantee that the ALC850 has reset successfully. example of differential CD input. Figure 10. Example of Differential CD Input
The ALC850 will return ‘0000h’ when odd-addressed and unimplemented registers are read. especially PR4 (power-down AC-link). Figure 11. Power-Down Control BIT_CLK, SDATA_IN, EAPD, and S/PDIFO to high impedance. Vendor specific test mode is not supported.
When a +5V analog power is supplied the ALC850 w ill turn on the CD-IN op-amp and output amplifier. operating mode is determined by +3.3VCC and +5VA. Table 63. Power-Off CD Function Circuitry
to guarantee that the ALC850 has reset successfully. Figure 12. Power-Off CD Function Circuitry software driver, Realtek should confirm modifications of application circuits.
Eight Channel AC’97 2.3 Audio Codec 47 Track ID: JATR-1076-21 Rev. 1.4 12. Mechanical Dimensions L See the Mechanical Dimensions notes on the next page.
Table 64. Ordering Information
- See page 4 for lead (Pb)-free package and version identification.
- Above parts are tested under AVDD =5.0V . If customers have lower AVDD request, please contact
Realtek sales representatives or agents.