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Document overview
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Technical content
Features
Low power architecture Self-adjusting power-saving modes for longer battery life High speed motion detection up to 20ips Self-adjusting frame rate for optimum performance Motion detect interrupt Finger detect interrupt Soft click and Tap detect interrupt Single Interrupt pin Optional PWM output to control LED driver to enable il- lumination feature when fi nger is on the sensor Optional switch input for center click function Internal oscillator – no clock input needed Selectable 125, 250, 500, 750, 1000 and 1250 cpi resolution Single 1.8V supply voltage for analog and digital Internal power up reset (POR) Selectable Input/Output voltage at 1.8V or 2.8V nominal 4-wire Serial peripheral interface (SPI) or Two wire in- terface (TWI) Integrated chip-on-board LED with wavelength of 870nm 17-pin FPC module
Applications
Finger input devices Mobile devices Integrated input devices Battery-powered input device PixArt customers purchasing the ADBM-350 OFN product are eligible to receive a royalty free license to our US patents 6977645, 6621483, 6950094, 6172354 and 7289649, for use in their end products. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. Pi xArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Pinout of ADBM-A350 Optical Sensor Pin Name Description Input/Output pin Function
1 GND_SHIELD Ground shield
2 GPIO General Purpose
I (Schmitt trigger input)/ O (CMOS output) Pin can be used for FPD output, PWM output or Dome/ Button click input. If confi gure as input do not leave pin unconnected
3 GND Ground
4 IO_NCS_A1 TWI address set
I (Schmitt trigger input) SPI : NCS (chip select) active low signal TWI Address Select, A1 Do no leave pin unconnected
5 IO_MISO_SDA TWI serial data
In SPI – CMOS output. In TWI – open drain I/O SPI : MISO (Master Input Slave Out) signal TWI : serial data signal
6 IO_MOSI_A0 TWI address set
I (Schmitt trigger input) SPI : MOSI (Master Out Slave In) signal TWI Address Select, A0 Do no leave pin unconnected
7 IO_CLK Serial clock input I (Schmitt trigger input) Serial clock signal
8 NRST Hardware Chip Reset I (Schmitt trigger input) Set to high when not used
9 DOME- Dome -
10 EVENT_INT Event Interrupt
(active low output) O (CMOS output) Open when not used Default active low signal, can be changed in Event control register 0x1d
11 SHTDWN Shutdown
(active high input) I (Schmitt trigger input) Set to low when not used Active high signal
12 NC No Connect No connection
13 VDD Voltage supply Supply 1.8V
14 DOME+ Dome +
15 IO_SELECT SPI / TWI Select I (Schmitt trigger input) TWI : GND or SPI : High
16 VDDIO Voltage supply
Supply 1.8V or 2.8V
17 NC No Connect No connection
Note: 1. NC pins can be tied to VDD, GND or left open/ unconnected. PixArt Imaging Inc. ADBM-A350 Optical Finger Navigation All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt I maging Inc. E-mail: fae_service@pixart.com.tw
Figure 1. Package outline drawing
0.30 Max (With Integrated Dome
- Dimension in millimeters.
- Dimensional tolerance: ±0.10mm.
- Brackets () indicate reference dimensions.
- Document Number: ADBM-A350-G8_001
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Note :- Dome + must be connected to MCU to detect button change state and Dome – can be connected to GND. Figure 2. Schematic diagram for interface between ADBM-A350 and 1.8V microcontroller via SPI
Passes FCC or CISPR 22 Class B emission limits when assembled following PixArt imaging recommendations. Passes IEC 61000-4-3 and IEC61000-4-6 Class A Immunity limits when assembled following PixArt Imaging recommendations. Absolute Maximum Ratings Parameter Symbol Minimum Maximum Units Notes Storage Temperature TS -40 85 °C Analog and Digital Supply Voltage VDD -0.5 2.1 V I/O Supply Voltage VDDIO -0.5 3.7 V ESD (sensor only) 2 kV All pins, human body model JESD22-A114-E Input Voltage VIN -0.5 VDD+0.5 VDDIO+0.5 V Latchup Current Iout 20 mA All Pins Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are the stress ratings only and functional operation of the device at these or any other condition beyond those indicated may aff ect device reliability. Recommended Operating Conditions Parameter Symbol Minimum Typical Maximum Units Notes Operating Temperature T A -20 70 °C Analog and Digital Supply Voltage [1] VDD 1.7 1.8 2.1 Volts Including V NA noise. voltages. See fi g 7. Power Supply Rise Time t VRT 0.001 10 ms 0 to VDD. At minimum rise time, s/’ Power Supply Off Time for Valid POR (Power on Reset) tOFF 10 ms Refer to section “POR During Power Cycling” Power Off Voltage Level for Valid POR (Power on Reset) V OFF 0 300 mV Refer to section “POR During Power Cycling” Supply Noise (Sinusoidal) V NA 100 mV p-p 10 kHz - 50 MHz Speed S 20 in/sec Using prosthetic fi nger as surface Transient Supply Current I DDT 80 mA Max supply current for 500 sec for each supply voltages ramp from 0 to 1.8 V Notes: 1. Operating temperature of less than -20°C down to -30°C, minimum VDD of 1.8V must be met. 2. To ensure minimum leakage current, VDDIO should be greater than or equal to VDD PixArt Imaging Inc. ADBM-A350 Optical Finger Navigation All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Electrical Characteristics over recommended operating conditions. Typical values at 25° C, VDD=VDDIO=1.8V. Parameter Symbol Minimum Typical Maximum Units Notes Motion Delay After Reset t MOT-RST 3.5 23 ms From Hard reset or SOFT_RESET register write to valid register write/read and motion, assuming motion is present Shutdown tSHTDWN 50 ms From SHTDWN pin active to low current Wake from Shutdown t WAKEUP 100 ms From SHTDWN pin inactive to valid motion. Refer to section “Notes on Shutdown” , also note t MOT-RST EVENT_INT Rise Time t r-EVENT_INT 150 300 ns C L = 100 pF EVENT_INT Fall Time t f-EVENT_INT 150 300 ns C L = 100 pF SHTDWN Pulse Width t P-SHTDWN 150 ms NRST Pulse Width t NRST 20 s From edge of valid NRST pulse Reset Wait Time After Stable Supply Voltage t VRT-NRST 100 ms Electrical Characteristics over recommended operating conditions. Typical values at 25° C, VDD=VDDIO=1.8V at default LED setting 13 mA. Parameter Typical Max Units Notes DC average supply current in Run mode I VDD 2.90 4.03 mA GPIO=SHTDWN=pull low, IO_MISO=NRST=pull high. DC average supply current in Rest1 mode I VDD 0.35 0.50 mA GPIO=SHTDWN=pull low, IO_MISO=NRST=pull high. DC average supply current in Rest2 mode I VDD 0.07 0.12 mA GPIO=SHTDWN=pull low, IO_MISO=NRST=pull high. DC average supply current in Rest3 mode I VDD 0.03 0.06 mA GPIO=SHTDWN=pull low, IO_MISO=NRST=pull high. Analog shutdown supply current I DDSHTDWN VDD 1.54 26.0 A GPIO=pull low, SHTDWN=IO_MISO=NRST=pull high. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Electrical Characteristics over recommended operating conditions. Typical values at 25° C, VDD=VDDIO=1.8V at default LED setting 13 mA. Parameter Symbol Minimum Typical Maximum Units Notes VDDIO DC Supply Current I V DDIO 20 A Digital peak supply current I PEAK VDD 10 mA LED+ peak supply current I PEAK LED+ 35 mA At LED register setting of 27 mA Input Low Voltage VIL -0.05 0 V DDIO*0.35 V IO_MOSI_A0, IO_CLK, IO_MISO_SDA, IO_NCS_A1, NRST, SHTDWN, IO_SELECT Input High Voltage V IH VDDIO * 0.7 V DDIO VDDIO+0.05 V IO_MOSI_A0, IO_CLK, IO_MISO_SDA, IO_NCS_A1, NRST, SHTDWN, IO_SELECT Input hysteresis V HYS 100 mV Input leakage current I leak ±1 ±10 A IO_MOSI_A0, IO_CLK, IO_MISO_SDA, IO_NCS_A1, NRST, SHTDWN, IO_SELECT Output Low Voltage V OL 0.2 V I out = 1.2 mA Output High Voltage V OH VDDIO-0.2 V DDIO-0.1 V Iout = 600 A Input Capacitance C in 10 pF MOSI, NCS, SCLK, SHTDWN Notes on Power-up Sequence Below is the power up sequence for ADBM-A350: 1. Apply power. 2. Set NCS pin high, Shutdown pin low. Set IO_Select pin to low (for TWI) or high (for SPI). 3. If in TWI mode, set A0 and A1 according to the Table TWI slave address in datasheet. This step is skipped if SPI mode is used. 4. Read Product ID to ensure sensor is powered up and communicating properly with host. 5. Write 0xC9 to address 0x61. Note on register settings Please refer to the OFN A350 fi rmware design guide for tuning of Speed Switching, Assert/De-assert, Finger Presence Detect and XY Quantization register settings. Notes on Shutdown and Reset The ADBM-A350 can be set in Shutdown mode by asserting or setting SHTDWN pin high. During the shutdown state, supply voltages VDD must be maintained above the minimum level. If these conditions are not met, then the sensor must be restarted by powering down then powering up again for proper operation. Any register settings must then be reloaded. During the shutdown state, supply voltage VDD must be maintained above the minimum level. For proper operation, SHTDWN pulse width must be at least t P-SHTDWN. Shorter pulse widths may cause the chip to enter an undefi ned state. In addition, the SPI or TWI port of the sensor should not be accessed when SHTDWN is asserted. Other devices on the same SPI bus can be accessed, as long as the sensor’s NCS pin is not asserted. The table below shows the state of various pins during shutdown. After deasserting SHTDWN, wait t WAKEUP before accessing the SPI port. Reinitializing the sensor from shutdown state will retain all register data that were written to the sensor prior to shutdown. The reset of the sensor via SOFT_RESET register or through the NRST pin would reset all registers to the default value. Any register settings must then be reloaded. Pin SHTDWN active IO_NCS_A1 Functional IO_MISO_SDA Undefi ned IO_CLK Undefi ned IO_MOSI_A0 Undefi ned XY_LED Low current EVENT_INT Undefi ned NRST High IO_Select SPI: High, TWI: Low GPIO Undefi ned Note: There are long wakeup times from shutdown. These features should not be used for power management during normal sensor motion. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. Pi xArt Imaging Inc. E-mail: fae_service@pixart.com.tw
OFF and tOFF. Refer to timing diagram below. Figure 3. Power on Reset during power cycling shown in the following table. Motion – Motion delta is present. settings of registers for these features. For power savings, the LED will not be continuously on. ADBM-A350 will fl ash the LED only when needed. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Bit(s) Name Reset Description Remarks 7:6 NRST_STATE 0x0 0x0: unknown 0x1: Low Invalid as the chip will be in reset state. 0x2: High 0x3: Hi-Z Indicate a fl oating high 5:4 SHUTDOWN_STATE 0x0 0x0: unknown 0x1: Low 0x2: High Invalid as the chip will be in shutdown state. 0x3: Hi-Z Indicate a fl oating low 3:2 GPIO_STATE 0x0 0x0: unknown 0x1: Low 0x2: High 0x3: Hi-Z 1:0 IO_SELECT_STATE 0x0 0x0: unknown 0x1: Low 0x2: High 0x3: Hi-Z For output pins (EVENT_INT, GPIO, MOSI and MISO) testing, fi rst enable bit-4 of PAD_FUNCTION (0x34) register. Then program or set the output state via PAD_ TEST_OUT register (0x33) and do a READ on the actual pin status. Actual pin status results should match the output set in PAD_TEST_OUT. (Note: SPI/TWI communica- tion will be disabled after this test is enabled. Once this test is completed, an external hardware reset on sensor is required) I/O Pin Status Test This feature allows the user to verify the connectivity and the state of the I/O pin. To run the test for input pins such as GPIO, SHUTDOWN, NRST and IO_SELECT, fi rst enable the PAD_Chk_On bit (or bit-1) of OFN_ENGINE2 (0x61) register. Then write any value to PAD_STATUS (0x31) register to start the test. Wait for ap- proximately 12us before reading the actual pin status and PAD_STATUS register. The test will be considered a PASS to indicate the sensor is responding accordingly if the actual pin status matches PAD_STATUS register content. Refer to the table below for I/O pin status defi nition. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Figure 4. Output pin status and Frame Start ognition, motion sensing applications and etc. following procedure is outlined below.
- Read sensor address 0x00 for correct product ID or PID.
- Write sensor address 0x3a with 0x5a hex.
- Provide a 24 MHz clock into GPIO pin at VDDIO level.
- Write sensor address 0x28 with 0x01 hex.
- Sensor will start to JNBHF dump with frame start for
- Write sensor address 0x3a with 0x5a hex to perform
*NBHF Dump Commands above will initiate JNBHF dump. go high for 4 clock cycles. This indicates pixel frame start. EVENT_INT pin is still high. This indicates pixel begin state. 361 pixels (19x19 pixel array) data is read. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Figure 5. Frame End inform the Host of the pixel end and frame end state. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
4-wire Serial Peripheral Interface (SPI) SPI Specifi cations Electrical Characteristics over recommended operating conditions. Typical values at 25° C, VDD = 1.8 V. Parameter Symbol Minimum Typical Maximum Units Notes Serial Port Clock Frequency fsclk 1 MHz Active drive, 50% duty cycle MISO rise time tr-MISO 150 300 ns C L = 100 pF MISO fall time t f-MISO 150 300 ns C L = 100 pF MISO delay after SCLK t DLY_MISO 120 ns From SCLK falling edge to MISO data valid, no load conditions MISO hold time t hold_MISO 0.5 1/fSCLK μs Data held until next falling SCLK edge MOSI hold time t hold_MOSI 200 ns Amount of time data is valid after SCLK rising edge MOSI setup time tsetup_MOSI 120 ns From data valid to SCLK rising edge SPI time between write commands t SWW 30 s From rising SCLK for last bit of the fi rst data byte, to rising SCLK for last bit of the second data byte. SPI time between write and read commands t SWR 20 s From rising SCLK for last bit of the fi rst data byte, to rising SCLK for last bit of the second address byte. SPI time between read and subsequent commands t SRW tSRR 500 ns From rising SCLK for last bit of the fi rst data byte, to falling SCLK for the fi rst bit of the address byte of the next command. SPI read address-data delay t SRAD 4 s From rising SCLK for last bit of the address byte, to falling SCLK for fi rst bit of data being read. NCS inactive after motion burst t BEXIT 500 ns Minimum NCS inactive time after motion burst before next SPI usage NCS to SCLK active t NCS-SCLK 120 ns From NCS falling edge to fi rst SCLK falling edge SCLK to NCS inactive (for read operation) t SCLK-NCS 120 ns From last SCLK rising edge to NCS rising edge, for valid MISO data transfer SCLK to NCS inactive (for write operation) t SCLK-NCS 20 us From last SCLK rising edge to NCS rising edge, for valid MOSI data transfer NCS to MISO high-Z t NCS-MISO 500 ns From NCS rising edge to MISO high-Z state PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
available for further use until burst-mode is terminated. data. The ADBM-A350 reads MOSI on rising edges of SCLK.
1 A61
Figure 6. Write Operation Figure 7. MOSI Setup and Hold Time high, the inputs are ignored and the output is tri-stated. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
ADBM-A350 uses a two-wire serial control interface compatible with I2C. The parameters are listed below. Electrical Characteristics over recommended operating conditions. Typical values at 25° C, VDD = 1.8 V.
- A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the V IHMIN of the SCL signal) to bridge the undefi ned
region of the falling edge of SCL.
- The maximum has t HD_DAT only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
- C B = total capacitance of one bus line in pF.
Table 1. TWI slave address transfer clock (SCL) signal and a serial data (SDA) signal. greater than the minimum timing. host at the host’s request. Data is sent in Eight-bit packets. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Figure 14. TWI Start and Stop operation acknowledge (NAK) is defi ned as 1. Command packets contain a 7-bit ADBM-A350 device address and an active low read/write bit (R/W). holding SCL high. Data transfers are terminated by driving SDA from low to high while SCL is held high. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Contains 8 data bits and may be sent by the host or the ADBM-A350. transmitted with the most signifi cant bit fi rst. Figure 15. Host packets A350’s ACK if it wants to start a new data transfer. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Figure 18. TWI single byte read All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
Figure 19. TWI polling registers using the ai bit example below. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
DATA_RDY interrupt pin and/or update bit in the STATUS register bit are set. In the example below, 3 bytes are read successively from registers 0x03, 0x04, and 0x05. Figure 20. TWI ai bit
1010111 STOP
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The ADBM-A350 registers are accessible via the serial port. The registers are used to read motion data and status as well as to set the device confi guration. Address Register Read/ Write Default Value Address Register Read/ Write Default Value 0x00 Product_ID R 0x88 0x40-0x5f Reserved 0x01 Revision_ID R 0x00 0x60 OFN_Engine1 R/W 0x84 0x02 EVENT R/W Any 0x61 OFN_Engine2 R/W 0x89 0x03 Delta_X R Any 0x62 Resolution R/W 0x22 0x04 Delta_Y R Any 0x63 Speed_Ctrl R/W 0x0e 0x05 SQUAL R Any 0x64 Speed_ST12 R/W 0x08 0x06 Shutter_Upper R Any 0x65 Speed_ST21 R/W 0x06 0x07 Shutter_Lower R Any 0x66 Speed_ST23 R/W 0x40 0x08 Maximum_Pixel R Any 0x67 Speed_ST32 R/W 0x08 0x09 Pixel_Sum R Any 0x68 Speed_ST34 R/W 0x48 0x0a Minimum_Pixel R Any 0x69 Speed_ST43 R/W 0x0a 0x0b Pixel_Grab R/W Any 0x6a Speed_ST45 R/W 0x50 0x0c CRC0 R 0x00 0x6b Speed_ST54 R/W 0x48 0x0d CRC1 R 0x00 0x6c GPIO_CTRL R/W 0x80 0x0e CRC2 R 0x00 0x6d AD_CTRL R/W 0xc4 0x0f CRC3 R 0x00 0x6e AD_ATH_HIGH R/W 0x3a 0x10 Reserved W 0x00 0x6f AD_DTH_HIGH R/W 0x40 0x11 Reserved 0x70 AD_ATH_LOW R/W 0x35 0x12 BUTTON_STATUS R/W 0x00 0x71 AD_DTH_LOW R/W 0x3b 0x13 Run_Downshift R/W 0x04 0x72 QUANTIZE_CTRL R/W 0x99 0x14 Rest1_Period R/W 0x01 0x73 XYQ_THRESH R/W 0x02 0x15 Rest1_Downshift R/W 0x1f 0x74 MOTION_CTRL R/W 0x00 0x16 Rest2_Period R/W 0x09 0x75 FPD_CTRL R/W 0xfa 0x17 Rest2_Downshift R/W 0x2f 0x76 FPD_THRESH R/W 0x2c 0x18 Rest3_Period R/W 0x31 0x77 ORIENT_CTRL R/W 0x00 0x19 Reserved 0x78 FPD_SQUAL_THRESH R/W 0x40 0x1a LED_CTRL R/W 0x00 0x79 FPD_VALUE R/W 0x00 0x1b Reserved 0x7a FPD_STATUS R 0x20 0x1c IO_Mode R/W 0x00 0x7b SC_CTRL R/W 0x25 0x1d EVENT_CTRL R/W 0x04 0x7c SC_T_TAPNHOLD R/W 0x45 0x28 *NBHe_Dump R/W 0x00 0x7d SC_T_DOUBLE R/W 0x1e 0x2e Observation R/W Any 0x7e SC_DELTA_THRESH R/W 0x19 0x31 Pad_Status R 0x00 0x7f SC_STATUS R/W 0x00 0x32 Reserved 0x33 Pad_Test_Out RW 0x00 0x34 Pad_Function W 0x00 0x3a SOFT_RESET W 0x00 0x3b Shutter_Max_Hi R/W 0x0b 0x3c Shutter_Max_Lo R/W 0x71 0x3d Reserved 0x3e Inverse_Revision_ID R 0xFF 0x3f Inverse_Product_ID R 0x77 PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw
Product_ID Address: 0x00 Access: Read Reset Value: 0x88 Bit 7 6 5 4 3 2 1 0 Field PID7 PID 6 PID5 PID 4 PID 3 PID2 PID1 PID0 Data Type: 8-Bit unsigned integer. USAGE: This register contains a unique identifi cation assigned to the ADBM-A350. The value in this register does not change; it can be used to verify that the serial communications link is functional. Revision_ID Address: 0x01 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field RID7 RID 6 RID5 RID 4 RID 3 RID2 RID1 RID0 Data Type: 8-Bit unsigned integer. USAGE: This register contains the IC revision. It is subject to change when new IC versions are released. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
EVENT Address: 0x02 Access: Read/Write Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field MOT PIXRDY PIXFIRST OVFL RESET_ST BUT_CLICK SOFT_CLICK FPD Data Type: Bit fi eld. USAGE: Event detect register (0x02) allows user to determine if any event interrupts (FPD, Motion, Soft click or Button click) has occurred since the last time it was read. If the MOT bit is set, then the user should read registers 0x03 and 0x04 to get the accumulated motion. Read this register before reading the Delta_Y and Delta_X registers. Writing anything to this register clears the MOT and OVFL bits, Delta_Y and Delta_X registers. The written data byte is not saved. Internal buff ers can accumulate more than eight bits of motion for X or Y. If any of the internal buff ers overfl ow, then absolute path data is lost and the OVFL bit is set. This bit is cleared once some motion has been read from the Delta_X and Delta_Y registers, and if the buff ers are not at full scale. Since more data is present in the buff ers, the cycle of reading the Event, Delta_X and Delta_Y registers should be repeated until the motion bit (MOT) is cleared. If the Event register has not been read for long time, at 500 cpi it may take up to 16 read cycles to clear the buff ers, at 1000 cpi, up to 32 cycles. To clear an overfl ow, write anything to this register. The PIXRDY bit will be set whenever a valid pixel data byte is ready and available in the Pixel_Dump register. Check that this bit is set before reading from Pixel_Dump. To ensure that the Pixel_Grab pointer has been reset to pixel 0,0 on the initial write to Pixel_Grab, check to see if PIXFIRST is set to high. Field Name Description MOT Motion since last report 0 = No motion 1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers Bit reset when motion data in Delta_X and Delta_Y registers are cleared PIXRDY Pixel Dump data byte is available in Pixel_Dump register 0 = data not available 1 = data available PIXFIRST This bit is set when the Pixel_Grab register is written to or when the complete pixel array has been read, initiating an increment to pixel 0,0. 0 = Pixel_Grab data not from pixel 0,0 1 = Pixel_Grab data is from pixel 0,0 OVF Motion overfl ow, Y and/or X buff er has overfl owed since last report 0 = no overfl ow 1 = Overfl ow has occurred RESET_ST Reset status bit. Any internal or external reset will set this bit. Write anything to this register to clear it. 0 = No reset 1 = Reset occurred BUT_CLICK Button click report 0 = No Button click 1 = Button click occurred Bit clear or reset by reading BUTTON_STATUS (0x12) register SOFT_CLICK Soft click report 0 = No Soft click 1 = Soft click occurred Bit clear or reset by reading SC_STATUS (0x7F) register FPD Finger presence detect bit reports a change in fi nger state (fi nger on to fi nger off and vice versa) 0 = No fi nger state change detected 1 = Finger state change detected Bit clear or reset by reading FPD_STATUS (0x7A) register PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Delta_X Address: 0x03 Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field Y7 Y 6 Y5 Y 4 Y 3 Y2 Y1 Y0 Data Type: Eight bit 2’s complement number. USAGE: X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. Delta_Y Address: 0x04 Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field X7 X 6 X5 X 4 X 3 X2 X1 X0 Data Type: Eight bit 2’s complement number. USAGE: Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register. 00 01 02 7E 7FFF FE81Delta_X +127+126-1 -2-127Motion +1 +20 NOTES: PixArt RECOMMENDS that registers 0x03 and 0x04 be read sequentially. 00 01 02 7E 7FFF FE81Delta_X +127+126-1 -2-127Motion +1 +20 NOTES: PixArt RECOMMENDS that registers 0x03 and 0x04 be read sequentially. SQUAL Address: 0x05 Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field SQ7 SQ 6 SQ5 SQ 4 SQ 3 SQ2 SQ1 SQ0 Data Type: Upper 8 bits of a 9-bit unsigned integer. USAGE: SQUAL (Surface Quality) is a measure of the number of valid features visible by the sensor in the current frame. The maximum SQUAL register value is 167. Since small changes in the current frame can result in changes in SQUAL, variations in SQUAL when looking at a surface are expected. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Shutter_Upper Address: 0x06 Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field S15 S14 S13 S12 S 11 S10 S9 S8 Shutter_Lower Address: 0x07 Access: Read Reset Value: Undefi ned Bit 7 6 5 4 3 2 1 0 Field S7 S 6 S5 S 4 S 3 S2 S1 S0 Data Type: Sixteen bit unsigned integer. USAGE: Units are clock cycles. Read Shutter_Upper fi rst, then Shutter_Lower. They should be read consecutively. The shutter is adjusted to keep the average and maximum pixel values within normal operating ranges. The shutter value is automatically adjusted. Maximum_Pixel Address: 0x08 Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field MP7 MP 6 MP5 MP 4 MP 3 MP2 MP1 MP0 Data Type: Eight-bit number. USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = 254. The maximum pixel value can vary with every frame. Pixel_Sum Address: 0x09 Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field AP7 AP 6 AP5 AP 4 AP 3 AP2 AP1 AP0 Data Type: High 8 bits of an unsigned 17-bit integer. USAGE: This register is used to fi nd the average pixel value. It reports the seven bits of a 16-bit counter, which sums all pixels in the current frame. It may be described as the full sum divided by 512. To fi nd the average pixel value, use the following formula: Average Pixel = Register Value * 128/121 = Register Value * 1.06 The maximum register value is 240. The minimum is 0. The pixel sum value can change every frame. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Minimum_Pixel Address: 0x0a Access: Read Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field MP7 MP 6 MP5 MP 4 MP 3 MP2 MP1 MP0 Data Type: Eight-bit number. USAGE: Minimum Pixel value in current frame. Minimum value = 0, maximum value = 254. The minimum pixel value can vary with every frame. Pixel_Grab Address: 0x0b Access: Read/Write Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field PD7 PD 6 PD5 PD 4 PD 3 PD2 PD1 PD0 Data Type: Eight-bit word. USAGE: For test purposes, the sensor will read out the contents of the pixel array, one pixel per frame. To start a pixel grab, write anything to this register to reset the pointer to pixel 0,0. Then read the PIXRDY bit in the Motion register. When the PIXRDY bit is set, there is valid data in this register to read out. After the data in this register is read, the pointer will automatically increment to the next pixel. Reading may continue indefi nitely; once a complete frame’s worth of pixels has been read, PIXFIRST will be set to high to indicate the start of the fi rst pixel and the address pointer will start at the beginning location again. The pixel map address and corresponding sensor orientation is shown below. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
CRC2 Address: 0x0e Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field CRC27 CRC2 6 CRC25 CRC2 4 CRC2 3 CRC22 CRC21 CRC20 Data Type: Eight-bit number USAGE: Register 0x0e reports the third byte of the system self test results. See Self Test register 0x10. CRC3 Address: 0x0f Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field CRC37 CRC3 6 CRC35 CRC3 4 CRC3 3 CRC32 CRC31 CRC30 Data Type: Eight-bit number USAGE: Register 0x0f reports the fourth byte of the system self test results. See Self Test register 0x10. CRC0 Address: 0x0c Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field CRC07 CRC0 6 CRC05 CRC0 4 CRC0 3 CRC02 CRC01 CRC00 Data Type: Eight-bit number USAGE: Register 0x0c reports the fi rst byte of the system self test results. See Self Test register 0x10. CRC1 Address: 0x0d Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field CRC17 CRC1 6 CRC15 CRC1 4 CRC1 3 CRC12 CRC11 CRC10 Data Type: Eight-bit number USAGE: Register 0x0d reports the second byte of the system self test results. See Self Test register 0x10. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw Self_Test Address:3FTFSWFE Access: Write Reset Value: 3FTFSWFE
Run_Downshift Address: 0x13 Access: Read/Write Reset Value: 0x04 Bit 7 6 5 4 3 2 1 0 Field RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 This register set the Run to Rest 1 downshift time. Run Downshift time = RD[7:0] x 8 x Run_rate. Default value: 4 x 8 x 8 ms = 256 ms Min: 2 x 8 x 8 ms = 128 ms Max: 242 x 8 x 8 ms = 15,488 ms = 15.49 s All the above values are calculated base on 25 MHz System clock. Rest1_Period Address: 0x14 Access: Read/Write Reset Value: 0x01 Bit 7 6 5 4 3 2 1 0 Field R1R7 R1R6 R1R5 R1R4 R1R3 R1R2 R1R1 R1R0 This register set the Rest 1 frame rate. Rest1 frame rate = (R1R[7:0] + 1) x 10 ms. Default value: 2 x 10 ms = 20 ms Min: 2 x 10 ms = 20 ms Max: 241 x 10 ms = 2,410 ms = 2.41 s All the above values are calculated base on 100 Hz Hibernate clock. BUTTON_STATUS Address: 0x12 Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Assert count Assert count Deassert count Deassert count Reserved Reserved Reserved But_Status Data Type: Bit fi eld USAGE: Register 0x12 allows the user to read button status. Writing any value to this register will restart the counter. Field Name Description Assert count 7:6 Counts for number of times the button state change from 0 to 1 Deassert count 5:4 Counts for number of times the button state change from 1 to 0 But_Status Button current status PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Rest2_Period Address: 0x16 Access: Read/Write Reset Value: 0x09 Bit 7 6 5 4 3 2 1 0 Field R2R7 R2R6 R2R5 R2R4 R2R3 R2R2 R2R1 R2R0 This register set the Rest 2 frame rate. Rest2 frame rate = (R2R[7:0] + 1) x 10 ms. Default value: 10 x 10 ms = 100 ms Min: 2 x 10 ms = 20 ms Max: 241 x 10 ms = 2,410 ms = 2.41 s All the above values are calculated base on 100 Hz Hibernate clock. Rest2_Downshift Address: 0x17 Access: Read/Write Reset Value: 0x2f Bit 7 6 5 4 3 2 1 0 Field R2D7 R2D6 R2D5 R2D4 R2D3 R2D2 R2D1 R2D0 This register set the Rest 2 to Rest 3 downshift time. Rest2 Downshift time = R2D[7:0] x 128 x Rest2_Rate. Default value: 47 x 128 x 100 ms (Rest2_Rate default) = 601.6 s = 10 min Min: 1 x 128 x 20 ms (Rest2_Rate min) = 2560 ms = 2.56 s Max: 242 x 128 x 2.56 s (Resr2_Rate max) = 79,298 s = 1,321 min = 22 hrs All the above values are calculated base on 100 Hz Hibernate clock. Rest1_Downshift Address: 0x15 Access: Read/Write Reset Value: 0x1f Bit 7 6 5 4 3 2 1 0 Field R1D7 R1D6 R1D5 R1D4 R1D3 R1D2 R1D1 R1D0 This register set the Rest 1 to Rest 2 downshift time. Rest1 Downshift time = R1D[7:0] x 16 x Rest1_Rate. Default value: 31 x 16 x 20 ms (Rest1_Rate default) = 9,920 ms = 9.92 s Min: 1 x 16 x 20 ms (Rest1_Rate min) = 320 ms Max: 242 x 16 x 2.56 s (Rest1_Rate max) = 9,912 s = 165 min = 2.75 hr All the above values are calculated base on 100 Hz Hibernate clock. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Reserved Address: 0x19 LED_Control Address: 0x1a Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Reserved LED_On LED2 LED1 LED0 Data Type: Bit fi eld USAGE: Register 0x1a allows the user to change the LED drive current of the sensor. Field Name Description LED_On 0 = LED normal operation 1 = LED always On LED2:0 0x00 = 13 mA 0x02 = 9.6 mA 0x07 = 27 mA Reserved Address: 0x1b Rest3_Period Address: 0x18 Access: Read/Write Reset Value: 0x31 Bit 7 6 5 4 3 2 1 0 Field R3R7 R3R6 R3R5 R3R4 R3R3 R3R2 R3R1 R3R0 This register set the Rest 3 frame rate. Rest3 frame rate = (R3R[7:0] + 1) x 10 ms. Default value: 50 x 10 ms = 500 ms Min: 2 x 10 ms = 20 ms Max: 241 x 10 ms = 2,410 ms = 2.41 s All the above values are calculated base on 100 Hz Hibernate clock. PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
EVENT_CTRL Address: 0x1d Access: Read/Write Reset Value: 0x04 Bit 7 6 5 4 3 2 1 0 Field Event_ Active_Set Reserved Reserved Reserved SFCL FPD BCL MOT Data Type: Bit fi eld USAGE: Register 0x1d allows the user to confi gure and control the Event_Int output pin. By default, FPD interrupt is disabled while all other interrupts enabled. Field Name Description Event_Active_Set Event_Int pin setting 0 = Active-low Output 1 = Active-high Output SFCL 1 = Disable Soft click interrupt 0 = Enable Soft Click interrupt FPD 1 = Disable Finger Presence Detection (FPD) interrupt 0 = Enable fi nger presence detection interrupt BCL 1 = Disable Button click interrupt 0 = Enable Button Click interrupt MOT 1 = Disable Motion interrupt 0 = Enable Motion interrupt IO_Mode Address: 0x1c Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Burst Reserved SPI Reserved TWI Data Type: Bit fi eld USAGE: Register 0x1c allows the user to read the Input or Output mode of the sensor. Field Name Description Burst Burst mode 0 = not in burst mode 1 = In Burst mode SPI SPI mode 0 = not in SPI mode 1 = In SPI mode TWI TWI mode 0 = not in TWI mode 1 = In TWI mode PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
Observation Address: 0x2e Access: Read/Write Reset Value: Any Bit 7 6 5 4 3 2 1 0 Field MODE1 MODE0 Reserved Reserved Reserved Reserved Reserved Reserved Data Type: Bit fi eld USAGE: Register 0x2e provides bits that are set every fr ame. It can be used during ESD testing to check that the chip is running correctly. Writing anything to this register will clear the bits. Field Name Description MODE1-0 Mode Status: Reports which mode the sensor is in. 00 = Run 01 = Rest1 10 = Rest2 11 = Rest3 Address: 0x28 Ac cess: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Reserved Reserved Reserved Reserved FVD Data Type: Bit fi eld USAGE: This register is used to enable and initiating Fast *NBHF Dump. See note on *NBHF Dump for more information. Field Name Description FVD 0: Disable FVD 1: Enable FVD PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
PAD_STATUS Address: 0x31 Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field NRST_ST1 NRST_ST0 SHTDWN_ ST1 SHTDWN_ ST GPIO_ST1 GPIO_ST0 IOSEL_ST1 IOSEL_ST0 Data Type: Bit fi eld USAGE: This register is used to read or check on pin status. Field Name Description NRST_ST1-0 NRST Pin State 0x0 = Unknown 0x1= Low (Invalid as the chip will be in reset state) 0x2 = High (Indicate a fl oating high) 0x3 = Hi-Z SHTDWN_ST 1-0 SHTDWN Pin State 0x0 = Unknown 0x1= Low 0x2 = High (Invalid as chip will be in shutdown state) 0x3 = Hi-Z GPIO_ST 1-0 GPIO Pin State 0x0 = Unknown 0x1= Low 0x2 = High 0x3 = Hi-Z IOSEL_ST 1-o IO_SELECT Pin State 0x0 = Unknown 0x1= Low 0x2 = High 0x3 = Hi-Z Reserved Address: 0x32 PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw
SOFT_RESET Address: 0x3a Access: Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field RST7 RST6 RST5 RST4 RST3 RST2 RST1 RST0 Data Type: 8-bit integer USAGE: Write 0x5A to this register to reset the chip. All settings will revert to default values. PAD_TEST_OUT Address: 0x33 Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Reserved EVENT_O GPIO_O MOSI_O MISO_O Data Type: Bit fi eld USAGE: This register is used to set the state of the output pin. Field Name Description EVENT_O Set state for EVENT_INT output pin 0x0: Low 0x1: High GPIO_O Set state for GPIO_O output pin 0x0: Low 0x1: High MOSI_O Set state for MOSI_O output pin 0x0: Low 0x1: High MISO_O Set state for MISO_O output pin 0x0: Low 0x1: High PAD_FUNCTION Address: 0x34 Access: Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved OUT_ TEST_EN Reserved Reserved Reserved Reserved Data Type: Bit fi eld USAGE: This register is used to enable output pin testing. Field Name Description OUT_TEST_EN Enable Output Pin Test All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
Shutter_Max_Hi Address: 0x3b Access: Read/Write Reset Value: 0x0b Bit 7 6 5 4 3 2 1 0 Field SMH7 SMH6 SMH5 SMH4 SMH3 SMH2 SMH1 SMH0 Data Type: 8-Bit integer USAGE: This value is the upper 8-bit of shutter maximum open time. Shutter value represents pixel array exposure time in multiples of internal clock cycles with maximum value at 2929 decimal. Shutter_Max_Lo Address: 0x3c Access: Read/Write Reset Value: 0x71 Bit 7 6 5 4 3 2 1 0 Field SML7 SML6 SML5 SML4 SML3 SML2 SML1 SML0 Data Type: 8-Bit integer USAGE: This value is the lower 8-bit of shutter maximum open time. Shutter value represents pixel array exposure time in multiples of internal clock cycles. Reserved Address: 0x3d Inverse_Revision_ID Address: 0x3e Access: Read Reset Value: 0xFF Bit 7 6 5 4 3 2 1 0 Field NRID7 NRID6 NRID5 NRID4 NRID3 NRID2 NRID1 NRID0 Data Type: Inverse 8-Bit unsigned integer USAGE: This value is the inverse of the Revision_ID. It can be used to test the SPI port. Inverse_Product_ID Address: 0x3f Access: Read Reset Value: 0x77 Bit 7 6 5 4 3 2 1 0 Field NPID7 NPID6 NPID5 NPID4 NPID3 NPID2 NPID1 NPID0 Data Type: Inverse 8-Bit unsigned integer USAGE: This value is the inverse of the Product_ID. It can be used to test the SPI port. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
Reserved Address: 0x40-0x5f OFN_Engine1 Address: 0x60 Access: Read/Write Reset Value: 0x84 Bit 7 6 5 4 3 2 1 0 Field Engine Speed Assert/ Deassert XYQ Soft_Click FPD_En XY_Scale PWM Data Type: Bit fi eld USAGE: This register is used to set several properties of the sensor. Field Name Description Engine Master control of OFN engine. Need to enable this bit to enable the rest of OFN features and properties 0 = Disable OFN properties 1 = Enable OFN properties Speed_En Speed switching enable/disable bit 0 = Disable speed switching 1 = Enable speed switching Assert/ Deassert Assert/ Deassert mode enable/disable bit 0 = Disable Assert/Deassert 1 = Enable Assert/Deassert XY Q XY quantization enable/disable bit 0 = Disable quantization 1 = Enable quantization Soft_Click Soft click enable/disable bit 0 = Disable soft click 1 = Enable soft click FPD_En Finger presence detection enable/disable bit 0 = Disable fi nger presence detection 1 = Enable fi nger presence detection XY_Scale XY scaling factor enable/disable bit 0 = Disable scaling 1 = Enable scaling PWM Pulse Width Modulation function enable/disable bit 0 = Disable PWM 1 = Enable PWM All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
Resolution Address: 0x62 Access: Read/Write Reset Value: 0x32 Bit 7 6 5 4 3 2 1 0 Field WakeRES3 WakeRES2 WakeRES1 WakeRES0 RES3 RES2 RES1 RES0 Data Type: Bit fi eld USAGE: This register is used to set several properties of the sensor. Field Name Description WakeRES3:0 Sets resolution when sensor wakes up from rest modes. Eff ective only when speed switching is enabled. 0x00 : 125 cpi 0x05 : 1250 cpi 0x01 : 250 cpi 0x02 : 500 cpi 0x03 : 750 cpi 0x04 : 1000 cpi RES 3:0 Sets resolution of sensor. 0x00 : 125 cpi 0x05 : 1250 cpi 0x01 : 250 cpi 0x02 : 500 cpi 0x03 : 750 cpi 0x04 : 1000 cpi If Speed switching is enabled, resolution is automatically switched from 250-500-750-1000-1250. If speed switching is disabled, this register can be set to any of the available settings from 0x0 to 0x5. OFN_Engine2 Address: 0x61 Access: Read/Write Reset Value: 0x89 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved FPD_Rest_ Wake1 FPD_Rest_ Wake0 FPD_Mot_ Cut Reserved PAD_Chk On FPD_SQ_EN Data Type: Bit fi eld USAGE: This register is used to set several properties of the sensor related to FPD function. Field Name Description FPD_Rest_Wake1:0 Wakes up from rest with FPD 0 = FPD rest wake up disabled 1 = Wake up when fi nger is present OR motion is detected 2 = Wake up when fi nger is present AND motion is detected FPD_Mot_Cut In FPD enabled mode, cut off motion when fi nger is not detected and shutter is below preset value. Shutter preset value can confi gured by SHUT_CUTOFF_THRES in FPD_CTRL (register 0x75). 0 = Disable FPD_Mot_Cut 1 = Enable FPD_Mot_Cut PAD_Chk_On Enable this bit for PAD_STATUS check FPD_SQ_EN To improve FPD on low refl ectance surface by comparing the instantaneous Squal value with a threshold set in FPD_SQUAL_THRESH (register 0x78). 0 = Disable FPD_SQ_EN 1 = Enable FPD_SQ_EN All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
Speed_Ctrl Address: 0x63 Access: Read/Write Reset Value: 0x0E Bit 7 6 5 4 3 2 1 0 Field SEL_XY XY_scale2 XY_scale1 XY_scale0 SP_IntVal1 SP_IntVal0 Reserved Reserved Data Type: Bit fi eld USAGE: This register is used to set several properties of the sensor. Field Name Description Sel_XY Select X or Y scale 0 = Enable X scale 1 = Enable Y scale XY_scale 2:0 Set scaling factor 0 = 0% 4 = 50% 2 = 25% 6 = 75% SPIntVal 1:0 Speed switching checking interval 0x00: 4 ms 0x01: 8 ms 0x02: 12 ms 0x03: 16 ms Speed_ST12 Address: 0x64 Access: Read/Write Reset Value: 0x08 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 1 to 2. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 Speed_ST21 Address: 0x65 Access: Read/Write Reset Value: 0x06 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 2 to 1. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
Speed_ST23 Address: 0x66 Access: Read/Write Reset Value: 0x40 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 2 to 3. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 OFN_Speed_ST32 Address: 0x67 Access: Read/Write Reset Value: 0x08 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 3 to 2. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 OFN_Speed_ST34 Address: 0x68 Access: Read/Write Reset Value: 0x48 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 3 to 4. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
Speed_ST45 Address: 0x6a Access: Read/Write Reset Value: 0x50 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 4 to 5. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 Speed_ST43 Address: 0x69 Access: Read/Write Reset Value: 0x0a Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 4 to 3. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 Speed_ST54 Address: 0x6b Access: Read/Write Reset Value: 0x48 Bit 7 6 5 4 3 2 1 0 Field ST ST ST ST ST ST ST ST Data Type: Bit fi eld USAGE: This register is used to set several speed switching properties of the sensor. Field Name Description ST 7:0 Sets resolution switching from step 5 to 4. Write in hexadecimal value. Formula (in decimal) = Velocity (inch per second) * 8 All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
AD_CTRL Address: 0x6d Access: Read/Write Reset Value: 0xc4 Bit 7 6 5 4 3 2 1 0 Field 1 1 Reserved Reserved ST_HIGH 3 ST_HIGH2 ST_HIGH1 ST_HIGH0 Data Type: Bit fi eld USAGE: This register is used to control Assert De-assert. Must write 1to bit 7 and 6. Field Name Description ST_HIGH3:0 High speed defi nition. Any steps equal to or above this setting will use high speed A/D threshold. GPIO_CTRL Address: 0x6c Access: Read/Write Reset Value: 0x80 Bit 7 6 5 4 3 2 1 0 Field GPIO_ Active_Set Reserved GPIO_ Mode5 GPIO_ Mode4 PWM_ Thres3 PWM_ Thres2 PWM_Sel1 PWM_Sel0 Data Type: Bit fi eld USAGE: This register is used to set GPIO and PWM control. Field Name Description GPIO_Active_Set 0 = GPIO is active LOW output 1 = GPIO is active HIGH output GPIO_Mode5:4 0 = Output FPD 1 = Output PWM 2 = Mechanical button input PWM_Thres3:2 Start PWM only when Delta_X + Delta_Y is greater than threshold in Speed mode (Speed bit below). 0 = delta > 0 1 = delta > 8 2 = delta > 16 3 = delta >24 PWM_Sel1:0 0 = Finger On/Off , light up in 1 sec 1 = Finger On/Off , light up in 2 sec 2 = Finger On/Off , light up in 3 sec 3 = Speed All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
AD_ATH_HIGH Address: 0x6e Access: Read/Write Reset Value: 0x3a Bit 7 6 5 4 3 2 1 0 Field ATH_H ATH_H ATH_H ATH_H ATH_H ATH_H ATH_H ATH_H Data Type: Bit fi eld USAGE: This register is used to set HIGH speed Assert shutter threshold. Field Name Description ATH_H 7:0 Sets HIGH speed assert threshold. Write in hexadecimal value. Formula (in decimal) = Shutter value / 8. It is recommended to have hysteresis of 60 to 100 between assert and de-assert threshold. AD_DTH_HIGH Address: 0x6f Access: Read/Write Reset Value: 0x40 Bit 7 6 5 4 3 2 1 0 Field DTH_H DTH_H DTH_H DTH_H DTH_H DTH_H DTH_H DTH_H Data Type: Bit fi eld USAGE: This register is used to set HIGH speed De-assert shutter threshold. Field Name Description DTH_H 7:0 Sets HIGH speed de-assert threshold. Write in hexadecimal value. Formula (in decimal) = Shutter value / 8. It is recommended to have hysteresis of 60 to 100 between assert and de-assert threshold. AD_ATH_LOW Address: 0x70 Access: Read/Write Reset Value: 0x35 Bit 7 6 5 4 3 2 1 0 Field ATH_L ATH_L ATH_L ATH_L ATH_L ATH_L ATH_L ATH_L Data Type: Bit fi eld USAGE: This register is used to set LOW speed Assert shutter threshold. Field Name Description ATH_L 7:0 Sets LOW speed assert threshold. Write in hexadecimal value. Formula (in decimal) = Shutter value / 8. It is recommended to have hysteresis of 60 to 100 between assert and de-assert threshold. All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
AD_DTH_LOW Address: 0x71 Access: Read/Write Reset Value: 0x3b Bit 7 6 5 4 3 2 1 0 Field DTH_L DTH_L DTH_L DTH_L DTH_L DTH_L DTH_L DTH_L Data Type: Bit fi eld USAGE: This register is used to set LOW speed De-assert shutter threshold. Field Name Description DTH_L 7:0 Sets LOW speed de-assert threshold. Write in hexadecimal value. Formula (in decimal) = Shutter value / 8. It is recommended to have hysteresis of 60 to 100 between assert and de-assert threshold. QUANTIZE_CTRL Address: 0x72 Access: Read/Write Reset Value: 0x99 Bit 7 6 5 4 3 2 1 0 Field YQ_ON YQ_DIV 6 YQ_DIV5 YQ_DIV4 XQ_ON XQ_DIV 2 XQ_DIV1 XQ_DIV0 Data Type: Bit fi eld USAGE: This register is used to set quatization for Delta_X and Delta_Y. If both X and Y quantization modes are on, then only largest quantized X or Y will be reported. Field Name Description YQ_ON 0 = Y quantization off 1 = Y quantization On YQ_DIV6:4 Quantization factor 2YQ_DIV . Reported YQ = DY / 2YQ_DIV . XQ_ON 0 = X quantization off 1 = X quantization On XQ_DIV2:0 Quantization factor 2XQ_DIV . Reported XQ = DX / 2XQ_DIV . XYQ_THRESH Address: 0x73 Access: Read/Write Reset Value: 0x02 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Reserved Reserved XYQ_M XYQ_C 1 XYQ_C0 Data Type: Bit fi eld USAGE: This register is used to set quatization gradient for DeltaX and DeltaY. Field Name Description XYQ_M Gradient of linear region 0 = Gradient 1 1 = Gradient 2 XYQ_C 1:0 Indicates the off set of linear region (max of C = 3 or 0x03) All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
MOTION_CTRL Address: 0x74 Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Reserved Reserved Motion_ Int_Thres2 Motion_ Int_Thres1 Motion_ Int_Thres0 Data Type: Bit fi eld USAGE: This register is used to control Motion interrupt. Field Name Description Motion_Int_ Thres2:0 Motion interrupt threshold Only trigger Motion Interrupt if Delta_X + Delta_Y > Threshold FPD_CTRL Address: 0x75 Access: Read/Write Reset Value: 0xfa Bit 7 6 5 4 3 2 1 0 Field Shut_Cut _Thres7 Shut_Cut _Thres6 Shut_Cut _Thres5 Shut_Cut _Thres4 FPD_On_ Hyst3 FPD_On_ Hyst2 FPD_Off _ Hyst1 FPD_Off _ Hyst0 Data Type: Bit fi eld USAGE: This register is used to set sensor FPD control. Field Name Description Shut_Cut_Thres7:4 Motion is cut off when shutter value is less than threshold. Valid only when FPD_Mot_Cutoff is enabled. Units are multiple of 256. FPD_On_Hyst3:2 Hysteresis counter for fi nger on FPD_Off _Hyst1:0 Hysteresis counter for fi nger off FPD_THRESH Address: 0x76 Access: Read/Write Reset Value: 0x1c Bit 7 6 5 4 3 2 1 0 Field FPD_T FPD_T FPD_T FPD_T FPD_T FPD_T FPD_T FPD_T Data Type: Bit fi eld USAGE: This register is used to set the sensitivity of FPD. S ee OFN A350 Firmware Guide for more information on FPD operation and thresholds setting. Field Name Description FPD_T 7:0 Threshold to compare with FPD Value All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
ORIENT_CTRL Address: 0x77 Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field XY_SWAP Y_INV X_INV Reserved Reserved Reserved Reserved Reserved Data Type: Bit fi eld USAGE: This register is used to confi gure Delta_X and Delta_Y reporting direction with respect to sensor orientation Field Name Description XY_SWAP 0 = Normal sensor reporting of Delta_X, Delta_Y. (default) 1 = Swap data of Delta_X to Delta_Y and Delta_Y to Delta_X. Y_INV 0 = Normal sensor reporting of Delta_Y. (default) 1 = Invert data of Delta_Y only. X_INV 0 = Normal sensor reporting of Delta_X. (default) 1 = Invert data of Delta_X only. FPD_SQUAL_THRESH Address: 0x78 Access: Read/Write Reset Value: 0x40 Bit 7 6 5 4 3 2 1 0 Data Type: Bit fi eld USAGE: This register is to set the FPD Squal Th reshold. It is used when bit 0 (FPD_SQ_EN bit) of OFN_Engine2 (0x61) is enabled for low refl ectance surface navigation. Field Name Description FPD_S_T Squal FPD Threshold to compare with Squal values FPD_VALUE Address: 0x79 Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou Data Type: Bit fi eld USAGE: This register stores the FPD value that indicates surface refl ectivity. Higher FPD value means higher fi nger or surface refl ectivity. Field Name Description FPD_VALUE 7:0 FPD Value All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
FPD_STATUS Address: 0x7a Access: Read Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field FPD_Hyst7 FPD_Hyst6 FPD_Hyst5 FPD_Hyst4 FPD_SQ_ Hyst3 FPD_SQ_ Hyst2 FPD_SQ_ Hyst1 FPD_On Data Type: Bit fi eld USAGE: This register is used to confi rm FPD fl ag and to set FPD hysteresis threshold. Field Name Description FPD_Hyst7:4 FPD hysteresis threshold boundary. Actual FPD Hysteresis Threshold = 8 x [FPD_Hyst7:4] FPD_SQ_Hyst3:1 FPD Squal hysteresis threshold boundary. Actual FPD SQ Hysteresis Threshold = 4 x [FPD_SQ_Hyst3:1] FPD_On 0 = fi nger is not present 1 = fi nger is present SC_CTRL Address: 0x7b Access: Read/Write Reset Value: 0x25 Bit 7 6 5 4 3 2 1 0 Field Reserved TIM_Res_ Th6 TIM_Res_ Th5 TIM_Res_ Th4 Reserved Tap+N_ Hold_En Double_ Click_En Single_ Click_En Data Type: Bit fi eld USAGE: This register is used to set sensor soft click. Field Name Description TIM_Res_Th6:4 Tap and Hold timer reset threshold Tap_N_Hold_En 0 = Disable Tap and Hold 1 = Enable Tap and Hold Double_Click_En 0 = Disable Double Click 1 = Enable Double Click Single_Click_En 0 = Disable Single Click 1 = Enable Single Click SC_T_TAPNHOLD Address: 0x7c Access: Read/Write Reset Value: 0x45 Bit 7 6 5 4 3 2 1 0 Field SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou Data Type: Bit fi eld USAGE: This register is used to set the minimum time before Tap N Hold is triggered. Field Name Description SC_Dou 7:0 Sets waiting time to activate Tap and Hold All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
SC_T_DOUBLE Address: 0x7d Access: Read/Write Reset Value: 0x1e Bit 7 6 5 4 3 2 1 0 Field SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou SC_Dou Data Type: Bit fi eld USAGE: This register is used to set time between fi rst click and second click to trigger double click. Any second succes- sive click within this time will be considered a double click. Field Name Description SC_Dou 7:0 Sets waiting time after single click for double click to happen SC_DELTA_THRESH Address: 0x7e Access: Read/Write Reset Value: 0x19 Bit 7 6 5 4 3 2 1 0 Field SC_Delta SC_Delta SC_Delta SC_Delta SC_Delta SC_Delta SC_Delta SC_Delta Data Type: Bit fi eld USAGE: This register is used to set sensor single click threshold. Field Name Description SC_Delta 7:0 Threshold to validate single click. Single click is only valid if motion delta sum (Delta_X + Delta_Y) is less than threshold. Units are in 500 cpi. SC_STATUS Address: 0x7f Access: Read/Write Reset Value: 0x00 Bit 7 6 5 4 3 2 1 0 Field Reserved Reserved Reserved Reserved Reserved Tap+N_ Hold Double_ Click Single_ Click Data Type: Bit fi eld USAGE: This register is used to confi rm which soft click has been triggered when there is a soft click interrupt being triggered. Field Name Description Tap_N_Hold 0 = Tap and Hold not detected 1 = Tap and Hold detected Double_Click 0 = Double click not detected 1 = Double click detected Single_Click 0 = Single click not detected 1 = Single click detected All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ
- ADBM-A350 : This is the standard with MOQ=1000pcs 2. ADBM-A350-200 : This is with MOQ=200pcs All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission. PixAr t Imaging Inc. E-mail: fae_service@pixart.com.tw PixArt Imaging Inc. DͲϯϱϬKƉƚŝĐĂů&ŝŶŐĞƌEĂǀŝŐĂƚŝŽŶ