PAS302BCA-32 PIXART | Alldatasheet

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Features

ƒ VGA(644 x 484 pixels) resolution, ~1/4” Lens ƒ Bayer-RGB color filter array ƒ Output format: 10-bit parallel RGB raw data ƒ On-chip 10-bit pipelined A/D converter ƒ On-chip programmable gain amplifier ‰ 4-bit color gain amplifier (x1~x2) ‰ 4-bit global gain amplifier (x1~x2) ƒ Digital gain stage ƒ Continuous variable frame time(1/2sec~1/30sec) ƒ Continuous variable exposure time ƒ 2T MIC Interface ƒ Support flash light timing ƒ Single 2.5V / 3.3V supply voltage ƒ < 15mA(~30 fps) power dissipation ƒ 2µA power dissipation when power down mode ƒ Window-Of-Interest (WOI) ƒ Sub-sampling ƒ Defect compensation Package 32-pin LCC Note1: Only two decoupling capacitors needed Note2: Good sensitivity compared to competitors

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 2 1. Pin Assignment -- Top View -- SCL VCM VSSA PX9PX2 PX3 PX4 SDA 25 26 27 28 56789101112 VRB VSYNC P_OUTP VRT VREF VDDA PWDN PX8 VHRST P_OUTN HSYC VDDQ PXCLK RESET VSSD PX7 VLRST PX6 PX5 PX1 PX0 21 22 23 24 VDDMA SYSCLK VDDD PAS302BCA-32 Figure 1.1. PAS302BCA-32 pin assignment Pin No. Name Type Description

1 VRT BYPASS Voltage reference top

2 P_OUTP BYPASS Analog test output P

3 P_OUTN BYPASS Analog test output N

4 HSYNC OUT Horizontal synchronization signal. 5 VSYNC OUT Vertical synchronization signal. 6 VDDQ PWR Digital VDD, 2.5V to 3.3V. 7 PXCLK OUT Pixel clock output.

8 RESET IN Resets all registers to their default values (chip reset

when high) 9 SYSCLK IN Master clock input. 10 PX9 OUT Digital data out. 11 VSSD GND Digital ground. 12 PX7 OUT Digital data out.

13 VHRST BYPASS Sensor reset power

14 VLRST BYPASS Sensor reset power

15 PX8 OUT Digital data out.

16 VDDD PWR Digital VDD,

17 PX6 OUT Digital data out. 18 PX5 OUT Digital data out. 19 PX1 OUT Digital data out. 20 PX0 OUT Digital data out. 21 PX4 OUT Digital data out. 22 PX3 OUT Digital data out. 23 PX2 OUT Digital data out.

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 3 24 SCL IN 2T MIC clock. 25 SDA I/O 2T MIC data. Internal pull high resister is 10KΩ.

26 VCM BYPASS Voltage common mode

27 VSSA GND Analog ground.

28 VRB BYPASS Voltage reference bottom

29 PWDN IN Power Down (chip power down when high)

30 VDDA PWR Analog VDD,

31 VREF IN Internal voltage reference. 32 VDDMA PWR Analog VDD, 2.5V to 3.3V.

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 4 2. Block Diagram Sensor Array 644x484 CDS Column Decoder Row Decoder FG CG GG 10-Bit A/D Timing Generator & Control Logic Defect Compensation Digital Gain Stage DAC1 DAC2 SCL SDA SYSCLK VSYNC HSYNC PXCLK PX(9 : 2) Front Gain Color Gain Global Gain 3-Bit x2 ~ x4 4-Bit x1 ~ x2 4-Bit x1 ~ x2 Companding Figure 2.1. PAS302BCA-32 sensor block diagram The PAS302BCA-32 is a 1/4” CMOS imaging sensor with 644x488 physical pixels. The active region of sensor array is 644x484 as shown in Fig. 2.1. The sensor array is covered with Bayer pattern color filters and micro-lens. The first pixel location <0,0> is programmable in 2 direction (X and Y) and the default value is at the left-down side of sensor array. After a programmable exposure time, the signals of image are sampled first with CDS (Correlated Double Sampling) block to improve S/N ratio and reduce fixed pattern noise. Three analog gain stages are implemented before signals are transferred to 10-Bit ADC. The front gain stage (FG) can be programmed to fit the saturation level of sensor to the full-range input of ADC. The programmable color gain stage (CG) is used to balance the luminance response difference between B, G and R color. The global gain stage (GG) is programmed to adapt the gain to the image luminance. After three gain stages, the signals will be digiti zed by the on-chip 10-Bit ADC. After the image data have been digitized, further adjustment to the signal can be applied before the data is output to next stage.

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 5 3. Function Description 3.1. Defect Compensation The Defect Compensation block can detect the possible defect pixel and replace it with average output of like-colored pixels from near side of defect pixel. There is no limitation capability of defect pixel number. This function can be programmed to enable/disable by user. 3.2. Companding Curves The companding function which means compressing and expanding is used to simulate the gamma curve and do non-linear transformation before the data is output. There are 4 curves selected by setting Register Compand_Sel as sh own in Fig. 3.1. This function can be programmed to enable/disable by user. 11,1111,1111 00,0xxx,xxxx 00,1xxx,xxxx 10,xxxx,xxxx 11,xxxx,xxxx010 011 O/P ( 10-Bit) I/P ( 10-Bit) 3 012 without companding Figure 3.1 Companding curves program by Compand_EnH and Compand_Sel. 3.3. Power Down Mode The PAS302BCA-32 can be powered down by setting register “Sw_PwrDn” = 1 or by enable Pwdn pin. The register value will sustain in the power down mode. PAS302BCA-32 supports 2 power down modes: z Software power down :Set register “Sw_PwrDn” = 1 to power down all the internal block except 2T MIC . z Hardware power down :Pull Pwdn pin to high to power down the chip. The chip will go into standby mode. 3.4. Reset Mode The PAS302BCA-32 can be reseted by setting register “Sw_Reset” = 1 or by enable Reset pin. PAS302BCA-32 supports 2 reset modes: z Software reset :Set register “Sw_Reset” = 1 to reset all the 2T MIC registers. z Hardware reset :Pull Reset pin to high to reset the full chip.

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 6 4. Output Format 4.1. Physical Sensor Array Dark Line Dark Line Dark Line Dark Line 488 - Row 644 - Column

644 X 484

B B G R G G G G G G G GG G RRR BB BB B BB BG R G G G G G G G G GG G RR R G RGGGG RRR RGGGG RRR BBBBGG G BBB RG G G G G GG RRR RG GGRRR B G G B B G Figure 4.1 Physical Sensor Array

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 9 5.2. Data Transfer Format 5.2.1. Master transmits data to slave (write cycle) ƒ S : Start ƒ A : Acknowledge by slave ƒ P : Stop ƒ RW : The LSB of 1st byte to decide whether current cycle is read or write cycle. I f R W = 1 t h a t m e a n s r ead cycle, if RW=0 that means write cycle.. ƒ SUBADDRESS : The address values of PAS302BCA-32 internal control registers (Please refer to PAS302BCA-32 register description) During the write cycle, the master generates start condition and then places the 1st byte data that combined slave address (7 bits) with a read/write control bit on SDA line. After slave(PAS302BCA-32) issues acknowledgment, the master places 2nd byte (sub-address) data on SDA line. And then following the slave’s( PAS302BCA-32) acknowledgment, the master places the 8 bits data on SDA line and transmit to PAS302BCA-32 control register (address was assigned by 2nd byte). After PAS302BCA-32 issue acknowledgment, the master can generate a stop condition to end this write cycle. In the condition of multi-byte write, the PAS302BCA-32 sub-address will be increased automatically afte r each DATA byte has been transferred. The Data and A cycles are repeated until last byte write. Every control registers value inside PAS302BCA-32 can be programming via this way. (Please refer to Figure 5.3.) 5.2.2. Slave transmits data to master (read cycle) ƒ The sub-address was assigned by previous write cycle ƒ The sub-address is automatically increased after each byte read ƒ Am : Acknowledged by master ƒ Note there is no acknowledgment from master after last byte read During read cycle, the master generates start co ndition and then place the 1st byte data that combine slave address (7 bits) with a read/writ e control bit to SDA line. After slave issue acknowledgment, 8 bits DATA was placed on SDA line by PAS302BCA-32. The 8 bit data was read from PAS302BCA-32 internal control register that address was assigned by previous write cycle. Following the master acknowledgment, t he PAS302BCA-32 place the next 8 bits data (address is increased automatically) on SDA line and then transfer to master serially. The DATA and Am cycles are repeated until the last byte re ad. After last byte read, Am is no longer S SLAVE ADDRESS (7 BITS) RW A DATA (8 BIT) Am DATA 1 P 1ST BYTE 2ND BYTE n BYTE NO ACK IN LAST BYTE Am DATA S SLAVE ID (7 BIT) RW A SUBADDRESS (8 BIT) A DATA PA 1ST BYTE 2ND BYTE n BYTEs + A MSB LSB=0 A DATA

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 11 Noise margin at HIGH level for each connected device (including hysteresis) VnH 0.2 VDD - V Note: It depends on the "high" period time of SCL.

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 12 6. Electrical Characteristics Absolute Maximum Ratings Ambient Storage Temperature -40℃ ~ +125℃ VDDD 3V VDDA 3V VDDMA 4V Supply Voltages ( with respect to Ground ) VDDQ 4V All Input / Output Voltages ( with respect to Ground ) -0.3V to VDDQ + 1V Lead Temperature, Surface-mount process +230℃ ESD Rating, Human Body model 2000V Symbol Parameter Min. Typ. Max. Unit Type :PWR VDDA DC Supply voltage – Analog 2.4 2.5 2.6 V VDDD DC Supply voltage – Digital 2.4 2.5 2.6 V VDDQ DC Supply voltage – I/O 2.4 - 3.3 V VDDMA DC Supply voltage – Analog 2.4 - 3.3 V IDD Operating Current 15 mA IPWDN Power Down current 2 µA Type :IN & I/O Reset and SYSCLK VIH Input voltage HIGH 0.7 x V DDQ V VIL Input voltage LOW 0.3 x VDDQ V CIN Input capacitor 10 pF Type : OUT & I/O for PXD0:7, PXCK, H/VSYNC & SDA, load 10pf, 1.2kΩ,2.5volts VOH Output voltage HIGH 0.9 x V DDQ V VOL Output voltage LOW 0.1 x VDDQ V AC Operating Condition Symbol Parameter Min. Typ. Max. Unit SYSCLK Master clock frequency 48 MHz PXCK Pixel clock output frequency 12 MHz Sensor Characteristics Parameter Typ. Unit Note Sensitivity 1.88 V/ Lux-Sec Signal to Noise Ratio > 45 dB Dynamic Range 60 dB Operation -10 ~ 70 Temperature Range Stable Image 0 ~ 50 ℃

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 13 7. Reference Circuit Schematic PX2 SDA SCL VSSA C1 0.1U Notes: VDDQ is 2.5V to 3.3V sensor digital power. VDDMA is 2.5V to 3.3V sensor analog power. C1 should close to sensor VDDA and AGND. C2 should close to sensor VREF and AGND. PAS302BCA PAS302 PX617 PX518 PX119 PX020 PX4 21 PX3 22 PX2 23 SCL 24 SDA 25 VCM 26 VSSA27 VRB 28 PWDN 29 VDDA 30 VREF 31 VDDMA 32 VRT 1 P_OUTP 2 P_OUTN 3 HSYNC 4 VSYNC5 VDDQ6 PXCLK7 RESET8 SYSCLK9 PX910 VSSD11 PX712 VHRST13 VLRST14 PX815 VDDD16 0.1U PWDN VREF VSYNC HSYNC VDDQ VDDMA PX9 RESET PXCLK PX7 SYSCLK PX8 VSSD PX5 PX6 PX0 PX1 PX4 PX3 PX4 PXCLK PX5 VSYNC HSYNCSYSCLK PX2 PX7 SCL PX3 SDA PX6 JP1 SENSOR BOARD INTERFACE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22PWDN PX9PX8 VDDMA RESET VDDQ

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 14 8. Package Specification Unit:mm

PAS302BCA-32 CMOS Image Sensor IC Version 2.3, 13 Sep. 2004 PixArt Imaging Inc. E-mail: fae_service@pixart.com.tw 15 9. Recommended Lens and Holder