AA4002 BCDSEMI | Alldatasheet

Document overview

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Technical content

Features

  • DC V olume Control Interface, 0dB to -78dB, 31 Steps
  • System Beep Detect
  • Very Low Power Consumption in Shutdown Mode, ISD=0.7µA
  • Stereo Power Output for Speakers/Headphones with BTL Mode/SE Mode
  • Selectable Internal/External Gain
  • Bass Boost
  • Pop Noise Suppression Circuit
  • Thermal Shutdown Protection

Applications

  • Notebook PC
  • LCD monitor
  • Portable DVD Player
  • Portable Media Player
  • Digital Photo Frame

Figure 1. Package Type of AA4002

Figure 2. Pin Configuration of AA4002

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited Pin Description Pin Number Pin Name Function 1, 8, 14, 20, 23 GND Ground for circuitry.

2 SHUTDOWN Shutdown mode control signal input, place entire IC in shutdown mode when held

high, IDD=0.7µA.

3 GAIN SELECT Gain select input pin, logic high will switch the amplifier to external gain mode, and

logic low will switch to internal unity gain.

4 MODE Mode select input pin, fixed gain when logic L and gain adjustable mode when

logic H. 5 MUTE Mute control i nput pin, active H. 6, 16, 27 V DD Supply voltage input pin. 7 DC VOL V olume control function input pin. 9 RIGHT DOCK Right docking output pin. 10 RIGHT IN Right cha nnel audio input pin. 11 BEEP IN Beep signal input pin. 12 LEFT IN Left channel audio input pin. 13 LEFT DOCK Left docking output pin. 15 LEFT OUT+ Left channel positive output pin. 17 LEFT OUT- Left channel negative output pin. 18 LEFT GAIN 2 Connect pin 2 of the external gain setting resistor for left channel. 19 LEFT GAIN 1 Connect pin 1 of the external gain setting resistor for left channel. 21 HP SENSE Headphone sense control pin. 22 BYPASS Bypass pin. 24 RIGHT GAIN 1 Connect pin 1 of the external gain setting resistor for right channel. 25 RIGHT GAIN 2 Connect pin 2 of the external gain setting resistor for right channel. 26 RIGHT OUT- Right cha nnel negative output pin. 28 RIGHT OUT+ Right cha nnel positive output pin.

Figure 3. Functional Block Diagram of AA4002

31 Steps

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited Gain Sel Mode Headphone Sense Mute Shutdown Output Stage Set To DC V olume Output Stage Configuration 0 0 0 0 0 Internal Gain Fixed BTL 0 0 1 0 0 Internal Gain Fixed SE 0 1 0 0 0 Internal Gain Adjustable BTL 0 1 1 0 0 Internal Gain Adjustable SE 1 0 0 0 0 External Gain Fixed BTL 1 0 1 0 0 External Gain Fixed SE 1 1 0 0 0 External Gain Adjustable BTL 1 1 1 0 0 External Gain Adjustable SE XXX 1 0 M u t e d X M u t e d X X X X 1 Shutdown X X

Ordering Information

Circuit Type E1: Lead Free AA4002 - Truth Table for Logic Inputs (Note 1) Note 1: If system beep is detected on the BEEP IN pin, the system beep will be passed through the bridged amplifier regardless of the logic of the MUTE and HP SENSE pins. Package Temperature Range Part Number Marking ID Packing Type TSSOP-28 with Exposed-DAP -40 to 85 ℃ AA4002G-E1 AA4002G-E1 Tube AA4002GTR-E1 AA4002G-E1 Tape & Reel Package G: TSSOP-28 with Exposed-DAP TR: Tape and Reel Blank: Tube BCD Semiconductor's Pb-free products, as designated with "E1" suffix in the part number, are RoHS compliant.

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited Parameter Symbol Value Unit Supply V oltage V DD 6.0 V Input V oltage V IN -0.3 to VDD + 0.3 V Power Dissipation P D Internally limited ESD (Machine Model) ESD 200 (Note 3) V Operating Junction Temperature T J 150 oC Storage Temperature T STG -65 to 150 oC Lead Temperature (Soldering 10s) T L 260 oC Package Thermal Resistance R θJA (Note 4) 45 oC/W Absolute Maximum Ratings (Note 2) Note 2: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanen t damage to the device. These are stress ratings only, and functional operation of the device at these or any other cond itions beyond those indicated in the operation is not implied. Exposure to "Absolute Maximum Ratings" for extended periods may affect device reliability. Note 3: This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Note 4: The Chip is soldered to 200mm2 copper of 1oz. with 12x0.5mm vias. Recommended Operating Conditions Parameter Symbol Min Max Unit Supply V oltage V DD 2.7 5.5 V Operating Temperature T A -40 85 oC

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited P a r a m e t e r S y m b o l C o n d i t i o n s Min Ty p M a x U n i t Standby and Logical Section Supply V oltage V DD 2.7 5.5 V Quiescent Power Supply Current I DD VIN=0V , IOUT=0A 11 30 mA Shutdown Current I SD VSHUTDOWN=VDD 0.7 2.0 µA Headphone Sense High Input V oltage V IH 4V Headphone Sense Low Input V oltage V IL 0.8 V (Mute, Shutdown, Mode, Gain Select) High Input V oltage VIH 3 V (Mute, Shutdown, Mode, Gain Select) Low Input V oltage VIL 1 V Volume Attenuators Section Attenuator Range CRANGE VVOL=5V (DC), No load ±0.75 dB VVOL=0V (DC), BTL and SE Mode -75 dB Mute Attenuation AM VMUTE=5V , BTL Mode -78 dB VMUTE=5V , SE Mode -78 dB Single-ended (SE) Mode Section Output Power POUT THD=1%, f=1kHz, RL=32Ω 85 mWTHD=10%, f=1kHz, RL=32Ω 95 Total Harmonic Distortion + Noise THD+N V OUT=1VRMS, f=1kHz, RL=10KΩ, AVD=1 0.065 % Power Supply Rejection Ratio PSRR C B=1.0µF, f=120kHz, RL=32Ω, VRIPPLE=200mVRMS 58 dB Signal to Noise Ratio SNR P OUT=75mW, RL=32Ω, A-Wtd Filter 102 dB Channel Separation f=1kHz, C B=1.0µF6 5 d B BTL Mode Section Output Offset V oltage V OS VIN=0V , No load ±5 ± 50 mV Output Power POUT THD+N=1%, f=1kHz, RL=4Ω, LPF=22kHz W THD+N=1%, f=1kHz, RL=8Ω, 1.0 1.1 THD+N=10%, f=1kHz, RL=8Ω,1 . 5 Total Harmonic Distortion + Noise THD+N P OUT=1.0W, RL=4Ω, AVD=2 20Hz<f<20kHz 0.3 % Power Supply Rejection Ratio PSRR C B=1.0µF, f=120Hz, VRIPPLE=200mVRMS, RL=8Ω 74 dB

Electrical Characteristics

(VDD=5V , TA=25oC, unless otherwise specified.)

Figure 21. External Gain/Bass Boost Characteristics Figure 20. Channel Separation vs. Frequency

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited

Application Information

SE/BTL Mode, HP_SENSE Pin The AA4002 can be operated in 2 types of output configurations, SE (Single-Ended) mode and BTL (Bridged-Tied-Load) mode, determined by HP_SENSE pin (pin 21) logic level. (Here is the discussion about left channel only, it also applies to right channel.) If applying high level to pin 21, the output of OP2 unit is in high impedance, the chip operates in SE mode. There is no current loop between OUT+ and OUT-, also no power consumption. When HP_SENSE pin is held low, OP2 unit is turned on, the chip operates in BTL mode. AC signal at OUT+ is -180 o phase shift of OUT-. OP2 has fixed unity gain internally, so DC components (Bias voltage, approx 1/2 V DD) between OUT+, OUT- is canceled. There is no need for DC block capacitors in system. In BTL mode, voltage between speaker load is about 2 times that in SE mode, so there is 4 times output power compared to SE mode with same load. In SE mode, output audio signal rides on Bias voltage at OUT-, so it is necessary to use capacitor to block DC bias and couple AC signal. See Figure 28 typical application circuit. It is recommended to connect HP_SENSE to the control pin of headphone jack, illustrated in Figure 28. When headphone plug is not inserted, the voltage of HP_SENSE pin is determined by voltage divider formed by R PU, RL. For given resistors value in Figure 28, RPU=100k, RL=1.5k, DC voltage at HP_SENSE is about 75mV . AC signal equals output amplitude of OUT- through COUT, so signal at HP_SENSE node is 75mV DC plus AC signal. The maximum Peak-to- Peak voltage at OUT- is not greater than V DD=5.0V supply voltage, so the positive maximum voltage of HP_SENSE node is not greater than 2.5V+75mV=2.575V , which can not reach HP_SENSE input high level minimum value (4.0V), there is no risk of mode switching between SE and BTL. HP_SENSE pin can also be connected to MCU I/O port, it is necessary to note that AA4002 still can drive headphone even in BTL mode because OUT- is always active whatever SE or BTL mode. Internal/External Gain, Gain SELECT Pin The AA4002 provides 2 sel ectable feedback loops, Internal and External determined by SELECT pin (pin 3) logic level. Applying low level to SELECT pin, the AA4002 switches to internal feedback loop, OP1 works as unity gain. If applying high level to SELECT pin, external components ar e used as feedback loop, and the gain is expressed by formula below. Here ZC BS is the impedance of bass boost capacitor, ZCBS=1/2π*f*CBS. So A VFB approaches 2 points, AVFBLF at low frequency, A VFBHF at high frequency, expressed by formula 2 and 3. Bass Boost From above discussion, the AA4002 can improve gain of audio signal at low frequency, which is hard to listening for human ears relative to middle band (2kHz to 3kHz). The boost corner frequency is determined by formula 4. Figure 22. BTL Configuration in Left Channel

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited Application Information (Continued) But, decreasing voltage from 3.562V (point F), gain does not change immediately, the change occurs at 3.5V (point E). There is a hysteresis which guarantees that the volume control is monotonic, with immunity against noise coupled from system. In above Table 1, the column of Low Level means the lower threshold voltage with the voltage of DC VOL varying from high to low, High Level column means the other upper threshold voltage DC VOL voltage varying from low to high. Mute, Shutdown When applying high level to MUTE pin (pin 5), the AA4002 will mute output stage stereo dock output- whatever in BTL or SE mode. The AA4002 offers shutdown function which can further reduce power consumption. SHUTDOWN pin (pin 2) should be held low in normal operation. If applying high level to SHUTDOWN pin, the AA4002 will turn off internal bias circuits, enter into shutdown mode with very low quiescent current, 0.7 µA Typ. MUTE, SHUTDOWN pin should be tied to high or low level to avoid undes- ired operation state. Left/Right Dock Output There are stereo amplifiers built-in AA4002 front-end input stages. It provide very low distortion audio moni- tor signal for line out, the pass-band gain is determined by external feedback resistors, The dock output is also used as input source for back- end amplifiers, so the gain of docking output VDOCK) will affect total loop gain. The function of COUT(L/R) (0.1µF) serial in Left/Right dock output is to remove DC bias. Beep Detect Beep feature is used in Notebook PC system for alert- ing. If peak-to-peak voltage of beep signal applied to BEEP DETECT pin (pin 11) exceeds a certain voltage called detect voltage, the feature will be activated, then AA4002 will be forced at BTL mode with internal fixed gain, ignoring MUTE and HP_SENSE pin logic level. For AA4002, V DETECT is about 2.8V . Beep sig- nal passes through Left/Right channel input path, the gain under BTL load is only dependent on the ratio of R F(L/R) to RBEEP. For resistors value given in Figure 28, AVBEEP is about 0.2 (-14dB). If this feature is not used, connecting the capacitor (C BEEP) to ground, it is recommended removing two resistors (R BEEP, 200k Ω), to minimize crosstalk between left and right channel. CI, C OUT, C B and C S (Power Supply Bypassing Capacitor) Selection For input stages of Left/Right channel, input capacitors (CIL, CIR), are used to accommodate different DC level between input source and AA4002 bias voltage (about 1/2 VDD). Input capacitors (C IL, C IR) and input resistors (RIL, RIR) form first order High Pass Filters, which determine the corner frequency, For given values in Figure 28, R IL=RIR=20kΩ, CIL=CIR=0.33µF, the corner frequency of input stage is about 24Hz. Similarly, for output stage in SE mode, output capacitor (COUT), and headphone load also form a first order High Pass Filter, and its cut-off frequency is determined by classic formula below. For bypass capacitor (C B), the purpose is to filter internal bias noise, reduce harmonic distortion, and improve power supply rejection ratio performance. Tantalum or ceramic cap acitor with low ESR is recommended, and is placed as close as possible to chip bypass pin in PCB layout. Both input and output )/( )/( )/( RLI RLF RLVDOCK R RA = BEEP RLF RLVBEEP R RA )/( )/( 2∗= )/()/( )/( RLIRLI RLCI CRf ∗= π )/()/( )/( RLORLHP RLCO CRf ∗= π

several typical capacitor values. for external gain, see formula 1, 2, 3. Boost feature relies on AVOUT. power each channel, PO=1.0W, THD+N ≤ 1%. Input signal, VIN=1.0VRMS from D-A converter. limitation of THD+N ≤ 1%, VDD=5V by Figure 6, 15. Table 2. CB vs. Start-up Time

Here VP is peak voltage of output swing. output power is close to 2W especially in BTL mode. AA4002 can be calculated by following equation. determined by supply voltage and load resistance. load impedance, or decreasing power supply voltage. Figure 24. Recommended Sequences for Power ON/OFF

Figure 27. Bottom Route, Copper and Silkscreen

Figure 28. Typical Application of AA4002

STEREO 2W AUDIO POWER AMPLIFIER AA4002 Data Sheet Sep. 2006 Rev. 1. 1 BCD Semiconductor Manufacturing Limited Mechanical Dimensions TSSOP-28 with Exposed-DAP Unit: mm(inch) 0.090(0.004) 0.190(0.007) 0.300(0.012) 0.050(0.002) 0.150(0.006) 0.800(0.032) 1.050(0.041) 1.200(0.047)MAX 2.740(0.108) 3.050(0.120) 5.640(0.222) 5.940(0.234) EXPOSED PAD 0.450(0.018) 0.750(0.030) 4.300(0.169) 4.500(0.177) GAUGE LINE 0.250(0.010) SEATING PLANE 6.250(0.246) 6.550(0.258) PIN #1 ID. 9.600(0.378) 9.800(0.386) BASE PLANE

BCD Semiconductor Manufacturing Limited reserves the right to make changes without further notice to any products or specifi- cations herein. BCD Semiconductor Manufacturing Limited does not assume any responsibility for use of any its products for any particular purpose, nor does BCD Semiconductor Manufacturing Limited assume any liability arising out of the application or use of any its products or circuits. BCD Semiconductor Manufacturing Limited does not convey any license under its patent rights or other rights nor the rights of others. - Wafer Fab Shanghai SIM-BCD Semiconductor Manufacturing Limited 800, Yi Shan Road, Shanghai 200233, China Tel: +86-21-6485 1491, Fax: +86-21-5450 0008 BCD Semiconductor Manufacturing Limited MAIN SITE REGIONAL SALES OFFICE Shenzhen Office Shanghai SIM-BCD Semiconductor Manufacturing Co., Ltd. Shenzhen Office Advanced Analog Circuits (Shanghai) Corporation Shenzhen Office Room E, 5F, Noble Center, No.1006, 3rd Fuzhong Road, Futian District, Shenzhen 518026, China Tel: +86-755-8826 7951, Fax: +86-755-8826 7865 Taiwan Office BCD Semiconductor (Taiwan) Company Limited 4F, 298-1, Rui Guang Road, Nei-Hu District, Taipei, Taiwan Tel: +886-2-2656 2808, Fax: +886-2-2656 2806 USA Office BCD Semiconductor Corporation 3170 De La Cruz Blvd., Suite 105, Santa Clara, CA 95054-2411, U.S.A - IC Design Group Advanced Analog Circuits (Shanghai) Corporation 8F, Zone B, 900, Yi Shan Road, Shanghai 200233, China Tel: +86-21-6495 9539, Fax: +86-21-6485 9673 BCD Semiconductor Manufacturing Limited http://www.bcdsemi.com