A62S6308

A62S6308 AMICC | Alldatasheet

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Technical content

64K X 8 BIT LOW VOLTAGE CMOS SRAM (October, 1998, Version 2.0) AMIC Technology, Inc. Document Title 64K X 8 BIT LOW VOLTAGE CMOS SRAM

Revision History

Rev. No. History Issue Date Remark

1.0 Initial issue September 01, 1997 Preliminary

1.1 Modify TSOP (TSSOP) pin configuration. January 16, 1998 Modify SOP 32L, TSOP 32L and TSSOP 32L type packages outline dimensions. 1.2 Change TSSOP 32L type package to sTSOP 32L. June 16, 1998 Modify sTSOP 32L type package LE symbol dimensions. 1.3 Modify 32-pin TSOP package L symbol dimensions. June 22, 1998

2.0 Finalize  October 9, 1998 Final

Add 36-ball Mini BGA (6X8) package

64K X 8 BIT LOW VOLTAGE CMOS SRAM (October, 1998, Version 2.0) 1 AMIC Technology, Inc. NC A14 A12 I/O0 I/O1 I/O2 I/O3GND I/O4 I/O5 I/O6 I/O7 A10 A13 CE2 A15 VCC A11 A62S6308M 16 17 OE CE1 WE A10 GND OE CE1 NC A62S6308V (A62S6308X) A11 A9 2 A13 VCC NC A14 A12 I/O I/O I/O I/O I/O A15 WE CE2 I/O I/O I/O ~~ ~~ NC 1 2 3 4 5 6 A A0 A1 CE2 A3 A6 A8 B I/O4 A2 WE A4 A7 I/O0 C I/O5 NC A5 I/O1 D VSS VCC E VCC VSS F I/O6 NC NC I/O2 G I/O7 OE CE1 NC A15 I/O3 H A9 A10 A11 A12 A13 A14

Features

n Power supply range: 2.7V to 3.6V n Access times:70/100 ns (max.) n Current: A62S6308-S series: Operating: 40mA (max.) Standby: 15µA (max.) A62S6308-SI series: *Operating: 40mA (max.) *Standby: 30µA (max.) n Extended operating temperature range:-25°C to 85°C n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32 -pin SOP, TSOP, sTSOP (8 X 13.4mm) forward type and 36 -ball Mini BGA (6X8) packages General Description The A62S6308 is a low operating current 524,288 -bit static random access memory organized as 65,536 words by 8 bits and operates on a low power supply voltage from 2.7V to 3.6V. Inputs and three -state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for POWER -DOWN and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations nn SOP nn TSOP/(sTSOP) nn Mini BGA (6X8) Top View (forward type)

(October, 1998, Version 2.0) 2 AMIC Technology, Inc. Block Diagram ROW DECODER

512 X 1024

Pin No. Symbol Description 1,2 NC No Connection 3 - 12, 23, 25 - 28, 31 A0 - A15 Address Inputs 13 - 15, 17 - 21 I/O1 - I/O8 Data Inputs/Outputs

16 GND Ground

22 CE1 Chip Enable

24 OE Output Enable

29 WE Write Enable

30 CE2 Chip Enable

32 VCC Power Supply

Pin Description - TSOP/sTSOP Pin No. Symbol Description 1 - 4, 7, 11 - 20, 31 A0 - A15 Address Inputs

5 WE Write Enable

6 CE2 Chip Enable

8 VCC Power Supply

9, 10 NC No Connection 21 - 23, 25 - 29 I/O1 - I/O8 Data Inputs/Outputs

24 GND Ground

30 CE1 Chip Enable

32 OE Output Enable

(October, 1998, Version 2.0) 3 AMIC Technology, Inc. Recommended DC Operating Conditions (TA = 0°C to + 70°C, -25°C to 85°C) Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 2.7 3.0 3.6 V GND Ground 0 0 0 V VIH Input High Voltage 2.0 - VCC + 0.3 V VIL Input Low Voltage -0.3 - +0.6 V CL Output Load - - 30 pF TTL Output Load - - 1 - Absolute Maximum Ratings* *Comments Stresses above those list ed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is no t implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. Symbol Parameter A62S6308-70S/10S A62S6308-70SI/10SI Unit Conditions Min. Max. Min. Max. ILI Input Leakage Current - 1 - 1 µA VIN = GND to VCC ILO Output Leakage Current - 1 - 1 µA CE1 = VIH or CE2 = VIL or OE = VIH or WE = VIL VI/O = GND to VCC ICC Active Power Supply Current - 3 - 3 mA CE1 = VIL, CE2 = VIH II/O = 0mA ICC1 Dynamic Operating - 40 - 40 mA Min. Cycle, Duty = 100% CE1 = VIL, CE2 = VIH II/O = 0mA ICC2 Current - 5 - 5 mA CE1 = VIL, CE2 = VIH VIH = VCC, VIL = 0V f = 1MHZ, II/O = 0mA

(October, 1998, Version 2.0) 4 AMIC Technology, Inc. Symbol Parameter A62S6308-70S/10S A62S6308-70SI/10SI Unit Conditions Min. Max. Min. Max. ISB - 0.5 - 0.5 mA CE1 = VIH or CE2 = VIL ISB1 Standby Power Supply Current - 15 - 30 µA CE1 ≥ VCC - 0.2V CE2 ≥ VCC - 0.2V VIN ≥ 0V ISB2 - 15 - 30 µA CE2 ≤ 0.2V VIN ≥ 0V VOL Output Low Voltage - 0.4 - 0.4 V IOL = 2.1mA VOH Output High Voltage 2.4 - 2.4 - V IOH = -1.0mA Truth Table Mode CE1 CE2 OE WE I/O Operation Supply Current Standby H X X X High Z ISB, ISB1 X L X X High Z ISB, ISB2 Output Disable L H H H High Z ICC, ICC1, ICC2 Read L H L H DOUT ICC, ICC1, ICC2 Write L H X L DIN ICC, ICC1, ICC2 Note: X = H or L Capacitance (TA = 25°C, f = 1.0MHz) Symbol Parameter Min. Max. Unit Conditions CIN* Input Capacitance 6 pF VIN = 0V CI/O* Input/Output Capacitance 8 pF VI/O = 0V * These parameters are sampled and not 100% tested.

(October, 1998, Version 2.0) 5 AMIC Technology, Inc. AC Characteristics (TA = 0°C to + 70°C or -25°C to 85°C, VCC = 2.7V to 3.6V) Symbol Parameter A62S6308-70S/SI A62S6308-10S/SI Unit Min. Max. Min. Max. Read Cycle tRC Read Cycle Time 70 - 100 - ns tAA Address Access Time - 70 - 100 ns tACE1 Chip Enable Access Time CE1 - 70 - 100 ns tACE2 CE2 - 70 - 100 ns tOE Output Enable to Output Valid - 35 - 50 ns tCLZ1 Chip Enable to Output in Low Z CE1 10 - 10 - ns tCLZ2 CE2 10 - 10 - ns tOLZ Output Enable to Output in Low Z 5 - 5 - ns tCHZ1 Chip Disable to Output in High Z CE1 0 25 0 35 ns tCHZ2 CE2 0 25 0 35 ns tOHZ Output Disable to Output in High Z 0 25 0 35 ns tOH Output Hold from Address Change 10 - 10 - ns Read Cycle tWC Write Cycle Time 70 - 100 - ns tCW Chip Enable to End of Write 60 - 80 - ns tAS Address Setup Time 0 - 0 - ns tAW Address Valid to End of Write 60 - 80 - ns tWP Write Pulse Width 50 - 60 - ns tWR Write Recovery Time 0 - 0 - ns tWHZ Write to Output in High Z 0 25 0 35 ns tDW Data to Write Time Overlap 30 - 40 - ns tDH Data Hold from Write Time 0 - 0 - ns tOW Output Active from End of Write 5 - 5 - ns Notes: tCHZ1, tCHZ2, tOHZ and t WHZ are defined as the time at which the outputs achieve the open circuit condition an d are not referred to output voltage levels.

(October, 1998, Version 2.0) 6 AMIC Technology, Inc. Timing Waveforms Read Cycle 1(1, 2, 4) tRC tOH tAA tOH Address DOUT Read Cycle 2 (1, 3, 4, 6) tCLZ15 tACE1 tCHZ15 CE1 DOUT Read Cycle 3 (1, 4, 7 ,8) tCLZ25 tACE2 tCHZ25 CE2 DOUT

(October, 1998, Version 2.0) 7 AMIC Technology, Inc. Timing Waveforms (continued) Read Cycle 4 (1) tRC Address CE2 DOUT tAA tOE tOLZ5 tACE1 tCLZ15 tACE2 tCLZ25 tCHZ25 tOHZ5 tCHZ15 tOH OE CE1 Notes: 1. WE is high for Read Cycle. 2. Device is continuously enabled CE1 = VIL and CE2 = VIH. 3. Address valid prior to or coincident with CE1 transition low. 4. OE = VIL. 5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested. 6. CE2 is high. 7. CE1 is low. 8. Address valid prior to or coincident with CE2 transition high.

(October, 1998, Version 2.0) 8 AMIC Technology, Inc. Timing Waveforms (continued) Write Cycle 1(6) (Write Enable Controlled) tWC Address CE1 CE2 DIN tOW tDHtDW tWHZ tWP2tAS1 (4) tCW5 tAW tWR3 WE DOUT (4)

(October, 1998, Version 2.0) 9 AMIC Technology, Inc. Timing Waveforms (continued) Write Cycle 2 (Chip Enable Controlled) tWC Address CE1 CE2 DIN tDHtDW (4) (4) tCW5 tAW tWR3 WE DOUT tWHZ7 tWP2 tCW5 tAS1 Notes: 1. tAS is measured from the address valid to the beginning of Write. 2. A Write occurs during the overlap (t WP) of a low CE1, a high CE2 and a low WE . 3. tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle. 4. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after the WE transition, outputs remain in a high impedance state. 5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Write. 6. OE is continuously low. ( OE = VIL) 7. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.

(October, 1998, Version 2.0) 10 AMIC Technology, Inc.

• Including scope and jig. * Including scope and jig.

Figure 1. Output Load Figure 2. Output Load for tCLZ1,

(October, 1998, Version 2.0) 11 AMIC Technology, Inc. Low VCC Data Retention Waveform (1) ( CE1 Controlled) VCC CE1 tCDR VIH 2.7V tR VIH 2.7V DATA RETENTION MODE VDR ≥ 2V CE1 ≥ VDR - 0.2V tVR Low VCC Data Retention Waveform (2) (CE2 Controlled) VCC CE2 tCDR VIL 2.7V tR VIL 2.7V DATA RETENTION MODE VDR ≥ 2V CE2 < 0.2V tVR

(October, 1998, Version 2.0) 12 AMIC Technology, Inc.

Ordering Information

Part No. Access Time (ns) Operating Current Max. (mA) Standby Current Max. (mmA) Package A62S6308M-70S 40 15 32L SOP A62S6308M-70SI 40 30 32L SOP A62S6308V-70S 40 15 32L TSOP A62S6308V-70SI 70 40 30 32L TSOP A62S6308X-70S 40 15 32L sTSOP A62S6308X-70SI 40 30 32L sTSOP A62S6308G-70S 40 15 36B Mini BGA A62S6308G-70SI 40 30 36B Mini BGA A62S6308M-10S 40 15 32L SOP A62S6308M-10SI 40 30 32L SOP A62S6308V-10S 40 15 32L TSOP A62S6308V-10SI 100 40 30 32L TSOP A62S6308X-10S 40 15 32L sTSOP A62S6308X-10SI 40 30 32L sTSOP A62S6308G-10S 40 15 36B Mini BGA A62S6308G-10SI 40 30 36B Mini BGA

(October, 1998, Version 2.0) 13 AMIC Technology, Inc.

Package Information

SOP (W.B.) 32L Outline Dimensions unit: inches/mm E HE L LE c See Detail F Detail F 1732 A1 A2 A S D Seating Plane D y e b θ Dimensions in inches Dimensions in mm Symbol Min Nom Max Min Nom Max D - 0.805 0.817 - 20.45 20.75 Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.

(October, 1998, Version 2.0) 14 AMIC Technology, Inc. TSOP 32L TYPE I (8 X 20mm) Outline Dimensions unit: inches/mm e LE L A c D y Detail "A" S b HD D E θ Detail "A" Dimensions in inches Dimensions in mm Symbol Min Nom Max Min Nom Max A1 0.002 - 0.006 0.05 - 0.15 c 0.004 - 0.008 0.11 - 0.20 E - 0.315 0.319 - 8.00 8.10 e 0.020 BSC 0.50 BSC θ 0° - 5° 0° - 5° Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.

(October, 1998, Version 2.0) 15 AMIC Technology, Inc. sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions unit: inches/mm e Detail "A" D 0.076MM Detail "A" S b E D LE L A c θ SEATING PLANE Dimensions in inches Dimensions in mm Symbol Min Nom Max Min Nom Max e 0.020 TYP 0.50 TYP S 0.0109 TYP 0.278 TYP Notes: 1. The maximum value of dimension D1 includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash.

(October, 1998, Version 2.0) 16 AMIC Technology, Inc. Mini BGA 6X8 (36 BALLS) Outline Dimensions unit : millimeter(mm) Symbol Min Typ Max A - 0.75 - B 5.90 6.00 6.10 B1 - 3.75 - C 7.90 8.00 8.10 C1 - 5.25 - D 0.30 0.35 0.40 E 1.00 1.10 1.20 E1 - 0.36 - E2 - 0.22 - 123456 A B C D E F G H Bottom View Pin A1 Index Diameter D Solder Ball A A Top View Pin A1 Index B C 0.10 E D