53RS881 AMD | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

. Micro High Performance 1024x8 Registered PROM Devices FEATURES/BENEFITS APPLICATIONS + Edge triggered “D” registers + Microprogram control store + Synchronous and asynchronous enables + State sequencers + Versatile 1:16 initialization words + Next address generation + &-Bit-wide In 24-pin SKINNYDIP® package for + Mapping PROM high board density + Programmable Logic Element (PLE™) 10 Inputs, + Simplifies system timing 8 Registered Outputs, 1024 product terms + Faster cycle times + 16 mA OL output drive capability + Reliable titanium-tungsten fuses (TIW), with programming ylelds typically greater than 98% Oe

DESCRIPTION

The 53/63RS881 and 53/63RS881A are 1Kx8 PROMs _ plied, the synchronous enable flip-flop will be in the set with on-chip “D" type registers, versatile output enable condition, causing the outputs to be in the high-imped- control through synchronous and asynchronous enable —_ance state. inputs, and flexible st it h oe abe exible startup Sequencing through Pro- 1. exible initialization feature allows start-up and time-out sequencing with 1:16 programmable words to Datais transferred into the output registers onthe rising _be loaded into the output registers. With the synchro- edge of the clock. Provided that the asynchronous (E) _nous INITIALIZE (IS) pin LOW, one of the sixteen col and synchronous (ES) enables are LOW, the data will umn words (A3-AO) will be set in the output registers in- appear at the outputs. Prior to the positive clock edge, dependent of the row addresses (A9~A4). The unpro- register data are not affected by changes in addressing grammed state of IS words are LOW, presenting a ‘or synchronous enable inputs. CLEAR with IS pin LOW. With all IS counts words: P (A3—-A0) rammed to the same pattern, the IS func- Memory expansion and data control is made flexible ton ” be independent of both vow and column ad- with synchronous ard aeyncroncus enable cpus eresaing and may be used as a single pin control. With 5 Outpul . ) progr: IGH, a PI ion i time by sofing E to @ HIGH or # ES fs HIGH when tho aera Poorammed HIGH, a PRESET function i rising clock edge occurs. When V.- power is first ap- a SELECTION GUIDE ashe eT [ene fore CD 3024

24 PD 3024 Enhanced 63RS881A, 53RS881A

(28) PL 028 CL024 Standard 63RS881 53RS881 CFM 024 | ome | [ore | PLEm a taemar ot Advaoed lero Devens. 11208 tusve Date: October 1988 5-201

a BLOCK DIAGRAM ne 1 OF 64 864X128 AT + 4 ROW ry PROGRAMMABLE. 8 —] DECODER ‘ARRAY A

16 PROGRAMMABLE

z . INITIALIZE WORDS Fr d s CUCU UY Ae OF 18 4:16 A Soe =» MULTIPLEXER Pye TP Pd ° 8 BIT EDGE-TRIGGERED ck —> REGISTER sy TTT : SERRE EY Q0 G1 G2 03 4 05 O68 a7 ra1eo1 a PIN CONFIGURATIONS “7 vec [ea] [2} as as p23] M5 yg AT iC, MO As A? VOC AD [3] 45 10 22 noooonn AS _NC AB [a] = fi] we fi srinyey z ¢felsteltesriee _ - ry z [5] 3 5 fog ade ° ais as {e] [eal is oe aly ed? sls [7] [23] eS 10248 mO® —torxe 22 ox arf] toaexs faa] cix Gj a cux [9] wo 2iBI ne vo [a] laa] No [| 10 afd ne E10 20f] a7 nc [to] [20] az on ref] 08 co Qs [=] co os fre] 12 18 1415 16 1718 Coa Fal or os fal ooooooo NC Oe

2 NC_ Ge 1 GND aa 05

[il ce os a1 GND as 0s [2] exo os fs] Plastic Chip Carrier Leadless Chip Carrier /-—osn—4 sa1e0e sa1¢00 sa100 a 5-202 S5Y/63RS881/A

ABSOLUTE MAXIMUM RATINGS Stresses above those listed under “Absolute Maximum Rat- : ings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at Operating Programming these or any other conditions above those indicated in the ‘operational sections of this specification is not implied. Expo- Supply voltage Veg seers 05 V10 7 V ivvneinnninnn42V Sure to Absolute Maximum Rating conditions for extended Input Voltage ...ssesssiseneneee AS V10 7 V susissnnsennne? V periods of time may affect relaibility. Absolute Maximum Rat- Off-state output VORAGE in.-0.5 VIO 5.5 V concn t2¥ — MOttested. Storage temperature... B5°C to +150°C Operating Conditions ta | Britons cb SOs | senorinetomesiocser |e fw] [| fst [is] [ns ss fmmemenen fs fot fat bef fot fo ta _| wwe | fo | fo) fo) [ol | nL eoiomene |» |e )a)] o| slo | a] « * This is defined as the instant-on case temperature." Es + Typicals at 5.0 VV, and 25°C Ty. tt Miltary burn-in is in accordance with the current revision of MiL-STD-883, Test Method 1015, Conditions A through E. Test conditions are selected at AMD's option. ‘SY/63RS881/A 5-203

Electrical Characteristics Over Operating Conditions. For APL Products, Group A, Subgroups 1, 2, 3 are tested unless otherwise noted. ! | aaa | Test tions [san | ror | me | att Ve | wputcamp vonage [vegeta | ge-tema ||| sa |v | toviowtipucron [vecemix | veoev | || -02 | ma i. _| Woriemtneacuron [vecemax | vieveume | || wo [aa ta | eeimtotenn fis [urtem || fo | [com | tyue-32mA_| Von | High-level output voltage | Veg = MIN v rarere " er es Off-state output current —_| V,, = MAX HA i [wea || i te | oaerannceomee [vere [wey | = |_| ow mn * Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second. ** Vj, and V,, are input conditions of output tests and are not themselves directly tested. V,, and V,, are absolute voltages with respect to device ground and include all overshoots due to system and/or tester noise. Do not attempt to test these values t Typicals at 5.0 V Vg and 25°C T,. Switching Characteristics Over Operating Conditions and using Standard Test Load. For APL Products, Group A, subgroups 9, 10, 11 are tested unless otherwise noted.tt cymes | rome (se so wn ee | eocwantmemnenes |v | | fw) la) [a|e eg ee | eaomameriee® fo | j=] [=| a] j~lm tt Subgroups 7 and 8 apply to Functional tests. a 5-204 SYE3RSEB1/A