54ALS86 SS | Alldatasheet

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Technical content

Advanced Low Power Schottky Logic – 54ALS86 Quadruple 2-Input Exclusive OR Gate IC in bare die form  High speed – 3ns (Min) propagation delay  Full Military Temperature Range. Rev 1.0 01/11/22 Features: Die Size (Unsawn) 1500 x 1400 59 x 55 µm mils Minimum Bond Pad Size 130 x 130 5.12 x 5.12 µm mils Die Thickness 350 (±20) 13.78 (±0.79) µm mils Top Metal Composition Al 1%Si 1.1µm Back Metal Composition N/A – Bare Si  Direct drop-in replacement for obsolete components in long term programs.

Ordering Information

The following part suffixes apply:  No suffix - MIL-STD-883 /2010B Visual Inspection The 54ALS86 is fabricated using a 1.5µm 40V Bipolar process. The device contains four independent gates and performs the Boolean functions Y = A ⊕ B = AB + AB in positive logic. The device is characterized over the full Military Temperature Range.

Description

Die Dimensions in µm (mils) 1500 (59) 1400 (55)  “ H” - MIL-STD-883 /2010B Visual Inspection + MIL-PRF-38534 Class H LAT  “ K” - MIL-STD-883 /2010A Visual Inspection (Space) + MIL-PRF-38534 Class K LAT LAT = Lot Acceptance Test. For further information on LAT process flows see below. www.siliconsupplies.com\\quality\\bare-die-lot-qualification Supply Formats: Mechanical Specification  Default – Die in Waffle Pack (100 per tray capacity)  Sawn Wafer on Tape – On request  Unsawn Wafer – On request  Die Thickness <> 350µm(14 Mils) – On request  Assembled into Ceramic Package – On request Page 1 of 4 www.siliconsupplies.com A ll data sheet.com

d Advanced Low Power Schottky Logic – 54ALS86 Rev 1.0 01/11/22 Pad Layout and Functions COORDINATES (mm) 1500µm (59.06 mils) PAD FUNCTION 1400µm (55.12 mils) 0,0 X Y 1 1A 0.100 0.405 2 1B 0.100 0.175 3 1Y 0.495 0.100 4 2A 0.725 0.100 5 2B 0.955 0.100 6 2Y 1.245 0.100 7 GND 1.235 0.575 8 3Y 1.235 0.805 9 3A 1.235 1.075 10 3B 0.753 1.075 11 4Y 0.525 1.075 12 4A 0.270 1.075 13 4B 0.100 0.865 14 VCC 0.100 0.635 CONNECT CHIP BACK TO GND 12 11 10 9 2 3 4 5 Logic Diagram DIE ID Pad 14 = VCC Pad 7 = GND Truth Table INPUTS OUTPUT A B Y L L L L H H H H L H H L Y = A ⊕ B = AB + AB H = High level (steady state) L = Low level (steady state) Page 2 of 4 www.siliconsupplies.com A ll data sheet.com

www.siliconsupplies.com Advanced Low Power Schottky Logic – 54ALS86 Rev 1.0 01/11/22 PARAMETER SYMBOL MIN MAX UNITS Supply Voltage VCC 4.5 5.5 V High-Level Input Voltage VIH 2 - V Low-Level Input Voltage VIL - 0.7 V High-Level Output Current IOH - -0.4 mA Low-Level Output Current IOL - 4 mA Operating Temperature Range TJ -40 +85 °C Recommended Operating Conditions Absolute Maximum Ratings1 PARAMETER SYMBOL VALUE UNIT DC Supply Voltage VCC 7.0 V DC Input Voltage VIN 7.0 V Storage Temperature Range TSTG -65 to 150 °C LIMITS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Minimum High-Level Input Voltage VIH - 2 - - V Maximum Low-Level Input Voltage VIL - - - 0.7 V Input Clamp Diode Voltage VIK VCC = MIN IIN = -18mA - - -1.5 V Output Voltage High VOH VCC = 4.5V to 5.5V, IOH = -0.4mA VCC -2 - - V Output Voltage Low VOL VCC = 4.5V IOL = 4mA - 0.25 0.4 V Input Current IIN VCC = 5.5V, VIN = 7V - - 0.1 mA Input High Current IIH VCC = 5.5V, VIN = 2.7V - - 20 µA Input Low Current IIL VCC = 5.5, VIN = 0.4V - - -0.1 mA Output Current3 IO VCC = 5.5, VOUT = 2.25V -20 - -112 mA Power Supply Current ICC VCC = 5.5V, VIN = 4.5V (All inputs) - 3.9 5.9 mA 2. All typical values @ VCC = 5V, TJ = 25°C. 3. Output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS 1. Operation above the absolute maximum rating may cause device failure. Operation at the absolute maximum ratings, for extended periods, may reduce device reliability. A ll data sheet.com

www.siliconsupplies.com Advanced Low Power Schottky Logic – 54ALS86 Rev 1.0 01/11/22 LIMITS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS tPLH 3 -

22 Propagation Delay,

(other input low) VCC = 4.5 to 5.5V, CL = 50pF, RL = 500Ω ns tPHL 2 - 14 tPLH 3 - 22 Propagation Delay, A or B to output Y (other input high) tPHL VCC = 4.5 to 5.5V, CL = 50pF, RL = 500Ω 2 - 12 ns 4. Not production tested in die form, characterized by chip design and tested in package. Switching Waveforms DISCLAIMER: The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Silicon Supplies Ltd hereby disclaims any and all warranties and liabilities of any kind. LIFE SUPPORT POLICY: Silicon Supplies Ltd components may be used in life support devices or systems only with the express written approval of Silicon Supplies Ltd, if a failure of such components can reasonably be expected to cause the failure of that life support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. DUT CL* OUTPUT TEST POINT Test Circuit * Includes all probe and jig capacitance Figure 1 – Propagation Delay & Timing Figure 2 A ll data sheet.com