27H010 CYPRESS | Alldatasheet

Document overview

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Technical content

Features

  • CMOS for optimum speed/power
  • High speed —t AA = 25 ns max. (commercial) —t AA = 35 ns max. (military)
  • Low power — 275 mW max. — Less than 85 mW when deselected
  • Byte-wide memory organization
  • 100% reprogrammable in thewindowed package
  • EPROM technology
  • Capable of withstanding >2001V static discharge
  • Available in — 32-pin PLCC — 32-pin TSOP-I — 32-pin, 600-mil plastic or hermetic DIP — 32-pin hermetic LCC Functional Description The CY27H010 is a high-performance, 1-megabit CMOS EPROM organized in 128 Kbytes. It is available in indus- try-standard 32-pin, 600-mil DIP , LCC, PLCC, and TSOP-I packages. These devices offer high-density storage com- bined with 40-MHz performance. The CY27H010 is available in windowed and opaque packages. Windowed packages al- low the device to be erased with UV light for 100% re- programmability. The CY27H010 is equipped with a power-down chip enable (CE ) input and output enable (OE). When CE is deasserted, the device powers down to a low-power stand-by mode. The OE pin three-states the outputs without putting the device into stand-by mode. While CE offers lower power, OE provides a more rapid transition to and from three-stated outputs. The memory cells utilize proven EPROM floating-gate technol- ogy and byte-wide intelligent programming algorithms. The EPROM cell requires only 12.75 V for the supervoltage and low programming current allows for gang programming. The device allows for each memory location to be tested 100%, because each location is written to, erased, and repeatedly exercised prior to encapsulation. Each device is also tested for AC performance to guarantee that the product will meet DC and AC specification limits after customer programming. The CY27H010 is read by asserting both the CE and the OE inputs. The contents of the memory location selected by the address on inputs A16–A0 will appear at the outputs O7–O 0. Logic Block Diagram Pin Configurations 14 19 Top View DIP GND A16 A15 A12 A14 VCC PGM A13 O 7 O 6 O 5 O 4 VPP O 0 O 1 O 2 CE OE A10 O 3 A11 NC H010–1 H010–2 O 0 314 32 1 30 14151617 A1 A10 A13 OE CE O 7 Top View LCC/PLCC A14 A11 181920 H010–3 PROGRAMMABLE ARRAY O 0 O 1 O 7 O 2 O 4 O 3 O 5 O 6 ADDRESS DECODER A7 MULTI PLEXER A10 A11 A12 A13 A14 A15 A16 OUTPUT ENABLE DECODER CE OE POWER DOWN

(Above which the useful life may be impaired. For user guide- lines, not tested.) Ambient Temperature with DC Voltage Applied to Outputs (per MIL-STD-883, Method 3015) Note: 1. V CC = Max., IOUT = 0 mA, f=10 MHz. 2. V CC = Max., CE = VIH. 3. Contact a Cypress representative for industrial temperature range specification. 4. T A is the “instant on” case temperature. Pin Configurations (continued) 14 19 Top View TSOP A11 A13 A14 NC VCC VPP A16 A15 A12 OE /VFY A10 CE O 7 O 6 O 5 O 4 O 3 GND O 2 O 1 O 0 PGM H010–4 Selection Guide 27H010–25 27H010–30 27H010–35 Maximum Access Time (ns) 25 30 35 CE Access Time (ns) Com’l 30 30 40 CE Access Time (ns) Mil 40 OE Access Time (ns) Com’l 12 20 20 OE Access Time (ns) Mil 20 ICC [1] (mA) Power Supply Current Com’l 75 75 50 Mil 85 ISB [2] (mA) Stand-by Current Com’l 15 15 15 Mil 25 Operating Range Range Ambient Temperature VCC Commercial 0°C to +70°C 5V ± 10% Industrial[3] –40°C to +85°C 5V ± 10% Military[4] –55°C to +125°C 5V ± 10%

Electrical Characteristics Over the Operating Range[5, 6] 27H010–25 27H010–30 27H010–35 Parameter Description Test Conditions Min. Max. Min. Max. Unit VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 2.4 V VOL Output LOW Voltage VCC = Min., IOL = 12.0 mA 0.45 0.45 V VIH Input HIGH Level Guaranteed Input Logical HIGH Voltage for All Inputs 2.0 VCC +0.5 2.0 VCC +0.5 V VIL Input LOW Level Guaranteed Input Logical LOW Voltage for All Inputs 0.8 0.8 V IIX Input Leakage Current GND < VIN < VCC –10 +10 –10 +10 µA IOZ Output Leakage Current GND < VOUT < VCC , Output Disable –10 +10 –10 +10 µA ICC Power Supply Current VCC =Max., IOUT =0 mA, f=10 MHz Com’l 75 50 mA Mil 85 mA ISB Stand-By Current VCC =Max., CE = VIH Com’l 15 15 mA Mil 25 mA Capacitance[6] Parameter Description Test Conditions Max. Unit C IN Input Capacitance TA = 25°C, f = 1 MHz, VCC = 5.0V 10 pF C OUT Output Capacitance 12 pF Notes: 5. See the last page of this specification for Group A subgroup testing information. 6. See Introduction to CMOS PROMs in this Data Book for general information on testing. AC Test Loads and Waveforms H010–5 H010–6 90% 10% 3.0V GND 90% 10% ALL INPUT PULSES OUTPUT 30 pF INCLUDING JIG AND SCOPE OUTPUT 5 pF INCLUDING JIG AND SCOPE (a) (b) ≤ 3n s ≤ 3 ns OUTPUT R1 318Ω 197Ω 121Ω Equivalent to: THÉVENIN EQUIVALENT 1.91V R1 318Ω 197Ω Switching Characteristics Over the Operating Range 27H010–25 27H010–30 27H010–35 tAA Address to Output Valid 25 30 35 ns tOE OE Active to Output Valid 12 20 20 ns tHZOE OE Inactive to High Z 12 20 20 ns

Wavelengths of light less than 4000 Angstroms begin to erase the CY27H010 in the windowed package. For this reason, an opaque label should be placed over the window if the EPROM is exposed to sunlight or fluorescent lighting for extended pe- riods of time. The recommended dose of ultraviolet light for erasure is a wavelength of 2537 Angstroms for a minimum dose (UV inten- sity multiplied by exposure time) of 25 Wsec/cm2. For an ul- traviolet lamp with a 12 mW/cm 2 power rating, the exposure time would be approximately 35 minutes. The CY27H010 needs to be within 1 inch of the lamp during erasure. Perma- nent damage may result if the EPROM is exposed to high-in- tensity UV light for an extended period of time. 7258 Wsec/cm is the recommended maximum dosage. Programming Modes Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software pack- ages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be ob- tained from any Cypress representative. tCE CE Active to Output Valid 30 30 40 ns tHZCE CE Inactive to High Z 12 20 20 ns tPU CE Active to Power-Up 0 0 0 ns tPD CE Inactive to Power-Down 30 35 40 ns tOH Output Data Hold 0 0 0 ns Switching Characteristics Over the Operating Range (continued) 27H010–25 27H010–30 27H010–35 Switching Waveform H010–7 tPU tCE tAA tPD CE O 0 –O 7 A0 –A 16 OE ICC ADDR A ADDR B tAA DATA A DATA B DATA B tHZOE tOE tHZCEtOH

Table 1. Programming Electrical Characteristics Table 2. Mode Selection

Typical DC and AC Characteristics CLOCK PERIOD (ns) NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE ( °C) OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 120 100 OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE VCC =5.0V TA =25°C –100 –80 –60 –40 –20 OUTPUT VOLTAGE (V) OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 0.0 5.0 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE ( °C) OUTPUT VOLTAGE (V) H010–8 1.1 1.0 0.9 0.8 0.7 0.6 0.0 50 100 150 200 0.5 250 1.7 1.3 1.1 0.7 0.6 4 4.5 5 5.5 6 0.5 VCC =5.5V TA =25°C f= 1 0M H z TA =25°C 0.8 0.9 1.0 1.2 1.4 1.5 1.6 1.25 1.2 1.1 1.0 0.9 0.85 –100 –50 0 50 100 0.8 150 VCC =5.5V f= 1 0MHz 0.95 1.05 1.15 1.15 1.1 1.0 0.95 0.9 4 4.5 5 5.5 6 0.85 1.05 TA= 25°C 1.2 1.25 1.4 1.3 1.2 1.1 1.0 0.9 –100 –50 0 50 100 0.8 150 VCC =4.5V

Document #: 38–00171–D Ordering Information[10] Speed (ns) Ordering Code Package Name Package Type Operating Range

25 CY27H010–25JC J65 32-Lead Plastic Leaded Chip Carrier Commercial

CY27H010–25ZC Z32 32-Lead Thin Small Outline Package

30 CY27H010–30JC J65 32-Lead Plastic Leaded Chip Carrier Commercial

CY27H010–30PC P19 32-Lead (600-Mil) Molded DIP CY27H010–30WC W20 32-Lead (600-Mil) Windowed CerDIP CY27H010–30ZC Z32 32-Lead Thin Small Outline Package

35 CY27H010–35JC J65 32-Lead Plastic Leaded Chip Carrier Commercial

CY27H010–35PC P19 32-Lead (600-Mil) Molded DIP CY27H010–35WC W20 32-Lead (600-Mil) Windowed CerDIP CY27H010–35ZC Z32 32-Lead Thin Small Outline Package CY27H010–35WMB W20 32-Lead (600-Mil) Windowed CerDIP Military CY27H010–35QMB Q55 32-Pin Windowed Rectangular Leadless Chip Carrier Note: 10. Most of the above products are available in industrial temperature range. Contact a Cypress representative for specifications and product availability. DC Characteristics Parameter Subgroups VOH 1, 2, 3 VOL 1, 2, 3 VIH 1, 2, 3 VIL 1, 2, 3 IIX 1, 2, 3 IOZ 1, 2, 3 ICC 1, 2, 3 ISB 1, 2, 3 Switching Characteristics Parameter Subgroups tAA 7, 8, 9, 10, 11 tOE 7, 8, 9, 10, 11 tCE 7, 8, 9, 10, 11

32-Lead Plastic Leaded Chip Carrier J65 32-Pin Windowed Rectangular Leadless Chip Carrier MIL-STD-1835 C-12 32-Lead (600-Mil) Molded DIP P19

© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Package Diagrams (continued) 32-Lead (600-Mil) Windowed CerDIP W20 32-Lead Thin Small Outline Package Z32