HT23C256 HOLTEK | Alldatasheet

Document overview

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Technical content

Features

  • Operating voltage 2.7V~5.5V
  • Low power consumption – Operation: 25mA max. (VCC=5V) 10mA max. (VCC=3V) – Standby: 30µA max. (VCC=5V) 10µA max. (VCC=3V)
  • Access time:150ns max. (VCC=5V) 250ns max. (VCC=3V)
  • 32768×8 bits of mask ROM
  • Mask options: chip enable CE/CE/OE1/OE1 and output enable OE/OE/NC
  • TTL compatible inputs and outputs
  • Tristate outputs
  • Fully static operation
  • Package type: 28-pin DIP/SOP General Description The HT23C256 is a read-only memory with high performance CMOS storage device whose 256K of memory is arranged into 32768 words by 8 bits. For application flexibility, the chip enable and output enable control pins can be selected as active high or active low. This flexibility not only allows easy interface with most microproc- essors, but also eliminates bus contention in multiple bus microprocessor systems. An addi- tional feature of the HT23C256 is its ability to enter the standby mode whenever the chip en- able (CE/ CE) is inactive, thus reducing current consumption to below 30µA. The combination of these functions makes the chip suitable for high density low power memory applications. 1 24th Aug ’98

A0~A14 I Address inputs D0~D7 O Data outputs CE/CE/OE1/OE1 I Chip enable/Output enable input OE/OE/NC I Output enable input VSS I Negative power supply VCC I Positive power supply NC — No connection Operation Truth Table Mode CE/ CE OE/ OE A0~A14 D0~D7 Read H/L H/L Valid Data Out Deselect H/L L/H X High Z Standby L/H X X High Z Note: H=V IH, L=VIL, X=VIH or VIL HT23C256 2 24th Aug ’98

Absolute Maximum Ratings* *Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maxi- mum Ratings” may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability . D.C. Characteristics Supply voltage: 2.7V~3.6V Ta=–40°C to 85°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VCC Conditions VCC Operating Voltage — — 2.7 — 3.6 V ICC Operating Current 3V O/P Unload, f= 5MHz ——1 0 m A VIL Input Low Voltage 3V — V SS — 0.4 V VIH Input High Voltage 3V — 2.0 — V CC V VOL Output Low Voltage 3V I OL= 2.1mA — — 0.4 V VOH Output High Voltage 3V I OH= –0.4mA 2.4 — V CC V ILI Input Leakage Current 3V V IN= 0 to VCC ——1 0 µA ILO Output Leakage Current 3V V OUT= 0 to VCC ——1 0 µA ISTB1 Standby Current 3V CE=VIL CE=VIH —— 5 0 0 µA ISTB2 Standby Current 3V CE≤0.2V CE≥VCC-0.2V ——1 0 µA CIN Input Capacitance (See note) — f= 1MHz — — 10 pF COUT Output Capacitance (See note) — f= 1MHz — — 10 pF Note: These parameters are periodically sampled but not 100% tested. HT23C256 3 24th Aug ’98

Supply voltage: 4.5V~5.5V Ta=–40°C to 85°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VCC Conditions VCC Operating Voltage — — 4.5 — 5.5 V ICC Operating Current 5V O/P Unload, f=5MHz ——2 5 m A VIL Input Low Voltage 5V — V SS — 0.8 V VIH Input High Voltage 5V — 2.2 — V CC V VOL Output Low Voltage 5V I OL=3.2mA — — 0.4 V VOH Output High Voltage 5V I OH=–1mA 2.4 — V CC V ILI Input Leakage Current 5V V IN=0 to VCC ——1 0 µA ILO Output Leakage Current 5V V OUT=0 to VCC ——1 0 µA ISTB1 Standby Current 5V CE=VIL CE=VIH — — 1.5 mA ISTB2 Standby Current 5V CE ≤ 0.2V CE ≥ VCC–0.2V ——3 0 µA CIN Input Capacitance (See note) — f=1MHz — — 10 pF COUT Output Capacitance (See note) — f=1MHz — — 10 pF Note: These parameters are periodically sampled but not 100% tested. A.C. Characteristics Ta=–40°C to 85°C Symbol Parameter VCC=2.7V~3.6V V CC=4.5V~5.5V Unit Min. Max. Min. Max. tCYC Cycle Time 250 — 150 — ns tAA Address Access Time — 250 — 150 ns tACE Chip Enable Access Time — 250 — 150 ns tAOE Output Enable Access Time — 150 — 80 ns tOH Output Hold Time — — 10 — ns tOD Output Disable Time (See Note) — — — 70 ns tOE Output Enable Time (See Note) — — 10 — ns Note: These parameters are periodically sampled but not 100% tested. HT23C256 4 24th Aug ’98

A.C. test conditions Output load: see figure right Input rise and fall time: 10ns Input pulse levels: 0.4V to 2.4V Input and output timing reference levels: 0.8V and 2.0V (VCC=5V), 1.5V (VCC=3V) Timing Diagrams

  • Propagation delay due to address (CE/ CE/OE1/OE1 and OE/OE are active)
  • Propagation delay due to chip enable and output enable (address valid) Functional Description The HT23C256 has two modes, namely data read mode and standby mode, controlled by CE/ CE/OE1/OE1 and OE/OE/NC inputs.
  • Standby mode The HT23C256 has lower current consumption, controlled by the chip enable input (CE/ CE). When a low/high level is applied to the CE/CE input regardless of the output enable (OE/ OE/NC) states the chip will enter the standby mode.
  • Data read mode When both the chip enable (CE/ CE/OE/OE1) and the output enable (OE/OE/NC) are active, the chip is in data read mode. Otherwise, active CE/ CE and inactive OE/ OE/NC result in deselect mode. The output will remain in Hi-Z state. Output load circuit HT23C256 5 24th Aug ’98

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HT23C256 MASK ROM ORDERING SHEET Custom: Input Medium: EPROM DISK File (Mail Address: romfile@holtek.com.tw) OTHER User No. Type/Ref. Name Q’ty Check Sum Memory Address Start End Control Pin and Package Form Option: (a) 28 Pin Type Pin 20: (1) CE (2) CE (3) OE1 (4) OE1 Pin 22: (1) OE (2) OE (3) NC (b) Package Form: (1) Chip Form (2) 28 DIP (3) 28 SOP Companion User No. Package Marking : Delivery Date : Q’ty: CUSTOM CONFIRMED BY: (NAME, DATE, POSITION & CO. CHOP) HOLTEK CONFIRMED BY: (SALES) (SALES MANAGER) HT23C256 8 24th Aug ’98