Z90209 ZILOG | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 2
Technical content
FEATURES
The Z9020X Family of Digital Television Controllers are cost-effective members of the Z8 ® single-chip microcontroller family. The devices provides an ideal performance and reliability solution for consumer and industrial television applications. The Z90209 is the ROMless In-Circuit Emulation (ICE )Chip version of the Z90200 Digital Television Controller Family used in emulators and development boards. The device features an 8-bit internal data path controlled by a Z8 microcontroller, On-Screen Display (OSD) logic circuits, and Pulse Width Modulators (PWM). On-chip peripherals include two register mapped I/O ports (Ports 2 and Port 3), interrupt control logic (one software, two external and three internal interrupts) and a standby mode recovery input port (Port 3, pin P30). The OSD control circuits support ten rows by 24 columns of characters. The character color is specified by character. The OSD inter-row spacing is variable and can be programmed from 0 to 15 horizontal scan lines. The OSD is capable of displaying high resolution (14 x18 dot pattern) characters. A 14-bit PWM port provides enough voltage resolution for a voltage synthesizer tuning system. Ten 8-bit PWM ports are used for controlling audio signal levels to vary picture levels. Three basic address spaces, The Program Memory, Video RAM, and Register File, support a wide range of memory configurations. For applications demanding powerful I/O capabilities, the Z9020X's dedicated input and output lines are grouped into three ports, and are configurable under software control to provide timing, status signals, parallel I/O and an address/data bus for interfacing to external memory. To unburden the program from coping with the real-time problems such as counting/timing and data communication, the Z9020X offers two on-chip counter/timers with a large number of user selectable modes. Notes: All Signals with a preceding front slash, "/", are active Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Circuit Device Power V CC VDD Ground GND VSS ROM RAM* Speed Package n Part (KB) (Kbyte) (MHz) Type Z90209 16 236 6 124-Pin PGA Z90203 16 236 6 42-Pin SDIP Z90202 8 236 6 42-Pin SDIP *General-Purpose n 4.5V to 5.5V Operating Range n 0°C to +70°C Temperature Range n Low-Power Consumption n On-Screen Display (OSD) Logic Circuits n One 14-Bit and One 108-Bit Pulse Width Modulator (PWM) Circuits n 20 Input/Output Lines n Program Memory, Video RAM, and Register File Address Spaces n Two On-Chip Counter/Timers GENERAL DESCRIPTION
GENERAL DESCRIPTION (Continued) Functional Block Diagram Counter Timer Counter Timer 16K Byte Program ROM Oscillator WDT RESET 3-Bit ADC Z8 CPU Core Port 2
256 Byte
R G B VBLANK XTAL1 XTAL2 /RESET ADC0 P30 P31 P34 IR Counter IR Counter Port 3 ADC1 ADC2 ADC3 IRIN P35 PWM 11 (14-Bit) PWM 1 to PWM 10 (8-Bit) PWM11 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 PWM8 PWM9 PWM10 P40 P41 P42 P43 P44 P45 P46 P47