TP65H070LDG-TR TRANSPHORM | Alldatasheet

Document overview

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  • PDF pages: 13

Technical content

Features

  • JEDEC qualified GaN technology
  • Dynamic RDS(on)eff production tested
  • Robust design, defined by — Intrinsic lifetime tests — Wide gate safety margin — Transient over-voltage capability
  • Very low QRR
  • Reduced crossover loss
  • RoHS compliant and Halogen-free packaging Benefits
  • Improves efficiency/operation frequencies over Si
  • Enables AC-DC bridgeless totem-pole PFC designs — Increased power density — Reduced system size and weight — Overall lower system cost
  • Easy to drive with commonly-used gate drivers
  • GSD pin layout improves high speed design

Applications

  • Datacom
  • Broad industrial
  • PV inverter
  • Servo motor

Description

The TP65H070L Series 650V, 72mΩ Gallium Nitride (GaN) FET are normally-off devices. They combine state-of-the-art high voltage GaN HEMT and low voltage silicon MOSFET technologies—offering superior reliability and performance. Transphorm GaN offers improved efficiency over silicon, through lower gate charge, lower crossover loss, and smaller reverse recovery charge. Related Literature

  • AN0003: Printed Circuit Board Layout and Probing
  • AN0007: Recommendations for Vapor Phase Reflow
  • AN0009: Recommended External Circuitry for GaN FETs
  • AN0012: PQFN Tape and Reel Information

Ordering Information

Part Number Package Package Configuration TP65H070LDG-TR 8 x 8mm PQFN Drain TP65H070LSG-TR 8 x 8mm PQFN Source Key Specifications VDSS (V) 650 V(TR)DSS (V) 800 RDS(on)eff (mΩ) max* 85 QRR (nC) typ 89 QG (nC) typ 9.3 * Dynamic on-resistance; see Figures 5 and 6 Cascode Device Structure Cascode Schematic Symbol G D S TP65H070LDG 8x8 PQFN (bottom view) G S D TP65H070LSG 8x8 PQFN (bottom view) * Add “-TR” suffix for tape and reel

Mar 25, 2020 transphormusa.com tp65h070l.2 2 TP65H070L Series Thermal Resistance Symbol Parameter Maximum Unit RΘJC Junction-to-case 1.3 °C/W RΘJA Junction-to-ambient f 62 °C/W Notes: f. Device on one layer epoxy PCB for drain connection (vertical and without air stream cooling, with 6cm2 copper area and 70µm thickness) Absolute Maximum Ratings (Tc=25°C unless otherwise stated.) Symbol Parameter Limit Value Unit VDSS Drain to source voltage (TJ = -55°C to 150°C) 650 V V(TR)DSS Transient drain to source voltage a 800 VGSS Gate to source voltage ±20 PD Maximum power dissipation @TC=25°C 96 W ID Continuous drain current @TC=25°C b 25 A Continuous drain current @TC=100°C b 16 A IDM Pulsed drain current (pulse width: 10µs) 120 A (di/dt)RDMC Reverse diode di/dt, repetitive c 1200 A/µs (di/dt)RDMT Reverse diode di/dt, transient d 2600 A/µs TC Operating temperature Case -55 to +150 °C TJ Junction -55 to +150 °C TS Storage temperature -55 to +150 °C TSOLD Reflow soldering temperature e 260 °C Notes: a. In off-state, spike duty cycle D<0.01, spike duration <1µs b. For increased stability at high current operation, see Circuit Implementation on page 3 c. Continuous switching operation d. ≤300 pulses per second for a total duration ≤20 minutes e. Reflow MSL3

Mar 25, 2020 transphormusa.com tp65h070l.2 3 TP65H070L Series Circuit Implementation Recommended gate drive: (0V, 12V) with RG(tot) = 50-70Ω, where RG(tot) = RG + RDRIVER Simplified Half-bridge Schematic Efficiency vs Output Power Required DC Link RC Snubber (RCDCL) a Recommended Switching Node RC Snubber (RCSN) b, c Gate Ferrite Bead (FB1) [10nF + 10Ω] x 2 68pF + 15Ω 240ohm at 100MHz Notes: a. RCDCL should be placed as close as possible to the drain pin b. A switching node RC snubber (C, R) is recommended for high switching currents (>70% of IRDMC1 or IRDMC2; see page 5 for IRDMC1 and IRDMC2) c. IRDM values can be increased by increasing RG and CSN

Mar 25, 2020 transphormusa.com tp65h070l.2 4 TP65H070L Series Electrical Parameter (TJ=25°C unless otherwise stated) Symbol Parameter Min Typ Max Unit Test Conditions Forward Device Characteristics V(BL)DSS Drain-source voltage 650 — — V VGS=0V VGS(th) Gate threshold voltage 3.3 4 4.8 V VDS=VGS, ID=0.7mA RDS(on)eff Drain-source on-resistance a — 72 85 mΩ VGS=10V, ID=16A,TJ=25°C — 148 — VGS=10V, ID=16A, TJ=150°C IDSS Drain-to-source leakage current — 3 30 µA VDS=650V, VGS=0V, TJ=25°C — 12 — VDS=650V, VGS=0V, TJ=150°C IGSS Gate-to-source forward leakage current — — 100 nA VGS=20V Gate-to-source reverse leakage current — — -100 VGS=-20V CISS Input capacitance — 600 — pF VGS=0V, VDS=400V, f=1MHz COSS Output capacitance — 88 — CRSS Reverse transfer capacitance — 4.5 — CO(er) Output capacitance, energy related b — 131 — pF VGS=0V, VDS=0V to 400V CO(tr) Output capacitance, time related c — 217 — QG Total gate charge — 9.3 — nC VDS=400V, VGS=0V to 10V, ID=16A QGS Gate-source charge — 3.5 — QGD Gate-drain charge — 2.3 — QOSS Output charge — 85 — nC VGS=0V, VDS=0V to 400V tD(on) Turn-on delay — 29 — ns VDS=400V, VGS=0V to 12V, ID=16A, RG=50Ω, ZFB= 240Ω at 100MHz tR Rise time — 7.5 — tD(off) Turn-off delay — 45 — tF Fall time — 8.2 — Notes: a. Dynamic on-resistance; see Figures 5 and 6 for test circuit and conditions b. Equivalent capacitance to give same stored energy as VDS rises from 0V to 400V c. Equivalent capacitance to give same charging time as VDS rises from 0V to 400V

Mar 25, 2020 transphormusa.com tp65h070l.2 5 TP65H070L Series Electrical Parameters (TJ=25°C unless otherwise stated) Symbol Parameter Min Typ Max Unit Test Conditions Reverse Device Characteristics IS Reverse current — — 16 A VGS=0V, TC=100°C, ≤25% duty cycle VSD Reverse voltage a — 1.8 — V VGS=0V, IS=16A — 1.3 — VGS=0V, IS=8A tRR Reverse recovery time — 33 — ns IS=16A, VDD=400V, di/dt=1000A/s QRR Reverse recovery charge — 89 — nC (di/dt)RDMC Reverse diode di/dt, repetitive b — — 1200 A/µs IRDMC1 Reverse diode switching current, repeti- tive (dc) c, e — — 18 A Circuit implementation and parameters on page 3 IRDMC2 Reverse diode switching current, repeti- tive (ac) c, e — — 23 A Circuit implementation and parameters on page 3 (di/dt)RDMT Reverse diode di/dt, transient d — — 2600 A/µs IRDMT Reverse diode switching current, transi- ent d,e — — 28 A Circuit implementation and parameters on page 3 Notes: a. Includes dynamic RDS(on) effect b. Continuous switching operation c. Definitions: dc = dc-to-dc converter topologies; ac = inverter and PFC topologies, 50-60Hz line frequency d. ≤300 pulses per second for a total duration ≤20 minutes e. IRDM values can be increased by increasing RG and CSN on page 3

Mar 25, 2020 transphormusa.com tp65h070l.2 10 TP65H070L Series Design Considerations The fast switching of GaN devices reduces current-voltage crossover losses and enables high frequency operation while simultaneously achieving high efficiency. However, taking full advantage of the fast switching characteristics of GaN switche s requires adherence to specific PCB layout guidelines and probing techniques. Before evaluating Transphorm GaN devices, see application note Printed Circuit Board Layout and Probing for GaN Power Switches. The table below provides some practical rules that should be followed during the evaluation. When Evaluating Transphorm GaN Devices: DO DO NOT Minimize circuit inductance by keeping traces short, both in the drive and power loop Twist the pins of TO-220 or TO-247 to accommodate GDS board layout Minimize lead length of TO-220 and TO-247 package when mounting to the PCB Use long traces in drive circuit, long lead length of the devices Use shortest sense loop for probing; attach the probe and its ground connection directly to the test points Use differential mode probe or probe ground clip with long wire See AN0003: Printed Circuit Board Layout and Probing GaN Design Resources The complete technical library of GaN design tools can be found at transphormusa.com/design:

  • Reference designs
  • Evaluation kits
  • Application notes
  • Design guides
  • Simulation models
  • Technical papers and presentations

Mar 25, 2020 transphormusa.com tp65h070l.2 11 TP65H070L Series Mechanical 8x8 PQFN (LDG) Package

Mar 25, 2020 transphormusa.com tp65h070l.2 12 TP65H070L Series Mechanical 8x8 PQFN (LSG) Package

Mar 25, 2020 transphormusa.com tp65h070l.2 13 TP65H070L Series

Revision History

Version Date Change(s) 0 2/17/2019 Preliminary Datasheet 1 5/15/2019 Datasheet Complete 2.0 1/31/2020 Added AN0007 and MSL3 note . And updated Qg. 2.1 3/25/2020 Add tape and reel option