TNY267PN POWERINT | Alldatasheet
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www.powerint.com February 2009 TNY263-268 TinySwitch-II Family Enhanced, Energy Effi cient, Low Power Off-line Switcher Figure 1. Typical Standby Application.
Description
TinySwitch-II integrates a 700 V power MOSFET, oscillator, high voltage switched current source, current limit and thermal shutdown circuitry onto a monolithic device. The start-up and operating power are derived directly from the voltage on the DRAIN pin, eliminating the need for a bias winding and associated circuitry. In addition, the TinySwitch-II devices incorporate auto-restart, line undervoltage sense, and frequency jittering. An innovative design minimizes audio frequency components in the simple ON/OFF control scheme to practically eliminate audible noise with standard taped/varnished PI-2684-021809 Wide-Range HV DC Input D S EN/UV BP DC Output TinySwitch-II Optional UV Resistor transformer construction. The fully integrated auto-restart circuit safely limits output power during fault conditions such as output short circuit or open loop, reducing component count and secondary feedback circuitry cost. An optional line sense resistor externally programs a line undervoltage threshold, which eliminates power down glitches caused by the slow discharge of input storage capacitors present in applications such as standby supplies. The operating frequency of 132 kHz is jittered to signifi cantly reduce both the quasi-peak and average EMI, minimizing fi ltering cost. Output Power Table Product3
230 VAC ± 15% 85-265 VAC
TNY263 P/G 5 W 7.5 W 3.7 W 4.7 W TNY264 P/G 5.5 W 9 W 4 W 6 W TNY265 P/G 8.5 W 11 W 5.5 W 7.5 W TNY266 P/G 10 W 15 W 6 W 9.5 W TNY267 P/G 13 W 19 W 8 W 12 W TNY268 P/G 16 W 23 W 10 W 15 W Table 1. Output Power Table.
- Minimum continuous power in a typical non-ventilated enclosed adapter
- Minimum practical continuous power in an open frame design with adequate
- Packages: P: DIP-8B, G: SMD-8B. Please see Part Ordering Information.
Figure 2. Functional Block Diagram. Figure 3. Pin Confi guration. current for both start-up and steady-state operation. internally generated 5.8 V supply. through an external resistor connected to the DC line voltage. Output MOSFET source connection for high voltage return.
1.0 V + VT
240 MA5 0 MA
Figure 4. Frequency Jitter.
5.8 V regulator, BYPASS pin undervoltage circuit, over-
block diagram with the most important features. indicates the beginning of each cycle. Figure 4 illustrates the frequency jitter of the TinySwitch-II. optocoupler that is usually connected to this pin. operates from the energy stored in the bypass capacitor. no-load consumption to about 50 mW. MOSFET when the BYPASS pin voltage drops below 4.8 V. back to 5.8 V to enable (turn-on) the power MOSFET. The thermal shutdown circuitry senses the die temperature. The threshold is typically set at 135 °C with 70 °C hysteresis.
Figure 5. TinySwitch-II Auto-Restart Operation. termination of the switching pulse. until the line undervoltage condition ends. exceed 49 μA to initiate switching of the power MOSFET. 850 ms until the line undervoltage condition ends. output voltage is less than the reference voltage. by a TL431 reference circuit for improved accuracy.
Figure 14. 2.5 W Constant Voltage, Constant Current Battery Charger with Universal Input (85-265 VAC). constant power delivery independent of input voltage. decoupling the internal power supply of the TinySwitch-II. conjunction with two input capacitors for input EMI fi ltering. chargers that must work down to zero volts on the output.
2.5 W CV/CC Cell-Phone Charger
0.5 A, cellular phone charger operating over a universal input
Rev. H 02/09 TNY263-268 www.powerint.com up undervoltage threshold is set at 200 VDC, slightly below the lowest required operating DC input voltage, for start-up at 170 VAC, with doubler. This feature saves several components needed to implement the glitch-free turn-off compared with discrete or TinySwitch-II based designs. During turn-on the rectifi ed DC input voltage needs to exceed 200 V undervoltage threshold for the power supply to start operation. But, once the power supply is on it will continue to operate down to
140 V rectifi ed DC input voltage to provide the required hold
up time for the standby output. The auxiliary primary side winding is rectifi ed and fi ltered by D2 and C2 to create a 12 V primary bias output voltage for the main power supply primary controller. In addition, this voltage is used to power the TinySwitch-II via R4. Although not necessary for operation, supplying the TinySwitch-II externally reduces the device quiescent dissipation by disabling the internal drain derived current source normally used to keep the BYPASS pin capacitor (C3) charged. An R4 value of 10 kΩ provides 600 μA into the BYPASS pin, which is slightly in excess of the current consumption of TinySwitch-II. The excess current is safely clamped by an on-chip active Zener diode to 6.3 V. The secondary winding is rectifi ed and fi ltered by D3 and C6. For a 15 W design an additional output capacitor, C7, is required due to the larger secondary ripple currents compared to the 10 W standby design. The auto-restart function limits output current during short circuit conditions, removing the need to over rate D3. Switching noise fi ltering is provided by L1 and C8. The 5 V output is sensed by U2 and VR1. R5 is used to ensure that the Zener diode is biased at its test current and R6 centers the output voltage at 5 V. In many cases the Zener regulation method provides suffi cient accuracy (typically ± 6% over a 0 °C to 50 °C temperature range). This is possible because TinySwitch-II limits the dynamic range of the optocoupler LED current, allowing the Zener diode to operate at near constant bias current. However, if higher accuracy is required, a TL431 precision reference IC may be used to replace VR1. A simple constant current circuit is implemented using the V BE of transistor Q1 to sense the voltage across the current sense resistor R4. When the drop across R4 exceeds the V BE of transistor Q1, it turns on and takes over control of the loop by driving the optocoupler LED. Resistor R6 assures suffi cient voltage to keep the control loop in operation down to zero volts at the output. With the output shorted, the drop across R4 and R6 (~1.2 V) is suffi cient to keep the Q1 and LED circuit active. Resistors R7 and R9 limit the forward current that could be drawn through VR1 by Q1 under output short circuit conditions, due to the voltage drop across R4 and R6. 10 and 15 W Standby Circuits Figures 15 and 16 show examples of circuits for standby applications. They both provide two outputs: an isolated 5 V and a 12 V primary referenced output. The fi rst, using TNY266P, provides 10 W, and the second, using TNY267P, 15 W of output power. Both operate from an input range of
140 VDC to 375 VDC, corresponding to a 230 VAC or 100/115
VAC with doubler input. The designs take advantage of the line undervoltage detect, auto-restart and higher switching frequency of TinySwitch-II. Operation at 132 kHz allows the use of a smaller and lower cost transformer core, EE16 for 10 W and EE22 for 15 W. The removal of pin 6 from the 8 pin DIP TinySwitch-II packages provides a large creepage distance which improves reliability in high pollution environments such as fan cooled power supplies. Capacitor C1 provides high frequency decoupling of the high voltage DC supply, only necessary if there is a long trace length from the DC bulk capacitors of the main supply. The line sense resistors R2 and R3 sense the DC input voltage for line undervoltage. When the AC is turned off, the undervoltage detect feature of the TinySwitch-II prevents auto-restart glitches at the output caused by the slow discharge of large storage capacitance in the main converter. This is achieved by preventing the TinySwitch-II from switching when the input voltage goes below a level needed to maintain output regulation, and keeping it off until the input voltage goes above the undervoltage threshold, when the AC is turned on again. With R2 and R3, giving a combined value of 2 M Ω, the power
eliminate the need for or reduce the cost of circuit components. Other features simplify the design and enhance performance. Table 2. Comparison Between TinySwitch and TinySwitch-II. *Not available. ** See typical performance curves.
85 VAC input, or 240 V or higher for 230 VAC input or
for 230 VAC or 115 VAC with doubler input. A secondary output of 5 V with a Schottky rectifi er diode.
Rev. H 02/09 TNY263-268 www.powerint.com core size and design (continuous or discontinuous), effi ciency, minimum specifi ed input voltage, input storage capacitance, output voltage, output diode forward drop, etc., and can be different from the values shown in Table 1. Audible Noise The TinySwitch-II practically eliminates any transformer audio noise using simple ordinary varnished transformer construction. No gluing of the cores is needed. The audio noise reduction is accomplished by the TinySwitch-II controller reducing the current limit in discrete steps as the load is reduced. This minimizes the fl ux density in the transformer when switching at audio frequencies. Worst Case EMI & Effi ciency Measurement Since identical TinySwitch-II supplies may operate at several different frequencies under the same load and line conditions, care must be taken to ensure that measurements are made under worst case conditions. When measuring effi ciency or EMI verify that the TinySwitch-II is operating at maximum frequency and that measurements are made at both low and high line input voltages to ensure the worst case result is obtained. Layout Single Point Grounding Use a single point ground connection at the SOURCE pin for the BYPASS pin capacitor and the Input Filter Capacitor (see Figure 17). Primary Loop Area The area of the primary loop that connects the input fi lter capacitor, transformer primary and TinySwitch-II together should be kept as small as possible. Primary Clamp Circuit A clamp is used to limit peak voltage on the DRAIN pin at turn- off. This can be achieved by using an RCD clamp (as shown in Figure 14). A Zener and diode clamp (200 V) across the primary or a single 550 V Zener clamp from DRAIN to SOURCE can also be used. In all cases care should be taken to minimize the circuit path from the clamp components to the transformer and TinySwitch-II. Thermal Considerations Copper underneath the TinySwitch-II acts not only as a single point ground, but also as a heatsink. The hatched areas shown in Figure 17 should be maximized for good heat sinking of TinySwitch-II and the same applies to the output diode. EN/UV pin If a line undervoltage detect resistor is used then the resistor should be mounted as close as possible to the EN/UV pin to minimize noise pick up. The voltage rating of a resistor should be considered for the undervoltage detect (Figure 15: R2, R3) resistors. For 1/4 W resistors, the voltage rating is typically 200 V continuous, whereas for 1/2 W resistors the rating is typically 400 V continuous. Y-Capacitor The placement of the Y-capacitor should be directly from the primary bulk capacitor positive rail to the common/return terminal on the secondary side. Such placement will maximize the EMI benefi t of the Y-capacitor and avoid problems in common-mode surge testing. Optocoupler It is important to maintain the minimum circuit path from the optocoupler transistor to the TinySwitch-II EN/UV and SOURCE pins to minimize noise coupling. The EN/UV pin connection to the optocoupler should be kept to an absolute minimum (less than 12.7 mm or 0.5 in.), and this connection should be kept away from the DRAIN pin (minimum of 5.1 mm or 0.2 in.). Output Diode For best performance, the area of the loop connecting the secondary winding, the output diode and the output fi lter capacitor, should be minimized. See Figure 17 for optimized layout. In addition, suffi cient copper area should be provided at the anode and cathode terminals of the diode for adequate heatsinking. Input and Output Filter Capacitors There are constrictions in the traces connected to the input and output fi lter capacitors. These constrictions are present for two reasons. The fi rst is to force all the high frequency currents to fl ow through the capacitor (if the trace were wide then it could fl ow around the capacitor). Secondly, the Constrictions minimize the heat transferred from the TinySwitch-II to the input fi lter capacitor and from the secondary diode to the output fi lter capacitor. The common/return (the negative output terminal in Figure 17) terminal of the output fi lter capacitor should be connected with a short, low impedance path to the secondary winding. In addition, the common/ return output connection should be taken directly from the secondary winding pin and not from the Y-capacitor connection point. PC Board Cleaning Power Integrations does not recommend the use of “no clean” fl u x . For the most up-to-date information visit the PI website at: www.powerint.com.
Figure 17. Recommended Circuit Board Layout for TinySwitch-II with Undervoltage Lock Out Resistor.
Rev. H 02/09 TNY263-268 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 18 (Unless Otherwise Specifi ed) Min Typ Max Units Control Functions Output Frequency fOSC TJ = 25 °C See Figure 4 Average 124 132 140 kHz Peak-Peak Jitter 8 Maximum Duty Cycle DCMAX S1 Open 62 65 68 % EN/UV Pin Turnoff Threshold Current IDIS TJ = -40 °C to 125 °C -300 -240 -170 μA EN/UV Pin Voltage VEN IEN/UV = -125 μA 0.4 1.0 1.5 V IEN/UV = 25 μA 1.3 2.3 2.7 DRAIN Supply Current IS1 VEN/UV = 0 V 430 500 μA IS2 EN/UV Open (MOSFET Switching) See Note A, B TNY263 200 250 μA TNY264 225 270 TNY265 245 295 TNY266 265 320 TNY267 315 380 TNY268 380 460 BYPASS Pin Charge Current I CH1 VBP = 0 V, TJ = 25 °C See Note C, D mA ICH2 VBP = 4 V, TJ = 25 °C See Note C, D Absolute Maximum Ratings(1,4) Operating Junction Temperature Notes: 1. All voltages referenced to SOURCE, T A = 25 °C. 2. Normally limited by internal circuitry. 3. 1/16 in. from case for 5 seconds. 4. Maximum ratings specifi ed may be applied one at a time, without causing permanent damage to the product. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability. Thermal Impedance Thermal Impedance: P or G Package: Notes: 1. Measured on the SOURCE pin close to plastic interface. 2. Soldered to 0.36 sq. in. (232 mm 2), 2 oz. (610 g/m2) copper clad.
Rev. H 02/09 TNY263-268 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 18 (Unless Otherwise Specifi ed) Min Typ Max Units Control Functions (cont.) BYPASS Pin Voltage VBP See Note C 5.6 5.85 6.15 V BYPASS Pin Voltage Hysteresis VBPH 0.80 0.95 1.20 V EN/UV Pin Line Under- Voltage Threshold ILUV TJ = 25 °C 44 49 54 μA Circuit Protection Current Limit ILIMIT TNY263 TJ = 25 °C di/dt = 42 mA/μs See Note E 195 210 225 mA TNY264 TJ = 25 °C di/dt = 50 mA/μs See Note E 233 250 267 TNY265 TJ = 25 °C di/dt = 55 mA/μs See Note E 255 275 295 TNY266 TJ = 25 °C di/dt = 70 mA/μs See Note E 325 350 375 TNY267 TJ = 25 °C di/dt = 90 mA/μs See Note E 419 450 481 TNY268 TJ = 25 °C di/dt = 110 mA/μs See Note E 512 550 588 Initial Current Limit IINIT See Figure 21 TJ = 25 °C 0.65 x ILIMIT(MIN) mA Leading Edge Blanking Time tLEB TJ = 25 °C See Note F 170 215 ns Current Limit Delay tILD TJ = 25 °C See Note F, G 150 ns Thermal Shutdown Temperature 125 135 150 °C Thermal Shutdown Hysteresis 70 °C Output ON-State Resistance RDS(ON) TNY263 ID = 21 mA TJ = 25 °C 33 38 Ω TJ = 100 °C 50 57 TNY264 ID = 25 mA TJ = 25 °C 28 32 TJ = 100 °C 42 48 TNY265 ID = 28 mA TJ = 25 °C 19 22 TJ = 100 °C 29 33
Rev. H 02/09 TNY263-268 www.powerint.com Parameter Symbol Conditions SOURCE = 0 V; TJ = -40 to 125 °C See Figure 18 (Unless Otherwise Specifi ed) Min Typ Max Units Output (cont.) ON-State Resistance RDS(ON) TNY266 ID = 35 mA TJ = 25 °C 14 16 Ω TJ = 100 °C 21 24 TNY267 ID = 45 mA TJ = 25 °C 7.8 9.0 TJ = 100 °C 11.7 13.5 TNY268 ID = 55 mA TJ = 25 °C 5.2 6.0 TJ = 100 °C 7.8 9.0 OFF-State Drain Leakage Current IDSS VBP = 6.2 V, VEN/UV = 0 V, VDS = 560 V, TJ = 125 °C TNY263-266 50 μA TNY267-268 100 Breakdown Voltage BVDSS VBP = 6.2 V, VEN/UV = 0 V, See Note H, TJ = 25 °C 700 V Rise Time tR Measured in a Typical Flyback Converter Application 50 ns Fall Time tF 50 ns Drain Supply Voltage 50 V Output EN/UV Delay tEN/UV See Figure 20 10 μs Output Disable Setup Time tDST 0.5 μs Auto-Restart ON-Time tAR TJ = 25 °C See Note I 50 ms Auto-Restart Duty Cycle DCAR 5.6 % NOTES: Total current consumption is the sum of IS1 and IDSS when EN/UV pin is shorted to ground (MOSFET not switching) and the sum of IS2 and IDSS when EN/UV pin is open (MOSFET switching). Since the output MOSFET is switching, it is diffi cult to isolate the switching current from the supply current at the DRAIN. An alternative is to measure the BYPASS pin current at 6.1 V. BYPASS pin is not intended for sourcing supply current to external circuitry. See Typical Performance Characteristics section for BYPASS pin start-up charging waveform. For current limit at other di/dt values, refer to Figure 25. This parameter is derived from characterization. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the I LIMIT specifi cation. Breakdown voltage may be checked against minimum BVDSS specifi cation by ramping the DRAIN pin voltage up to but not exceeding minimum BVDSS. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional to frequency).
Figure 19. TinySwitch-II Duty Cycle Measurement. Figure 20. TinySwitch-II Output Enable Timing. Figure 18. TinySwitch-II General Test Circuit.
5 W S2
NOTE: This test circuit is not applicable for current limit or output characteristic measurements. Figure 21. Current Limit Envelope.
Rev. H 02/09 TNY263-268 www.powerint.com Notes: 1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing. 2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 4. Pin locations start with Pin 1, and continue counter-clock- wise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 6 is omitted. 5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 6. Lead width measured at package body. 7. Lead spacing measured with the leads constrained to be perpendicular to plane T. .008 (.20) .015 (.38) .300 (7.62) BSC (NOTE 7) .300 (7.62) .390 (9.91) .367 (9.32) .387 (9.83) .240 (6.10) .260 (6.60) .125 (3.18) .145 (3.68) .057 (1.45) .068 (1.73) .120 (3.05) .140 (3.56) .015 (.38) MINIMUM .048 (1.22) .053 (1.35) .100 (2.54) BSC .014 (.36) .022 (.56) -E- Pin 1 SEATING PLANE -D- -T- P08B DIP-8B PI-2551-121504 D S .004 (.10)⊕ T E D S .010 (.25) M⊕ (NOTE 6) .137 (3.48) MINIMUM
Rev. H 02/09 TNY263-268 www.powerint.com SMD-8B PI-2546-121504 .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) .004 (.10) 0 - ° 8° .367 (9.32) .387 (9.83) .032 (.81) .037 (.94) .125 (3.18) .145 (3.68) -D- Notes: 1. Controlling dimensions are inches. Millimeter sizes are shown in parentheses. 2. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side. 3. Pin locations start with Pin 1, and continue counter-clock- wise to Pin 8 when viewed from the top. Pin 6 is omitted. 4. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. Lead width measured at package body. 6. D and E are referenced datums on the package body..057 (1.45) .068 (1.73) (NOTE 5) E S .100 (2.54) (BSC) .137 (3.48) MINIMUM -E- Pin 1 D S .004 (.10)⊕ G08B .420 .046 .060 .060 .046 .080Pin 1 .086 .186 .286 Solder Pad Dimensions Part Ordering Information
- TinySwitch Product Family
- Series Number
- Package Identifi er G Plastic Surface Mount SMD-8B P Plastic DIP-8B
- Lead Finish Blank Standard (Sn Pb) N Pure Matte Tin (RoHS Compliant) G RoHS Compliant and Halogen Free (P package only)
- Tape & Reel and Other Options Blank Standard Confi gurations TL Tape & Reel, 1 k pcs minimum, G Package only.TNY 264 G N - TL
Rev. H 02/09 TNY263-268 www.powerint.com Revision Notes Date A– 03/01 B Corrected fi rst page spacing and sentence in description describing innovative design. Corrected Frequency Jitter in Figure 4 and Frequency Jitter in Parameter Table. Added last sentence to Over Temperature Protection section. Clarifi ed detecting when there is no external resistor connected to the EN/UV pin. Corrected Figure 6 and its description in the text. Corrected formatting, grammar and style errors in text and fi gures. Corrected and moved Worst Case EMI & Effi ciency Measurement section. Added PC Board Cleaning section. Replaced Figure 21 and SMD-8B Package Drawing. C Corrected q JA for P/G package. Updated Figures 15 and 16 and text description for Zener performance. Corrected DIP-8B and SMD-8B Package Drawings. D Corrected EN/UV under-voltage threshold in text. Corrected 2 MW connected between positive DC input to EN/UV pin in text and Figures 15 and 16. E Added TNY263 and TNY265. 04/04 F Added lead-free ordering information. 12/04 G 1) Typographical correction in OFF-STATE Drain Leakage Current parameter condition. 2) Removed I DS condition from BVDSS parameter and added new Note H. 3) Added Note 4 to Absolute Maximum Ratings specifi cations. H Reformatted document, updated Figures 23 and 24 and Part Ordering Information. 02/09
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