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[v1-12] 2020-Jul-28 Document Feedback TCS3430 Color and ALS Sensor The device features advanced digital Ambient Light Sensing (ALS) and CIE 1931 Tristimulus Color Sensing (XYZ). Each of the channels has a filter to control its optical response, which allows the device to accurately measure ambient light and sense color. These measurements are used to calculate chromaticity, illuminance and color temperature, all of which are used to support various potential applications. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of the TCS3430, Color and ALS Sensor are listed below: Figure 1: Added Value of Using TCS3430
Applications
The TCS3430 applications include:
- Display management
- Camera image correction and enhancement
- Color sensing
- Ambient light sensing
- Optical identification
- Color matching Benefits Features
- Improves ALS responsiveness of the system • Capable of ±10% illuminance and correlated color temperature accuracy
- Reduces board space requirements and enables low-profile system design
- Small footprint and low profile package: 2.41mm x 1.75mm x 1.00mm
- Improves ALS response for more accurate measurement of lighting environment • Advanced interference filter technology
- Enables accurate color and ALS sensing under varying lighting conditions and behind dark glass
- Wide dynamic range and high sensitivity
- Enables accurate color temperature calculations and ambient light sensing
- XYZ tristimulus filters
- Programmable gain and integration time
- Low power consumption • 1.8V supply voltage and I²C bus General Description
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − General Description Block Diagram The functional blocks of this device are shown below: Figure 2: TCS3430 Block Diagram Wa it Control I²C Interface Y IR1 Lower Upper INT SCL SDA VDD GND ALS Thresholds CH0 ADC CH1 ADC CH0 Data ALS Control CH1 Data Interrupt Out / Threshol d Status IR2 CH2 ADC CH3 ADC CH2 Data CH3 Data Z X GND
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Pin Assignment Figure 3: TCS3430 Pinout (Top View) Figure 4: Pin Description Pin Number Pin Name Description
1 VDD Supply voltage
2 SDA I²C serial data I/O terminal
3 SCL I²C serial clock input terminal
4 INT Interrupt. Open drain output (active low) 5 N/C No connection. May be connected to Ground or not connected. N/C No connection. May be connected to Ground or not connected. 7 GND Ground. All voltages are referenced to GND 8 GND Ground. All voltages are referenced to GND Pin Assignment 9'' 6'$ 6&/ ,17 1& *1' *1'
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure 5: Absolute Maximum Ratings Symbol Parameter Min Max Units VDD Supply voltage -0.3 2.2 V VIO Digital I/O terminal voltage -0.3 3.6 V IIO Output terminal current -1 20 mA TSTRG Storage temperature range -40 85 ºC TJ Junction temperature range -40 90 ºC ESDHBM Electrostatic discharge HBM (JS-001-2014) ±2000 V ESDCDM Electrostatic discharge CDM JEDEC JESD22-C101F Oct 2013 ±500 V ISCR Input current (latch up immunity) JEDEC JESD78D Nov 2011 CLASS 2 Absolute Maximum Ratings
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Electrical Characteristics Figure 10: ALS Operating Characteristics, VDD = 1.8V, T A = 25°C, AGAIN = 16x, ATIME = 0x09 (27ms) (unless otherwise noted) Parameter Conditions Min Typ Max Units Integration time step size 2.64 2.78 2.92 ms Dark ADC count value Ee = 0 μW/cm2 AGAIN: 64x ATIME: 100ms (0x23) 013 c o u n t s Gain scaling, relative to 1x gain setting AGAIN: 4x 4 AGAIN: 16x 16 AGAIN: 64x 66 AGAIN: 128x 137 ADC noise AGAIN: 16x 0.005 % full scale
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − I²C Protocol The device uses I²C serial communication protocol for communication. The device support s 7-bit chip addressing and both standard and full-speed cl ock frequency modes. Read and Write transactions comply with th e standard set by Philips (now NXP). Note(s): The I²C device address can be found in Ordering Information . Internal to the device, an 8-bit buffer stores the register address location of the desired byte to read or write. This buffer auto-increments upon each byte transfer and is retained between transaction events (I.e. valid even after the master issues a STOP command and the I²C bus is released). During consecutive Read transactions, the future/repeated I²C Read transaction may omit the memory address byte normally following the chip address byte; the buffer retains the last register address +1. All 16-bit fields have a latching scheme for reading and writing. In general it is recommended to use I²C bursts whenever possible, especially in this ca se when accessing two bytes of one logical entity. When reading these fields, the low byte must be read first, and it triggers a 16-bit latch that stores the 16-bit field. The high byte must be read immediately afterwards. When writing to these fields, the low byte must be written first, immediately followed by the high byte. Reading or writing to these registers without following these requirements will cause errors. I²C Write Transaction A Write transaction consists of a START, CHIP-ADDRESSWRITE, REGISTER-ADDRESS WRITE, DATA BYTE(S), and STOP . Following each byte (9TH clock pulse) the slave places an ACKNOWLEDGE/NOT- ACKNOWLEDGE (ACK/NACK) on the bus. If NACK is transmitted by the slave, the master may issue a STOP . I²C Read Transaction A Read transaction consists of a START, CHIP-ADDRESSWRITE, REGISTER-ADDRESS, RESTART, CHIP-ADDRESSREAD, DATA BYTE(S), and STOP . Following all but the final byte the master places an ACK on the bus (9TH clock pulse). Termination of the Read transaction is indicated by a NACK being placed on the bus by the master, followed by STOP . The I²C bus protocol was develo ped by Philips (now NXP). For a complete description of the I²C protocol, please review the NXP I²C design specification. I²C Protocol
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Register Description Figure 13: Register Overview Note(s): 1. Register Access: R = Read Only W = Write Only R/W = Read or Write SC = Self Clearing after access Address Register Name R/W Register Function Reset Value 0x80 ENABLE R/W Enables states and interrupts 0x00 0x81 ATIME R/W ADC integration time 0x00 0x83 WTIME R/W ALS wait time 0x00 0x84 AILTL R/W ALS interrupt low threshold low byte 0x00 0x85 AILTH R/W ALS interrupt low threshold high byte 0x00 0x86 AIHTL R/W ALS interrupt high threshold low byte 0x00 0x87 AIHTH R/W ALS interrupt high threshold high byte 0x00 0x8C PERS R/W ALS interrupt persistence filters 0x00 0x8D CFG0 R/W Configuration register zero 0x80 0x90 CFG1 R/W Configuration register one 0x00 0x91 REVID R Revision ID 0x41 0x92 ID R Device ID 0xDC 0x93 STATUS R Device status register one 0x00 0x94 CH0DATAL R Z CH0 ADC Low Byte Register 0x00 0x95 CH0DATAH R Z CH0 ADC High Byte Register 0x00 0x96 CH1DATAL R Y Ch1 ADC Low Byte Register 0x00 0x97 CH1DATAH R Y CH1 ADC High Byte Register 0x00 0x98 CH2DATAL R IR1 - CH2 ADC Low Byte Register 0x00 0x99 CH2DATAH R IR1 - Ch2 ADC High Byte Register 0x00 0x9A CH3DATAL R X or IR2 - CH3 ADC Low Byte Register 0x00 0x9B CH3DATAH R X or IR2 - CH3 ADC High Byte Register 0x00 0x9FC F G2 R/W Configuration register two 0x04 0xAB CFG3 R/W Configuration register three 0x0C 0xD6 AZ_CONFIG R/W Auto zero configuration 0x7F 0xDD INTENAB R/W Interrupt enables 0x00 Register Description
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Register Description ENABLE Register (0x80) Figure 14: ENABLE Register The mode/parameter fields should be written before AEN is asserted. The function AEN requires PON to be asserted to operate correctly. 0x80: ENABLE Field Name Reset Type Description 7:4 RESERVED 0 RW Reserved 3W E N0 R W Wait Enable. This bit activates the wait feature. Writing a one actives the wait timer. Writing a zero disables the wait timer.
2 RESERVED 0 RW Reserved
ALS Enable. This bit actives the ALS function. Set aen=1 and pon=1 in the same command to ensure autozero function is run prior to the first measurement. 0P O N0 R W Power ON. This field activates the internal oscillator to permit the timers and ADC channels to operate. Writing a one activates the oscillator. Writing a zero disables the oscillator.
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Register Description ATIME Register (0x81) Figure 15: ATIME Register The ATIME register controls th e integration time of the ALS ADCs. The timer is implemented with a down counter with 0x00 as the terminal count. The timer is cl ocked at a 2.78ms nominal rate. Loading 0x00 will generate a 2. 78ms integration time, loading 0x01 will generate a 5.56ms integration time, and so forth. 0x81: ATIME Field Name Reset Type Description 7:0 ATIME 0x00 RW Integration Time. Eight bit value that specifies the integration time The maximum ALS value depends on the integration time. For every 2.78ms, the maximum value increases by 1024. This means that to be able to reach ALS full scale, the integration time has to be at least 64*2.78ms. Value Integration Cycles Integration Time Maximum ALS Value 0x00 1 2.78ms 1023 0x01 2 5.56ms 2047 0x11 18 50ms 18431 0x40 65 181ms 65535 0xff 256 711ms 65535
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Register Description AILTH Register (0x85) Figure 18: AIL TH Register This register provides the high byte of the low interrupt ALS (Channel 0) threshold. The contents of the AILTH and AILTL registers are combined and treated as a sixteen bit threshold. If the value generated by Channel 0 is below the low threshold specified and the APERS value is reached, the aint bit is asserted which will assert the INT pin if aien is set. There is an 8-bit data latch impl emented that stores the written low byte until the high byte is written. Both bytes will be applied then at the same time to avoid an invalid threshold (e.g. when going from 0x00ff to 0x0100, the invalid intermediate value 0x0000 is suppressed. This implies that 1) the LSB cannot be changed without writin g to the MSB and 2) that writing to the LSB of one 16-bit value and afterwards to the MSB of another 16-bit register will write all 16 bits to the MSB related register. 0x85: AILTH Field Name Reset Type Description 7:0 AILTH 0x00 RW High Byte of the Low Threshold
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Register Description PERS Register (0x8C) Figure 21: PERS Register This register controls the interrupt filtering capabilities of the device. Configurable filtering is provided to allow interrupts to be generated after either an AL S integration cycle or if the integration cycle has produced a result that is outside of the values specified by threshold register for some specified number of times. ALS interrupts are generated by looking only at the ADC integration results of Channel 0 photodiode. 0x8C: PERS Field Name Reset Type Description 7:4 RESERVED 0 RW Reserved 3:0 APERS 0 RW Value Interrupt Generated When... 0E v e r y A L S c y c l e
1 Any ALS value outside of threshold range
2 2 consecutive ALS values out of range 3 3 consecutive ALS values out of range 45 . . . 51 0 . . . 61 5 . . . 72 0 . . . 12 45... 13 50... 14 55... 15 60 consecutive ALS values out of range
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Register Description CFG0 Register (0x8D) Figure 22: CFG0 Register CFG1 Register (0x90) Figure 23: CFG1 Register CFG1 Register: Register CFG1 sets the gain level for ALS measurements. The valid range of values is 0x00 - 0x03. 0x8D: CFG0 Field Name Reset Type Description 7:3 RESERVED 1 0 0 0 0 RW Reserved. Must be set to 10000. 2W L O N G 0 R W Wait Long. When asserted, the wait cycle is increased by a factor 12x from that programmed in the WTIME register. 1:0 RESERVED 0 0 RW Reserved. Must be set to 00.0x90: CFG1 Field Name Reset Type Description 7:4 RESERVED 0 RW Reserved 3A M U X 0 R W ALS Multiplexer. Sets the CH3 input. Default = 0 (X Channel). Set to 1 to read IR2. 1:0 AGAIN 0 RW ALS Gain Control. Sets the gain of the ALS DAC. Field Value Gain 00 1x 01 4x 10 16x 11 64x
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Register Description REVID Register (0x91) Figure 24: REVID Register ID Register (0x92) Figure 25: ID Register 0x91: REVID Field Name Reset Type Description 7:3 RESERVED 01000 RO Reserved 2:0 REV_ID 001 RO Revision Number Identification 0x92: ID Field Name Reset Type Description 7:2 ID 110111 RO Part Number Identification Value Meaning
110111 TCS3430
1:0 RESERVED 00 RO Reserved
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Register Description CFG3 Register (0xAB) Figure 36: CFG3 Register Note(s): 1. SAI does not modify any register bits directly, it rath er uses the interrupt signal to turn OFF the oscillator. 0xAB: CFG3 Field Name Reset Type Description
7 INT_READ_CLEAR 0 RW If this bit is set, all flag bits in the STATUS register will be
reset whenever the STATUS register is read over I2C. 6:5 RESERVED 0 RW Reserved. Set to 0. 4S A I0 R W Sleep After Interrupt. Power down the device at the end of the ALS cycle if an interrupt has been generated. (1) PON SAI INT (low active) Oscillator 0x x O F F 10 x O N 11 1 O N 11 0 OFF (SAI induced sleep) The way to “wake up” the device from SAI-sleep is by clearing the interrupt register 0x93. 3:0 RESERVED 1100 RW Reserved. Can be set to any value; no functional effect.
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Application Information Figure 39: Typical Application Hardware Circuit Note(s): 1. Place the 1μF capacitors as close as possible to the module. 2. V DD = 1.8V, V BUS = 1.8V. 3. The N/C pins (5 and 6) that are not indicated in the circui t diagram may be connected to GND or not connected (remain open).
Application Information
1.8V VBUS INT SCL SDA 4.7µF R = 22Ω TCS3430 GND VDD GND INT SCL SDA RPU (x3) = 2.2KΩ 1μF
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Application Information Application Optical Requirements For optimal performance an achromatic diffuser shall be placed above the device aperture. The recommended solution is a bulk diffuser that meets the minimum recommended scattering characteristic shown below. For mo re details refer to the Optical Design Guide or contact ams. Figure 40: Diffuser Characteristics 20% 40% 60% 80% 100% 120% -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 Normalized Response Angle (degrees) Cosine (reference) Minimum Scatter Recommendation
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − PCB Pad Layout Figure 41: Recommended PCB Pad Layout Note(s): 1. All linear dimensions are in millimeters. 2. Dimension tolerances are 0.05mm unless otherwise noted. 3. This drawing is subject to change without notice. 4. Layout as shown when viewed from above. PCB Pad Layout 3,1 3&%3$'/$<287
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Packaging Mechanical Data Figure 42: Package Drawing Note(s): 1. All linear dimensions are in millimeters. 2. Contact finish is Au. 3. This package contains no lead (Pb). 4. This drawing is subject to change without notice. Packaging Mechanical Data & $% 3,1 0 & $% 0 & $% Green RoHS TOP VIEW BOTTOM VIEW
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Tape & Reel Information Figure 43: Tape & Reel Information Note(s): 1. All linear dimensions are in millimeters. 2. For missing tolerances and dimensions, refer to EIA-481. Tape & Reel Information
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Soldering & Storage Information Storage Information Moisture Sensitivity Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previous ly absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping. Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. Shelf Life The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on the bag when stored under the following conditions:
- Shelf Life: 12 months
- Ambient Temperature: <40°C
- Relative Humidity: <90% Rebaking of the devices will be required if the devices exceed the 12 month shelf life or the Humidity Indicator Card shows that the devices were exposed to conditions beyond the allowable moisture region. Floor Life The module has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices are stored under the following conditions:
- Floor Life: 168 hours
- Ambient Temperature: <30°C
- Relative Humidity: <60% If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior to solder reflow or dry packing. Rebaking Instructions When the shelf life or floor life limits have been exceeded, rebake at 50°C for 12 hours.
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Ordering & Contact Information Figure 46:
Ordering Information
Buy our products or get free samples online at: www.ams.com/Products Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/Contact Headquarters ams AG Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Ordering Code I²C Bus I²C Addr Delivery Form Delivery Quantity TCS34303 1.8V 0x39 Tape & Reel (13”) 10000 pcs/reel Ordering & Contact Information
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories plus additional 4 substance categories (per amendment EU 2015/863), including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br/Cl): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) and do not contain Chlorine (Cl not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used with out the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applic ations requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Revision Information Note(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from 1-11 (2019-Aug-05) to current revision 1-12 (2020-Jul-28) Page Updated Figure 13 10 Updated CFG3 Register 22 Revision Information
Document Feedback [v1-12] 2020-Jul-28 TCS3430 − Content Guide
1 General Description
1 Key Benefits & Features
1 Applications
2 Block Diagram
3 Pin Assignment
4A b s o l u t e M a x i m u m R a t i n g s
5 Electrical Characteristics
10 I²C Protocol
10 I²C Write Transaction
10 I²C Read Transaction
11 Register Description
12 ENABLE Register (0x80)
13 ATIME Register (0x81)
14 WTIME Register (0x83)
14 AILTL Register (0x84)
15 AILTH Register (0x85)
16 AIHTL Register (0x86)
16 AIHTH Register (0x87)
17 PERS Register (0x8C)
18 CFG0 Register (0x8D)
18 CFG1 Register (0x90)
19 REVID Register (0x91)
19 ID Register (0x92)
20 STATUS Register (0x93)
20 CH0DATAL Register (0x94)
20 CH0DATAH Register (0x95)
21 CH1DATAL Register (0x96)
21 CH1DATAH Register (0x97)
21 CH2DATAL Register (0x98)
21 CH2DATAH Register (0x99)
22 CH3DATAL Register (0x9A)
22 CH3DATAH Register (0x9B)
22 CFG2 Register (0x9F)
23 CFG3 Register (0xAB)
24 AZ_CONFIG Register (0xD6)
24 INTENAB Register (0xDD)
27 PCB Pad Layout
28 Packaging Mechanical Data
29 Tape & Reel Information
30 Soldering & Storage Information
31 Storage Information
31 Moisture Sensitivity
31 Shelf Life
31 Floor Life
31 Rebaking Instructions
[v1-12] 2020-Jul-28 Document Feedback TCS3430 − Content Guide