TCS3472_17 AMSCO | Alldatasheet
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[v1-02] 2016-Feb-08 Document Feedback TCS3472 Color Light-to-Digital Converter with IR Filter The TCS3472 device provides a digital return of red, green, blue (RGB), and clear light sensing values. An IR blocking filter, integrated on-chip and localized to the color sensing photodiodes, minimizes the IR spectral component of the incoming light and allows color measurements to be made accurately. The high sensitivity, wide dynamic range, and IR blocking filter make the TCS3472 an ideal color sensor solution for use under varying lighting conditions and through attenuating materials. The TCS3472 color sensor has a wide range of applications including RGB LED backlight control, solid-state lighting, health/fitness products, industrial process controls and medical diagnostic equipment. In addition, the IR blocking filter enables the TCS3472 to perform ambient light sensing (ALS). Ambient light sensing is widely used in display-based products such as cell phones, notebooks, and TVs to sense the lighting environment and enable automatic display brightness for optimal viewing and power savings. The TCS3472, itself, can enter a lower-power wait state between light sensing measurements to further reduce the average power consumption. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of TC S3472, Color Light-to-Digital Converter with IR Filter are listed below: Figure 1: Added Value of Using TCS3472 Benefits Features
- Enables accurate color and light sensing measurements under varying lighting conditions by minimizing IR and UV spectral component effects
- Red, Green, Blue (RGB), and Clear Light
- Sensing with IR blocking filter
- Programmable analog gain and integration time
- 3,800,000:1 dynamic range
- Very high sensitivity - ideally suited for operation behind dark glass
- Programmable interrupt pin enables level-style interrupts when pre-set values are exceeded, thus reducing companion micro-processor overhead
- Maskable interrupt
- Programmable upper and lower thresholds with persistence filter General Description
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − General Description
Applications
The applications of TCS3472 include:
- RGB LED backlight control
- Light color temperature measurement
- Ambient light sensing for display backlight control
- Fluid and gas analysis
- Product color verification and sorting End Products and Market Segments
- TVs, mobile handsets, tablet s, computers, and monitors
- Consumer and commercial printing
- Medical and health fitness
- Solid state lighting ( SSL) and digital signage
- Industrial automation
- Enabling a low-power wait-state between RGBC measurements to reduce average power consumption
- Power management
- Low power - 2.5μA sleep state
- 65μA wait state with programmable wait state time from 2.4ms to > 7 seconds
- Digital interfaces are less susceptible to noise
- I²C fast mode compatible interface
- Data rates up to 400 kbit/s
- Input voltage levels compatible with V DD or 1.8 VBUS
- Backward compatibility enables interchangeability and re-usability in systems
- Register set and pin compatible with the TCS3x71 series
- Reduces PCB space requirements while simplifying designs
- Small 2mm x 2.4mm dual flat no-lead
- FN package Benefits Features
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − General Description Block Diagram The functional blocks of this device are shown below: Figure 2: Functional Block Diagram
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Detailed Description The TCS3472 light-to-digital converter contains a 3 × 4 photodiode array, four analog-to-digital converters (ADC) that integrate the photodiode current, data registers, a state machine, and an I²C interface. The 3 × 4 photodiode array is composed of red-filtered, green-filtered, blue-filtered, and clear (unfiltered) photodiodes. In addition, the photodiodes are coated with an IR-blocking filter. The four integrating ADCs simultaneously convert the amplified photodiode currents to a 16-bit digital value. Upon comple tion of a conversion cycle, the results are transferred to the data registers, which are double-buffered to ensure the in tegrity of the data. All of the internal timing, as well as the low-power wait state, is controlled by the state machine. Communication of the TCS3472 data is accomplished over a fast, up to 400 kHz, two-wire I²C serial bus. The industry standard I²C bus facilitates easy, direct connection to microcontrollers and embedded processors. In addition to the I²C bus, the TCS3472 provides a separate interrupt signal output. When interrupts are enabled, and user-defined thresholds are exceeded, the active-low interrupt is asserted and remains asserted until it is cleared by the controller. This interrupt feature simplifies and improves the efficiency of the system software by eliminating the need to poll the TCS3472. The user can define the upper and lower interrupt thresholds and apply an interrupt persistence filter. The interrupt persistence filter allows the user to define the number of consecutive out-of-threshold events necessary before generating an interrup t. The interrupt output is open-drain, so it can be wire-ORed with other devices. Detailed Description
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Pin Assignment The TCS3472 pin assignment is described below. Figure 3: Pin Diagram Figure 4: Pin Description Package FN Dual Flat No-Lead (Top View): Package drawing is not to scale. Pin Number Pin Name Pin Type Description
1 VDD Supply voltage
2 SCL Input I²C serial clock input terminal – clock signal for I²C serial data
3 GND Power supply ground. All voltages are referenced to GND
4 NC Output No connect - do not connect
5 INT Output Interrupt - open drain (active low). 6 SDA Input/Output I²C serial data I/O terminal - serial data I/O for I²C. Pin Assignment VDD 1 SCL 2 GND 3
6 SDA
5 INT
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Figure 5: Absolute Maximum Ratings over Operating Free-Air Temperature Range (unless otherwise noted) Parameter Min Max Units Comments Supply voltage, VDD 3.8 V All voltages are with respect to GND Input terminal voltage - 0.5 3.8 V Output terminal voltage - 0.5 3.8 V Output terminal current - 1 20 mA Storage temperature range, T strg - 40 85 ºC ESD tolerance, human body model ±2000 V Absolute Maximum Ratings
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Electrical Characteristics Figure 8: Optical Characteristics, V DD=3 V, TA= 25ºC, AGAIN = 16, ATIME = 0xF6 (unless otherwise noted) (1) Notes: 1. The percentage shown represents the ra tio of the respective red, green, or blue channel value to the clear channel value. 2. The 465 nm input irradiance is supplied by an InGaN light-em itting diode with the following characteristics: dominant wavele ngth λD = 465 nm, spectral halfwidth Δλ½ = 22 nm. 3. The 525 nm input irradiance is supplied by an InGaN light-em itting diode with the following characteristics: dominant wavele ngth λD = 525 nm, spectral halfwidth Δλ½ = 35 nm. 4. The 615 nm input irradiance is supplied by a AlInGaP light-em itting diode with the following characteristics: dominant wavel ength λD = 615 nm, spectral halfwidth Δλ½ = 15 nm. Parameter Test Conditions Red Channel Green Channel Blue Channel Clear Channel Unit Min Max Min Max Min Max Min Typ Max Re Irradiance responsivity λD = 465 nm(2) 0% 15% 10% 42% 65% 88% 11.0 13.8 16.6 counts /μW /cm2 λD = 525 nm(3) 4% 25% 60% 85% 10% 45% 13.2 16.6 20.0 λD = 615 nm(4) 80% 110% 0% 14% 5% 24% 15.6 19.5 23.4
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Principles of Operation System States An internal state machine provides system control of the RGBC and power management features of the device. At power up, an internal power-on-reset initia lizes the device and puts it in a low-power Sleep state. When a start condition is detected on the I²C bus, the device transitions to the Idle state where it checks the Enable Register (0x00) PON bit. If PON is disabled, the device will return to the Sleep state to save power. Otherwise, the device will remain in the Idle state until the RGBC function is enabled (AEN). Once enabled, the device will execute the Wait and RGBC states in sequence as indicated in Figure 16 . Upon completion and return to Idle, the device will automatically begin a new Wait-RGBC cycle as long as PON and AEN remain enabled. Figure 17: Simplified State Diagram Principles of Operation
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Principles of Operation RGBC Operation The RGBC engine contains RGBC gain control (AGAIN) and four integrating analog-to-digital converters (ADC) for the RGBC photodiodes. The RGBC integrat ion time (ATIME) impacts both the resolution and the sensit ivity of the RGBC reading. Integration of all four channels occurs simultaneously and upon completion of the conversion cycl e, the results are transferred t o t h e c o l o r d a t a r e g i s t e r s . T h i s d a t a i s a l s o r e f e r r e d t o a s c h a n n e l count. The transfers are double-buffered to ensure that invalid data is not read during the transfer. After the transfer, the device automatically moves to the next state in accordance with the configured state machine. Figure 18: RGBC Operation Note(s): 1. In this document, the nomenclature uses the bit field name in italics followed by the regist er address and bit number to all ow the user to easily identify the register and bi t that controls the function. For example, the power on (PON) is in register 0x00, b it 0. This is represented as PON (r0x00:b0) .
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Principles of Operation The registers for programming the integration and wait times are a 2’s compliment values. The actual time can be calculated as follows: ATIME = 256 − Integration Time / 2.4 ms Inversely, the time can be calculated from the register value as follows: Integration Time = 2.4 ms × (256 − ATIME) For example, if a 100-ms integration time is needed, the device needs to be programmed to: 256 − (100 / 2.4) = 256 − 42 = 214 = 0xD6 Conversely, the programmed value of 0xC0 would correspond to: Interrupts The interrupt feature simplifies and improves system efficiency by eliminating the need to poll the sensor for light intensity values outside of a user-defin ed range. While the interrupt function is always enabled and its status is available in the status register (0x13), the output of the interrupt state can be enabled using the RGBC interrupt enable (AIEN) field in the enable register (0x00). Two 16-bit interrupt threshold re gisters allow the user to set limits below and above a desired light level. An interrupt can be generated when the Clear data (CDATA) is less than the Clear interrupt low threshold (AILTx) or is greater than the Clear interrupt high threshold (AIHTx). It is important to note that the thresholds are evaluated in sequence, first the low threshold, then the high threshold. As a result, if the low threshold is set above the high threshold, the high threshold is ignored and only the low threshold is evaluated.
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Principles of Operation To further control when an interrupt occurs, the device provides a persistence filter. The persiste nce filter allows the user to specify the number of cons ecutive out-of-range Clear occurrences before an interrupt is generated. The persistence filter register (0x0C) allows the user to set the Clear persistence filter (APERS) value. See the persistence filter register for details on the persistence filter value. Once the persistence filter generates an interrupt, it will continue until a special function interrupt clear command is received (see command register). Figure 19: Programmable Interrupt
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − I²C Protocol Interface and control are accomplished through an I²C serial compatible interface (standard or fast mode) to a set of registers that provide access to device cont rol functions and output data. The devices support the 7-bit I²C addressing protocol. The I²C standard provides for three types of bus transaction: read, write, and a combined protocol ( Figure 23 ). During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the register address from the previous command will be used for data access. Likewise, if the MSB of the command is not set, the device will write a series of bytes at the address stored in the last valid command with a register address. The command byte contains either control information or a 5-bit register address. The control commands can also be used to clear interrupts. The I²C bus protocol was develo ped by Philips (now NXP). For a complete description of the I²C protocol, please review the NXP I²C design specification at www.i2c-bus.org/references/. Figure 23: I²C Protocols I²C Protocol Repeated Start Condition Write (0) Continuation of Protocol Master - to - Slave Slave - to - Master Sr W Acknowledge (0) Not Acknowledged (1) Stop Condition Read (1) Start Condition A N P R S
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Register Description The TCS3472 is controlled and mo nitored by data registers and a command register accessed th rough the serial interface. These registers provide for a variety of control functions and can be read to determine results of the ADC conversions. The register set is summarized in Figure 24 . Figure 24: Register Set The mechanics of accessing a spec ific register depends on the specific protocol used. See the section on I²C protocols on the previous pages. In general, the COMMAND register is written first to specify the specific c ontrol-status-data register for subsequent read/write operations. Address Register Name R/W Register Function Reset Value −− COMMAND W Specifies register address 0x00 0x00 ENABLE R/W Enables states and interrupts 0x00 0x01 ATIME R/W RGBC time 0xFF 0x03 WTIME R/W Wait time 0xFF 0x04 AILTL R/W Clear interrupt low threshold low byte 0x00 0x05 AILTH R/W Clear interrupt low threshold high byte 0x00 0x06 AIHTL R/W Clear interrupt high threshold low byte 0x00 0x07 AIHTH R/W Clear interrupt high threshold high byte 0x00 0x0C PERS R/W Interrupt persistence filter 0x00 0x0D CONFIG R/W Configuration 0x00 0x0F CONTROL R/W Control 0x00 0x12 ID R Device ID ID 0x13 STATUS R Device status 0x00 0x14 CDATAL R Clear data low byte 0x00 0x15 CDATAH R Clear data high byte 0x00 0x16 RDATAL R Red data low byte 0x00 0x17 RDATAH R Red data high byte 0x00 0x18 GDATAL R Green data low byte 0x00 0x19 GDATAH R Green data high byte 0x00 0x1A BDATAL R Blue data low byte 0x00 0x1B BDATAH R Blue data high byte 0x00 Register Description
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Register Description Command Register The command register specifie s the address of the target register for future write and read operations. Figure 25: Command Register 7654321 0 CMD TYPE ADDR/SF Fields Bits Description CMD 7 Select Command Register. Must write as 1 when addressing COMMAND register. TYPE 6:5 Selects type of transaction to follow in subsequent data transfers: FIELD VALUE TRANSACTION TYPE
00 Repeated byte protocol transaction
01 Auto-increment protocol transaction
10 Reserved — Do not use
11 Special function — See description below
Byte protocol will repeatedly read the same register with each data access. Block protocol will provide auto-increment function to read successive bytes. ADDR/SF 4:0 Address field/special function field. Depending on the transaction type, see above, this field either specifies a special function command or selects the specific control-status-data register for subsequent read and write transactions. The field values listed below only apply to special function commands: FIELD VALUE READ VALUE
00110 Clear channel interrupt clear
Other Reserved — Do not write The Clear channel interrupt clear special function clears any pending interrupt and is self-clearing.
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Register Description Enable Register (0x00) The ENABLE register is used primarily to power the TCS3472 device ON and OFF, and enable functions and interrupts as shown below. Figure 26: Enable Register Notes: 1. See Power Management section for more information. 2. A minimum interval of 2.4 ms must pass after PON is asserted before an RGBC can be initiated. 7 6 5 4 321 0 Reserved AIEN WEN Reserved AEN PON Fields Bits Description Reserved 7:5 Reserved. Write as 0. AIEN 4 RGBC interrupt enable. When asserted, permits RGBC interrupts to be generated. WEN 3 Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the wait timer. Reserved 2 Reserved. Write as 0. AEN 1 RGBC enable. This bit actives the two-channel ADC. Writing a 1 activates the RGBC. Writing a 0 disables the RGBC. PON(1), (2) 0 Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate. Writing a 1 activates the oscillator. Writing a 0 disables the oscillator.
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Register Description Configuration Register (0x0D) The configuration register sets the wait long time. Figure 31: Configuration Register APERS 3:0 Interrupt persistence. Controls rate of interrupt to the host processor. FIELD VALUE MEANING INTERRUPT PERSISTENCE FUNCTION
0000 Every Every RGBC cycle generates an interrupt
0001 1 1 clear channel value outside of threshold range 0010 2 2 clear channel consecutive values out of range 0011 3 3 clear channel consecutive values out of range 0100 5 5 clear channel consecutive values out of range 0101 10 10 clear channel consecutive values out of range 0110 15 15 clear channel consecutive values out of range 0111 20 20 clear channel consecutive values out of range 1000 25 25 clear channel consecutive values out of range 1001 30 30 clear channel consecutive values out of range 1010 35 35 clear channel consecutive values out of range 1011 40 40 clear channel consecutive values out of range 1100 45 45 clear channel consecutive values out of range 1101 50 50 clear channel consecutive values out of range 1110 55 55 clear channel consecutive values out of range 1111 60 60 clear channel consecutive values out of range 7 6 5 4 321 0 Reserved WLONG Reserved Fields Bits Description Reserved 7:2 Reserved. Write as 0. WLONG 1 Wait Long. When asserted, the wait cycles are increased by a factor 12× from that programmed in the WTIME register. Reserved 0 Reserved. Write as 0. Field Bits Description
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Register Description Control Register (0x0F) The Control register provides eight bits of miscellaneous control to the analog block. These bits typically control functions such as gain setti ngs and/or diode selection. Figure 32: Control Register 7 6 5 4 321 0 Reserved AGAIN Fields Bits Description Reserved 7:2 Reserved. Write as 0. AGAIN 1:0 RGBC Gain Control. FIELD VALUE RGBC GAIN VALUE 00 1X gain 01 4X gain 10 16X gain 11 60X gain
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Register Description RGBC Channel Data Registers (0x14 – 0x1B) Clear, red, green, and blue data is stored as 16-bit values. To ensure the data is read correctly, a two-byte read I²C transaction should be used with a read word protocol bit set in the command register. With this operation, when the lower byte register is read, the upper eight bits are stored into a shadow register, which is read by a subsequent read to the upper byte. The upper register will read the correct value even if additional ADC integration cycles end betw een the reading of the lower and upper registers. Figure 35: RGBC Channel Data Registers Register Address Bits Description CDATA 0x14 7:0 Clear data low byte CDATAH 0x15 7:0 Clear data high byte RDATA 0x16 7:0 Red data low byte RDATAH 0x17 7:0 Red data high byte GDATA 0x18 7:0 Green data low byte GDATAH 0x19 7:0 Green data high byte BDATA 0x1A 7:0 Blue data low byte BDATAH 0x1B 7:0 Blue data high byte
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Application Information: Hardware PCB Pad Layout Suggested PCB pad layout guidelines for the Dual Flat No-Lead (FN) surface mount package are shown in Figure 36 . Figure 36: Suggested FN Package PCB Layout Notes: 1. All linear dimensions are in micrometers. 2. This drawing is subject to change without notice. Application Information: Hardware Pads can be extended further if hand soldering is needed
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Package Drawings & Markings Figure 37: Package FN – Dual Flat No-Lead Packaging Configuration Notes: 1. All linear dimensions are in micrometers. Dime nsion tolerance is ±20 μm unless otherwise noted. 2. The die is centered within the package within a tolerance of ± 3 mils. 3. Package top surface is molded with an electrically noncondu ctive clear plastic compound having an index of refraction of 1. 55. 4. Contact finish is copper alloy A194 with pre-plated NiPdAu lead finish. 5. This package contains no lead (Pb). 6. This drawing is subjec t to change without notice. Package Drawings & Markings Green RoHS
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Mechanical Data Figure 38: Carrier Tape and Reel Information Notes: 1. All linear dimensions are in millimeters. Dimension tolerance is ± 0.10 mm unless otherwise noted. 2. The dimensions on this drawing are fo r illustrative purposes only. Dimensions of an actual carrier may vary slightly. 3. Symbols on drawing A 0, B0, and K 0 are defined in ANSI EIA Standard 481-B 2001. 4. Each reel is 178 millimeters in diameter and contains 3500 parts. 5. ams packaging tape and reel conform to the requiremen ts of EIA Standard 481-B. 6. In accordance with EIA standard, device pin 1 is located next to sprocket holes in the tape. 7. This drawing is subjec t to change without notice. Mechanical Data
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Soldering & Storage Information Storage Information Moisture Sensitivity Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previous ly absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is dry-baked prior to being packed for shipping. Devices are packed in a sealed aluminized envelope called a moisture barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. The Moisture Barrier Bags should be stored under the following conditions:
- Temperature Range < 40°C
- Relative Humidity < 90%
- Total Time - No longer than 12 months from the date code on the aluminized envelope if unopened. Rebaking of the reel will be required if the devices have been stored unopened for more than 12 months and the Humidity Indicator Card shows the parts to be out of the allowable moisture region. Opened reels should be used within 168 hours if exposed to the following conditions:
- Temperature Range < 30°C
- Relative Humidity < 60% If rebaking is required, it should be done at 50°C for 12 hours. The FN package has been assigned a moisture sensitivity level of MSL 3.
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Ordering & Contact Information Figure 41:
Ordering Information
Note(s): 1. Contact ams for availability. Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30
8141 Premstaetten
Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Device Address Package-Leads Interface Description Ordering Number TCS34721(1) 0x39 FN−6 I²C VBUS = VDD Interface TCS34721FN TCS34723(1) 0x39 FN−6 I²C VBUS = 1.8 V Interface TCS34723FN TCS34725 0x29 FN−6 I²C VBUS = VDD Interface TCS34725FN TCS34727 0x29 FN−6 I²C VBUS = 1.8 V Interface TCS34727FN Ordering & Contact Information
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specif ied lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are unde rway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. RoHS Compliant & ams Green Statement
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Copyrights & Disclaimer Copyright ams AG, Tobelbader St rasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used with out the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appe aring in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams AG reserves the right to ch ange specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any th ird party shall arise or flow out of ams AG rendering of technical or other services. Copyrights & Disclaimer
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Document Status Document Status Product Status Definition Product Preview Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Preliminary Datasheet Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Datasheet Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Datasheet (discontinued) Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Document Status
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Revision Information Note(s): 1. Page and figure numbers for the previous version may diff er from page and figure numbers in the current revision. 2. Correction of typographical er rors is not explicitly mentioned. Changes from V1.0 (2013-Apr) to current revision 1-02 (2016-Feb-08) Page V1.0 (2013-Apr) to 1-01 (2016-Feb-03) Content was updated to the latest ams design Updated Figure 25 21 1-01 (2016-Feb-03) to 1-02 (2016-Feb-08) Updated Figure 33 27 Updated notes under Figure 36 29 Revision Information
[v1-02] 2016-Feb-08 Document Feedback TCS3472 − Content Guide
1 General Description
1 Key Benefits & Features
2 Applications
2 End Products and Market Segments
3 Block Diagram
4 Detailed Description
5 Pin Assignment
6A b s o l u t e M a x i m u m R a t i n g s
7 Electrical Characteristics
10 Timing Characteristics
10 Timing Diagram
11 Typical Operating Characteristics
13 Principles of Operation
13 System States
14 RGBC Operation
15 Interrupts
17 System Timing
18 Power Management
19 I²C Protocol
20 Register Description
21 Command Register
22 Enable Register (0x00)
23 RGBC Timing Register (0x01)
23 Wait Time Register (0x03)
24 RGBC Interrupt Threshold Registers
(0x04 − 0x07)
24 Persistence Register (0x0C)
25 Configuration Register (0x0D)
26 Control Register (0x0F)
27 ID Register (0x12)
27 Status Register (0x13)
28 RGBC Channel Data Registers (0x14 – 0x1B)
29 PCB Pad Layout
31 Mechanical Data
32 Soldering & Storage Information
32 Soldering Information
33 Storage Information
33 Moisture Sensitivity
Document Feedback [v1-02] 2016-Feb-08 TCS3472 − Content Guide