ICS5OSK481 ICST | Alldatasheet

Document overview

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Technical content

Features

  • 25 MHz clock input
  • The 48.00 MHz CLK output is USB2.0 reference clock compliant
  • Output duty cycle 45/55% (worst case)
  • Advanced, low-power CMOS process
  • Industrial temperature range (-40 to +85°C)
  • Packaged in 5-pin TSOT
  • 3.3 V supply voltage
  • Pb (lead) free package available
  • Short term C-C Jitter of 100 ps Block Diagram Clock Buffer PLL ICLK CLK VDD GND OE

48 MHz Tiny USB Clock Source

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com P R E L I M I N A R Y I N F O R M AT I O N ICS5OSK481 Pin Assignment Pin Descriptions External Components Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS5OSK481 must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between each VDD and the PCB ground plane. Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01µF decoupling capacitors should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitors and VDD pins. The PCB trace to VDD pins should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI, the 33Ω series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS5OSK481. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. O E G N D C L K I C L K V D D Pin Number Pin Name Pin Type Pin Description ICLK Input 25 MHz clock input. Connect to a parallel resonant fundamental crystal or input clock. GND Power Connect to ground. CLK Output PLL output clock. Internal pull-down resistor. VDD Power Connect to 3.3 V. OE Input Output Enable pin. Internal pull-up resistor. OE=0 outputs tristate with weak pull-down.

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com P R E L I M I N A R Y I N F O R M AT I O N ICS5OSK481 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS5OSK481. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Recommended Operation Conditions Unless stated otherwise, VDD=3.3 V ±5% , Ambient temperature -40 to +85°C, CL=15 pF Item Rating Supply Voltage, VDD 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature -40 to +85°C Storage Temperature -65 to +150°C Soldering Temperature 260°C Parameter Min. Typ. Max. Units Ambient Operating Temperature -40 +85 Power Supply Voltage (measured in respect to GND) +3.135 +3.465 V Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD 3.135 3.465 V Input High Voltage, ICLK only VIH ICLK (VDD/2)+1 V Input Low Voltage, ICLK only VIL ICLK (VDD/2)-1 V Input High Voltage VIH OE 2.0 V Input Low Voltage VIL OE 0.8 V Output High Voltage VOH IOH = -12 mA 2.4 V Output Low Voltage VOL IOL = 12 mA 0.4 V IDD Operating Supply Current No load TBD mA Short Circuit Current CLK output +70 mA On-Chip Pull-up Resistor OE 270 kΩ Input Capacitance, S1, S0, and OE pF Nominal Output Impedance Ω

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com P R E L I M I N A R Y I N F O R M AT I O N ICS5OSK481 Unless stated otherwise, VDD=3.3 V ±5% , Ambient temperature -40 to +85°C, CL=15 pF Note 1: Measured with 15 pF load. Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, clock input FIN 0.5 MHz Output Frequency, VDD = 3.3 V ±5% FOUT -40°C to +85°C MHz Output Clock Rise Time tOR 0.8 to 2.0 V, Note 1 ns Output Clock Fall Time tOF 2.0 to 8.0 V, Note 1 ns Output Clock Duty Cycle tOD 1.5 V 49-51 Output Enable Time, OE high to output on ns Output Disable Time, OE low to tri-state ns Absolute Clock Period Jitter tja Deviation from mean, Note 1 TBD ps

Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com P R E L I M I N A R Y I N F O R M AT I O N ICS5OSK481 Package Outline and Package Dimensions (5-pin TSOT) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

Parts that are ordered with a “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature ICS5OSK481TILF TBD Tubes 5-pin TSOT -40 to +85° C ICS5OSK481TILFT TBD Tape and Reel 5-pin TSOT -40 to +85° C Millimeters Symbol Min Max A 1.00 0.01 0.10 0.84 0.90 b 0.30 0.45 c 0.12 0.20 D

2.90 BASIC

E

2.80 BASIC

1.60 BASIC

e

0.95 BASIC

1.90 BASIC

L 0.30 0.50

0.60 REF

0.25 BASIC

θ aaa 0.10