211AI01L

ICS85211I-01 ICST | Alldatasheet

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www.icst.com/products/hiperclocks.html REV. A NOVEMBER 1, 2005 Integrated Circuit Systems, Inc. ICS85211I-01 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-HSTL FANOUT BUFFER BLOCK DIAGRAM PIN ASSIGNMENT GENERAL DESCRIPTION The ICS85211I-01 is a low skew, high perfor- mance 1-to-2 Differential-to-HSTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85211I-01 is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS85211I-01 ideal for those clock distribution applications demanding well defined performance and repeatability. For optimal performance, terminate all outputs.

FEATURES

• Two differential HSTL compatible outputs
• One differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, HSTL, SSTL, HCSL
• Maximum output frequency: 700MHz
• Translates any single-ended input signal to HSTL levels with resistor bias on nCLK input
• Output skew: 30ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1ns (maximum)
• Output crossover Voltage: 0.68V to 0.9V
• Output duty cycle: 49% - 51% up to 266.6MHz
• VOH = 1.4V (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant packages HiPerClockS™ ICS ICS85211I-01 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View nQ0 nQ1 VDD CLK nCLK GND nQ0 nQ1 CLK nCLK

TABLE 1. PIN DESCRIPTIONS TABLE 2. PIN CHARACTERISTICS TABLE 3. CLOCK INPUT FUNCTION TABLE

www.icst.com/products/hiperclocks.html REV. A NOVEMBER 1, 2005 Integrated Circuit Systems, Inc. ICS85211I-01 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-HSTL FANOUT BUFFER TABLE 4B. DIFFERENTIAL DC CHARACTERISTICS, VDD = 3.3V ± 5%, TA = -40°C TO 85°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V D D e g a tlo V ylp p u S r e w o P V I D D t n e rr u C ylp p u S r e w o P A m l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U I H I t n e rr u C h gi H t u p n I K L C n V D D V N I V A µ K L C V D D V N I V A µ I L I t n e rr u C w o L t u p n I K L C n V D D V V N I V A µ K L C V D D V V N I V A µ V P P e g a tlo V t u p n I k a e P o k a e P V V R M C e g a tlo V t u p n I e d o M n o m m o C E T O N V D D V V si K L C n d n a K L C r o f e g a tlo v t u p ni m u m ix a m e h t s n oit a cilp p a d e d n e elg nis r o F E T O N D D V V s a d e nif e d si e g a tlo v e d o m n o m m o C E T O N H I . TABLE 4C. HSTL DC CHARACTERISTICS, VDD = 3.3V ± 5%, TA = -40°C TO 85°C l o b m y S r e t e m a r a P s n o iti d n o C t s e T m u m i n i M l a c i p y T m u m i x a M s ti n U V H O E T O N e g a tlo V h gi H t u p t u O V V L O E T O N e g a tlo V w o L t u p t u O V V X O e g a tlo V r e v o s s o r C t u p t u O V V G N I W S g ni w S e g a tlo V t u p t u O k a e P o k a e P V h ti w d e t a n i m r e t e b t s u m s t u p t u o ll A E T O N ΩΩΩΩΩ d n u o r g o t TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V ± 5%, TA = -40°C TO 85°C ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VDD -0.5V to VDD + 0.5 V Outputs, VDD -0.5V to VDD + 0.5V Package Thermal Impedance, θJA 112.7°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be- yond those listed in the DC Characteristics or AC Character- istics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.

TABLE 5. AC CHARACTERISTICS, VDD = 3.3V ± 5%, TA = -40°C TO 85°C

www.icst.com/products/hiperclocks.html REV. A NOVEMBER 1, 2005 Integrated Circuit Systems, Inc. ICS85211I-01 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-HSTL FANOUT BUFFER Clock Outputs 20% 80% 80% 20% tR tF VSWING tPW tPERIOD tPW tPERIOD odc = x 100% nQ0, nQ1 Q0, Q1 tPD nCLK CLK nQ0, nQ1 Q0, Q1 Qx nQx Qy nQy PART 1 PART 2 tsk(pp) 3.3V OUTPUT LOAD AC TEST CIRCUIT DIFFERENTIAL INPUT LEVEL PART-TO-PART SKEW OUTPUT SKEW OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD OUTPUT RISE/FALL TIME PROPAGATION DELAY PARAMETER MEASUREMENT INFORMATION tsk(o) nQx Qx nQy Qy V CMR Cross Points V PP nCLK CLK GND VDD SCOPE HSTL Qx nQx 3.3V±5% VDD GND

This section provides information on power dissipation and junction temperature for the ICS85211I-01. Equations and example calculations are also provided. The total power dissipation for the ICS85211I-01 is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C. moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 6 below. and the type of board (single layer or multi-layer). NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. TABLE 6. THERMAL RESISTANCE θθθθθJA FOR 8-PIN SOIC, FORCED CONVECTION

1. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load. HSTL output driver circuit and termination are shown in Figure 4. To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load. Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. FIGURE 4. HSTL DRIVER CIRCUIT AND TERMINATION

TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD SOIC NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

TABLE 8. PACKAGE DIMENSIONS

TABLE 9. ORDERING INFORMATION or critical medical instruments. The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.

www.icst.com/products/hiperclocks.html REV. A NOVEMBER 1, 2005 Integrated Circuit Systems, Inc. ICS85211I-01 LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-HSTL FANOUT BUFFER T E E H S Y R O T S I H N O I S I V E R v e R e l b a T e g a P e g n a h C f o n o it p ir c s e D e t a D A L T S H o t L T S H V L d e g n a h c t e e h s a t a d t u o h g u o r h T V m o rf e p y T K L C n d e g n a h C D D n w o dllu P p ullu P o t C d e g n a h c elb a T s citsir e tc a r a h C ni P N I .la cip yt F p o t.x a m F p R d e g n a h C P U L L U P R o t P U L L U P R N W O D L L U P r o tsis e R n w o dllu P p ullu P A T ellu b S H o R e e r F d a e L d e d d a n oitc e s s e r u t a e F d e d d A ni P t u p t u O d e s u n U r o f s n oit a d n e m m o c e R g nik r a m d n a r e b m u n tr a p e e r F d a e L d e d d a elb a T n oit a m r o f n I g nir e d r O